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@ -1,7 +1,7 @@ |
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/*
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* Atheros AR71xx SPI Controller driver |
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* |
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* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org> |
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org> |
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> |
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* |
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* This program is free software; you can redistribute it and/or modify |
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@ -25,7 +25,7 @@ |
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#include <asm/mach-ar71xx/platform.h> |
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#define DRV_DESC "Atheros AR71xx SPI Controller driver" |
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#define DRV_VERSION "0.2.3" |
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#define DRV_VERSION "0.2.4" |
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#define DRV_NAME "ar71xx-spi" |
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#undef PER_BIT_READ |
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@ -80,10 +80,7 @@ static void ar71xx_spi_chipselect(struct spi_device *spi, int value) |
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ioc_base = sp->get_ioc_base(spi->chip_select, |
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(spi->mode & SPI_CS_HIGH) != 0, |
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AR71XX_SPI_CS_INACTIVE); |
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__raw_writel(ioc_base, base + SPI_REG_IOC); |
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__raw_writel(sp->reg_ctrl, base + SPI_REG_CTRL); |
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__raw_writel(0, base + SPI_REG_FS); |
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break; |
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case BITBANG_CS_ACTIVE: |
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@ -91,15 +88,59 @@ static void ar71xx_spi_chipselect(struct spi_device *spi, int value) |
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(spi->mode & SPI_CS_HIGH) != 0, |
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AR71XX_SPI_CS_ACTIVE); |
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__raw_writel(SPI_FS_GPIO, base + SPI_REG_FS); |
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/* TODO: setup speed */ |
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__raw_writel(0x43, base + SPI_REG_CTRL); |
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__raw_writel(ioc_base, base + SPI_REG_IOC); |
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sp->ioc_base = ioc_base; |
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break; |
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} |
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} |
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static void ar71xx_spi_setup_regs(struct spi_device *spi) |
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{ |
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struct ar71xx_spi *sp = spidev_to_sp(spi); |
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/* enable GPIO mode */ |
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ar71xx_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO); |
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/* save CTRL register */ |
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sp->reg_ctrl = ar71xx_spi_rr(sp, SPI_REG_CTRL); |
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/* TODO: setup speed? */ |
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ar71xx_spi_wr(sp, SPI_REG_CTRL, 0x43); |
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} |
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static void ar71xx_spi_restore_regs(struct spi_device *spi) |
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{ |
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struct ar71xx_spi *sp = spidev_to_sp(spi); |
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/* restore CTRL register */ |
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ar71xx_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl); |
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/* disable GPIO mode */ |
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ar71xx_spi_wr(sp, SPI_REG_FS, 0); |
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} |
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static int ar71xx_spi_setup(struct spi_device *spi) |
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{ |
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int status; |
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if (spi->bits_per_word > 32) |
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return -EINVAL; |
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if (!spi->controller_state) |
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ar71xx_spi_setup_regs(spi); |
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status = spi_bitbang_setup(spi); |
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if (status && !spi->controller_state) |
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ar71xx_spi_restore_regs(spi); |
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return status; |
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} |
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static void ar71xx_spi_cleanup(struct spi_device *spi) |
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{ |
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ar71xx_spi_restore_regs(spi); |
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spi_bitbang_cleanup(spi); |
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} |
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static u32 ar71xx_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs, |
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u32 word, u8 bits) |
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{ |
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@ -157,9 +198,13 @@ static int ar71xx_spi_probe(struct platform_device *pdev) |
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pdata = pdev->dev.platform_data; |
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master->setup = ar71xx_spi_setup; |
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master->cleanup = ar71xx_spi_cleanup; |
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sp->bitbang.master = spi_master_get(master); |
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sp->bitbang.chipselect = ar71xx_spi_chipselect; |
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sp->bitbang.txrx_word[SPI_MODE_0] = ar71xx_spi_txrx_mode0; |
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sp->bitbang.setup_transfer = spi_bitbang_setup_transfer; |
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sp->get_ioc_base = ar71xx_spi_get_ioc_base; |
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if (pdata) { |
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@ -184,14 +229,12 @@ static int ar71xx_spi_probe(struct platform_device *pdev) |
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goto err1; |
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} |
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sp->reg_ctrl = ar71xx_spi_rr(sp, SPI_REG_CTRL); |
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ret = spi_bitbang_start(&sp->bitbang); |
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if (!ret) |
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return 0; |
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iounmap(sp->base); |
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err1: |
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err1: |
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platform_set_drvdata(pdev, NULL); |
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spi_master_put(sp->bitbang.master); |
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