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kernel/3.10: rework MIPS FPU emulation disable patch

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Get rid of some ifdefs, and make sure that the microMIPS
specific code is disabled as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 37506
master
Gabor Juhos 11 years ago
parent 0cc1e2acb4
commit bc91bec9f6
1 changed files with 78 additions and 124 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 202
      target/linux/generic/patches-3.10/304-mips_disable_fpu.patch

202
target/linux/generic/patches-3.10/304-mips_disable_fpu.patch
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@ -20,7 +20,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
+ FPU emulator enabled. Turning off this option results in a kernel which
+ does not catch floating operations exceptions. Make sure that your toolchain
+ is configured to enable software floating point emulation in that case.
+
+
+ If unsure say Y here.
+
config MIPS_MSC
@ -28,12 +28,13 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
--- a/arch/mips/math-emu/Makefile
+++ b/arch/mips/math-emu/Makefile
@@ -2,10 +2,11 @@
@@ -2,10 +2,12 @@
# Makefile for the Linux/MIPS kernel FPU emulation.
#
-obj-y := cp1emu.o ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
+obj-y := kernel_linkage.o dsemul.o cp1emu.o
+obj-y := kernel_linkage.o
+
+obj-$(CONFIG_MIPS_FPU_EMU) += ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \
ieee754xcpt.o dp_frexp.o dp_modf.o dp_div.o dp_mul.o dp_sub.o \
dp_add.o dp_fsp.o dp_cmp.o dp_logb.o dp_scalb.o dp_simple.o \
@ -41,121 +42,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_logb.o \
sp_scalb.o sp_simple.o sp_tint.o sp_fint.o sp_tlong.o sp_flong.o \
- dp_sqrt.o sp_sqrt.o kernel_linkage.o dsemul.o
+ dp_sqrt.o sp_sqrt.o
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -59,7 +59,11 @@
#define __mips 4
/* Function which emulates a floating point instruction. */
+#ifdef CONFIG_DEBUG_FS
+DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
+#endif
+#ifdef CONFIG_MIPS_FPU_EMU
static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *,
mips_instruction);
@@ -70,10 +74,6 @@ static int fpux_emu(struct pt_regs *,
/* Further private data for which no space exists in mips_fpu_struct */
-#ifdef CONFIG_DEBUG_FS
-DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
-#endif
-
/* Control registers */
#define FPCREG_RID 0 /* $0 = revision id */
@@ -82,11 +82,15 @@ DEFINE_PER_CPU(struct mips_fpu_emulator_
/* Determine rounding mode from the RM bits of the FCSR */
#define modeindex(v) ((v) & FPU_CSR_RM)
+#endif /* CONFIG_MIPS_FPU_EMU */
+
/* microMIPS bitfields */
#define MM_POOL32A_MINOR_MASK 0x3f
#define MM_POOL32A_MINOR_SHIFT 0x6
#define MM_MIPS32_COND_FC 0x30
+#ifdef CONFIG_MIPS_FPU_EMU
+
/* Convert Mips rounding mode (0..3) to IEEE library modes. */
static const unsigned char ieee_rm[4] = {
[FPU_CSR_RN] = IEEE754_RN,
@@ -116,9 +120,13 @@ static const unsigned int fpucondbit[8]
};
#endif
+#endif /* CONFIG_MIPS_FPU_EMU */
+
/* (microMIPS) Convert 16-bit register encoding to 32-bit register encoding. */
static const unsigned int reg16to32map[8] = {16, 17, 2, 3, 4, 5, 6, 7};
+#ifdef CONFIG_MIPS_FPU_EMU
+
/* (microMIPS) Convert certain microMIPS instructions to MIPS32 format. */
static const int sd_format[] = {16, 17, 0, 0, 0, 0, 0, 0};
static const int sdps_format[] = {16, 17, 22, 0, 0, 0, 0, 0};
@@ -463,6 +471,8 @@ static int microMIPS32_to_MIPS32(union m
return 0;
}
+#endif /* CONFIG_MIPS_FPU_EMU */
+
int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
unsigned long *contpc)
{
@@ -667,6 +677,8 @@ int mm_isBranchInstr(struct pt_regs *reg
return 0;
}
+#ifdef CONFIG_MIPS_FPU_EMU
+
/*
* Redundant with logic already in kernel/branch.c,
* embedded in compute_return_epc. At some point,
@@ -2102,7 +2114,6 @@ int fpu_emulator_cop1Handler(struct pt_r
return sig;
}
-
#ifdef CONFIG_DEBUG_FS
static int fpuemu_stat_get(void *data, u64 *val)
@@ -2151,4 +2162,11 @@ static int __init debugfs_fpuemu(void)
return 0;
}
__initcall(debugfs_fpuemu);
-#endif
+#endif /* CONFIG_DEBUGFS */
+#else
+int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
+ int has_fpu, void *__user *fault_addr)
+{
+ return 0;
+}
+#endif /* CONFIG_MIPS_FPU_EMU */
--- a/arch/mips/math-emu/dsemul.c
+++ b/arch/mips/math-emu/dsemul.c
@@ -119,6 +119,7 @@ int mips_dsemul(struct pt_regs *regs, mi
return SIGILL; /* force out of emulation loop */
}
+#ifdef CONFIG_MIPS_FPU_EMU
int do_dsemulret(struct pt_regs *xcp)
{
struct emuframe __user *fr;
@@ -182,3 +183,9 @@ int do_dsemulret(struct pt_regs *xcp)
return 1;
}
+#else
+int do_dsemulret(struct pt_regs *xcp)
+{
+ return 0;
+}
+#endif /* CONFIG_MIPS_FPU_EMU */
+ dp_sqrt.o sp_sqrt.o dsemul.o cp1emu.o
--- a/arch/mips/math-emu/kernel_linkage.c
+++ b/arch/mips/math-emu/kernel_linkage.c
@@ -29,6 +29,7 @@
@ -166,12 +53,11 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
void fpu_emulator_init_fpu(void)
{
static int first = 1;
@@ -112,4 +113,36 @@ int fpu_emulator_restore_context32(struc
@@ -113,3 +114,36 @@ int fpu_emulator_restore_context32(struc
return err;
}
-#endif
+#endif /* CONFIG_64BIT */
#endif
+
+#else
+
+void fpu_emulator_init_fpu(void)
@ -191,6 +77,7 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
+ return 0;
+}
+
+#ifdef CONFIG_64BIT
+int fpu_emulator_save_context32(struct sigcontext32 __user *sc)
+{
+ return 0;
@ -200,7 +87,74 @@ Signed-off-by: Florian Fainelli <florian@openwrt.org>
+{
+ return 0;
+}
+#endif /* CONFIG_64BIT */
+
+#ifdef CONFIG_64BIT
+#endif /* CONFIG_64BIT */
+#endif /* CONFIG_MIPS_FPU_EMU */
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -27,6 +27,8 @@
#include <asm/inst.h>
#include <asm/local.h>
+#ifdef CONFIG_MIPS_FPU_EMU
+
#ifdef CONFIG_DEBUG_FS
struct mips_fpu_emulator_stats {
@@ -60,6 +62,38 @@ extern int fpu_emulator_cop1Handler(stru
int process_fpemu_return(int sig, void __user *fault_addr);
int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
unsigned long *contpc);
+#else
+static inline int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
+ unsigned long cpc)
+{
+ return 0;
+}
+
+static inline int do_dsemulret(struct pt_regs *xcp)
+{
+ return 0;
+}
+
+static inline int fpu_emulator_cop1Handler(struct pt_regs *xcp,
+ struct mips_fpu_struct *ctx,
+ int has_fpu,
+ void *__user *fault_addr)
+{
+ return 0;
+}
+
+static inline int process_fpemu_return(int sig, void __user *fault_addr)
+{
+ return -EINVAL;
+}
+
+static inline int mm_isBranchInstr(struct pt_regs *regs,
+ struct mm_decoded_insn dec_insn,
+ unsigned long *contpc)
+{
+ return 0;
+}
+#endif /* CONFIG_MIPS_FPU_EMU */
/*
* Instruction inserted following the badinst to further tag the sequence
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -684,6 +684,7 @@ asmlinkage void do_ov(struct pt_regs *re
force_sig_info(SIGFPE, &info, current);
}
+#ifdef CONFIG_MIPS_FPU_EMU
int process_fpemu_return(int sig, void __user *fault_addr)
{
if (sig == SIGSEGV || sig == SIGBUS) {
@@ -707,6 +708,7 @@ int process_fpemu_return(int sig, void _
return 0;
}
}
+#endif /* CONFIG_MIPS_FPU_EMU */
/*
* XXX Delayed fp exceptions when doing a lazy ctx switch XXX

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