Imre Kaloz
15 years ago
parent
33c38fba27
commit
ba7f77b25f
@ -1,135 +0,0 @@ |
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--- a/arch/powerpc/platforms/40x/Kconfig
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+++ b/arch/powerpc/platforms/40x/Kconfig
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@@ -14,6 +14,15 @@
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# help
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# This option enables support for the CPCI405 board.
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+config ACADIA
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+ bool "Acadia"
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+ depends on 40x
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+ default n
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+ select PPC40x_SIMPLE
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+ select 405EZ
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+ help
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+ This option enables support for the AMCC 405EZ Acadia evaluation board.
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+
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config EP405
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bool "EP405/EP405PC"
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depends on 40x
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@@ -93,6 +102,13 @@ config XILINX_VIRTEX_GENERIC_BOARD
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Most Virtex designs should use this unless it needs to do some
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special configuration at board probe time.
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+config PPC40x_SIMPLE
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+ bool "Simple PowerPC 40x board support"
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+ depends on 40x
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+ default n
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+ help
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+ This option enables the simple PowerPC 40x platform support.
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+
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# 40x specific CPU modules, selected based on the board above.
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config NP405H
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bool
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@@ -118,6 +134,12 @@ config 405EX
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select IBM_NEW_EMAC_EMAC4
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select IBM_NEW_EMAC_RGMII
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+config 405EZ
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+ bool
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+ select IBM_NEW_EMAC_NO_FLOW_CTRL
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+ select IBM_NEW_EMAC_MAL_CLR_ICINTSTAT
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+ select IBM_NEW_EMAC_MAL_COMMON_ERR
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+
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config 405GPR
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bool
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--- a/arch/powerpc/platforms/40x/Makefile
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+++ b/arch/powerpc/platforms/40x/Makefile
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@@ -3,3 +3,4 @@ obj-$(CONFIG_MAKALU) += makalu.o
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obj-$(CONFIG_WALNUT) += walnut.o
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obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o
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obj-$(CONFIG_EP405) += ep405.o
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+obj-$(CONFIG_PPC40x_SIMPLE) += ppc40x_simple.o
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--- /dev/null
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+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
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@@ -0,0 +1,80 @@
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+/*
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+ * Generic PowerPC 40x platform support
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+ *
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+ * Copyright 2008 IBM Corporation
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; version 2 of the License.
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+ *
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+ * This implements simple platform support for PowerPC 44x chips. This is
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+ * mostly used for eval boards or other simple and "generic" 44x boards. If
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+ * your board has custom functions or hardware, then you will likely want to
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+ * implement your own board.c file to accommodate it.
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+ */
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+
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+#include <asm/machdep.h>
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+#include <asm/pci-bridge.h>
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+#include <asm/ppc4xx.h>
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+#include <asm/prom.h>
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+#include <asm/time.h>
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+#include <asm/udbg.h>
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+#include <asm/uic.h>
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+
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+#include <linux/init.h>
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+#include <linux/of_platform.h>
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+
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+static __initdata struct of_device_id ppc40x_of_bus[] = {
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+ { .compatible = "ibm,plb3", },
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+ { .compatible = "ibm,plb4", },
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+ { .compatible = "ibm,opb", },
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+ { .compatible = "ibm,ebc", },
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+ { .compatible = "simple-bus", },
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+ {},
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+};
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+
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+static int __init ppc40x_device_probe(void)
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+{
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+ of_platform_bus_probe(NULL, ppc40x_of_bus, NULL);
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+
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+ return 0;
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+}
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+machine_device_initcall(ppc40x_simple, ppc40x_device_probe);
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+
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+/* This is the list of boards that can be supported by this simple
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+ * platform code. This does _not_ mean the boards are compatible,
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+ * as they most certainly are not from a device tree perspective.
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+ * However, their differences are handled by the device tree and the
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+ * drivers and therefore they don't need custom board support files.
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+ *
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+ * Again, if your board needs to do things differently then create a
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+ * board.c file for it rather than adding it to this list.
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+ */
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+static char *board[] __initdata = {
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+ "amcc,acadia"
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+};
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+
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+static int __init ppc40x_probe(void)
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+{
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+ unsigned long root = of_get_flat_dt_root();
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+ int i = 0;
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+
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+ for (i = 0; i < ARRAY_SIZE(board); i++) {
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+ if (of_flat_dt_is_compatible(root, board[i])) {
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+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
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+ return 1;
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+ }
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+ }
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+
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+ return 0;
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+}
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+
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+define_machine(ppc40x_simple) {
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+ .name = "PowerPC 40x Platform",
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+ .probe = ppc40x_probe,
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+ .progress = udbg_progress,
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+ .init_IRQ = uic_init_tree,
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+ .get_irq = uic_get_irq,
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+ .restart = ppc4xx_reset_system,
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+ .calibrate_decr = generic_calibrate_decr,
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+};
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@ -1,197 +0,0 @@ |
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--- a/arch/powerpc/boot/Makefile
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+++ b/arch/powerpc/boot/Makefile
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@@ -68,7 +68,8 @@ src-plat := of.c cuboot-52xx.c cuboot-82
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fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
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cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
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cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
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- virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c
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+ virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
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+ cuboot-acadia.c
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src-boot := $(src-wlib) $(src-plat) empty.c
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src-boot := $(addprefix $(obj)/, $(src-boot))
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@@ -211,6 +212,7 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImag
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# Board ports in arch/powerpc/platform/40x/Kconfig
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image-$(CONFIG_EP405) += dtbImage.ep405
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image-$(CONFIG_WALNUT) += treeImage.walnut
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+image-$(CONFIG_ACADIA) += cuImage.acadia
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# Board ports in arch/powerpc/platform/44x/Kconfig
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image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
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--- /dev/null
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+++ b/arch/powerpc/boot/cuboot-acadia.c
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@@ -0,0 +1,174 @@
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+/*
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+ * Old U-boot compatibility for Acadia
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+ *
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+ * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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+ *
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+ * Copyright 2008 IBM Corporation
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ */
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+
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+#include "ops.h"
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+#include "io.h"
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+#include "dcr.h"
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+#include "stdio.h"
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+#include "4xx.h"
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+#include "44x.h"
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+#include "cuboot.h"
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+
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+#define TARGET_4xx
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+#include "ppcboot.h"
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+
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+static bd_t bd;
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+
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+#define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */
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+
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+#define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */
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+
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+#define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */
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+#define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */
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+#define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */
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+
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+#define PRIMAD_CPUDV_MASK 0x0F000000 /* CPU Clock Divisor Mask */
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+#define PRIMAD_PLBDV_MASK 0x000F0000 /* PLB Clock Divisor Mask */
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+#define PRIMAD_OPBDV_MASK 0x00000F00 /* OPB Clock Divisor Mask */
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+#define PRIMAD_EBCDV_MASK 0x0000000F /* EBC Clock Divisor Mask */
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+
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+#define PERD0_PWMDV_MASK 0xFF000000 /* PWM Divider Mask */
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+#define PERD0_SPIDV_MASK 0x000F0000 /* SPI Divider Mask */
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+#define PERD0_U0DV_MASK 0x0000FF00 /* UART 0 Divider Mask */
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+#define PERD0_U1DV_MASK 0x000000FF /* UART 1 Divider Mask */
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+
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+static void get_clocks(void)
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+{
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+ unsigned long sysclk, cpr_plld, cpr_pllc, cpr_primad, plloutb, i;
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+ unsigned long pllFwdDiv, pllFwdDivB, pllFbkDiv, pllPlbDiv, pllExtBusDiv;
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+ unsigned long pllOpbDiv, freqEBC, freqUART, freqOPB;
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+ unsigned long div; /* total divisor udiv * bdiv */
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+ unsigned long umin; /* minimum udiv */
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+ unsigned short diff; /* smallest diff */
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+ unsigned long udiv; /* best udiv */
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+ unsigned short idiff; /* current diff */
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+ unsigned short ibdiv; /* current bdiv */
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+ unsigned long est; /* current estimate */
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+ unsigned long baud;
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+ void *np;
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+
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+ /* read the sysclk value from the CPLD */
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+ sysclk = (in_8((unsigned char *)0x80000000) == 0xc) ? 66666666 : 33333000;
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+
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+ /*
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+ * Read PLL Mode registers
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+ */
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+ cpr_plld = CPR0_READ(DCRN_CPR0_PLLD);
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+ cpr_pllc = CPR0_READ(DCRN_CPR0_PLLC);
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+
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+ /*
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+ * Determine forward divider A
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+ */
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+ pllFwdDiv = ((cpr_plld & PLLD_FWDVA_MASK) >> 16);
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+
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+ /*
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+ * Determine forward divider B
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+ */
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+ pllFwdDivB = ((cpr_plld & PLLD_FWDVB_MASK) >> 8);
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+ if (pllFwdDivB == 0)
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+ pllFwdDivB = 8;
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+
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+ /*
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+ * Determine FBK_DIV.
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+ */
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+ pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24);
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+ if (pllFbkDiv == 0)
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+ pllFbkDiv = 256;
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+
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+ /*
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+ * Read CPR_PRIMAD register
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+ */
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+ cpr_primad = CPR0_READ(DCRN_CPR0_PRIMAD);
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+
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+ /*
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+ * Determine PLB_DIV.
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+ */
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+ pllPlbDiv = ((cpr_primad & PRIMAD_PLBDV_MASK) >> 16);
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+ if (pllPlbDiv == 0)
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+ pllPlbDiv = 16;
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+
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+ /*
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+ * Determine EXTBUS_DIV.
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+ */
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+ pllExtBusDiv = (cpr_primad & PRIMAD_EBCDV_MASK);
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+ if (pllExtBusDiv == 0)
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+ pllExtBusDiv = 16;
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+
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+ /*
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+ * Determine OPB_DIV.
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+ */
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+ pllOpbDiv = ((cpr_primad & PRIMAD_OPBDV_MASK) >> 8);
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+ if (pllOpbDiv == 0)
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+ pllOpbDiv = 16;
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+
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+ /* There is a bug in U-Boot that prevents us from using
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+ * bd.bi_opbfreq because U-Boot doesn't populate it for
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+ * 405EZ. We get to calculate it, yay!
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+ */
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+ freqOPB = (sysclk *pllFbkDiv) /pllOpbDiv;
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+
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+ freqEBC = (sysclk * pllFbkDiv) / pllExtBusDiv;
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+
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+ plloutb = ((sysclk * ((cpr_pllc & PLLC_SRC_MASK) ?
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+ pllFwdDivB : pllFwdDiv) *
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+ pllFbkDiv) / pllFwdDivB);
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+
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+ np = find_node_by_alias("serial0");
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+ if (getprop(np, "current-speed", &baud, sizeof(baud)) != sizeof(baud))
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+ fatal("no current-speed property\n\r");
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+
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+ udiv = 256; /* Assume lowest possible serial clk */
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+ div = plloutb / (16 * baud); /* total divisor */
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+ umin = (plloutb / freqOPB) << 1; /* 2 x OPB divisor */
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+ diff = 256; /* highest possible */
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+
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+ /* i is the test udiv value -- start with the largest
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+ * possible (256) to minimize serial clock and constrain
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+ * search to umin.
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+ */
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+ for (i = 256; i > umin; i--) {
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+ ibdiv = div / i;
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+ est = i * ibdiv;
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+ idiff = (est > div) ? (est-div) : (div-est);
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+ if (idiff == 0) {
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+ udiv = i;
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+ break; /* can't do better */
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+ } else if (idiff < diff) {
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+ udiv = i; /* best so far */
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+ diff = idiff; /* update lowest diff*/
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+ }
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+ }
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+ freqUART = plloutb / udiv;
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+
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+ dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_intfreq, bd.bi_plb_busfreq);
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+ dt_fixup_clock("/plb/ebc", freqEBC);
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+ dt_fixup_clock("/plb/opb", freqOPB);
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+ dt_fixup_clock("/plb/opb/serial@ef600300", freqUART);
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+ dt_fixup_clock("/plb/opb/serial@ef600400", freqUART);
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+}
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+
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+static void acadia_fixups(void)
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+{
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+ dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
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+ get_clocks();
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+ dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
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+}
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+
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+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
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+ unsigned long r6, unsigned long r7)
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+{
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+ CUBOOT_INIT();
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+ platform_ops.fixups = acadia_fixups;
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+ platform_ops.exit = ibm40x_dbcr_reset;
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+ fdt_init(_dtb_start);
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+ serial_console_init();
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+}
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