SVN-Revision: 41776master
John Crispin
10 years ago
parent
34c9bc0596
commit
ba63338d3f
@ -1,48 +0,0 @@ |
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From 2ff030d44672d745c5327b72463af43f5103e99b Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Tue, 25 Mar 2014 17:07:46 +0100
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Subject: [PATCH] watchdog: ath79-wdt: avoid spurious restarts on AR934x
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On some AR934x based systems, where the frequency of
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the AHB bus is relatively high, the built-in watchdog
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causes a spurious restart when it gets enabled.
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The possible cause of these restarts is that the timeout
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value written into the TIMER register does not reaches
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the hardware in time.
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Add an explicit delay into the ath79_wdt_enable function
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to avoid the spurious restarts.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Cc: <stable@vger.kernel.org>
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---
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drivers/watchdog/ath79_wdt.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/drivers/watchdog/ath79_wdt.c
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+++ b/drivers/watchdog/ath79_wdt.c
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@@ -20,6 +20,7 @@
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/bitops.h>
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+#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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@@ -91,6 +92,15 @@ static inline void ath79_wdt_keepalive(v
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static inline void ath79_wdt_enable(void)
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{
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ath79_wdt_keepalive();
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+
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+ /*
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+ * Updating the TIMER register requires a few microseconds
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+ * on the AR934x SoCs at least. Use a small delay to ensure
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+ * that the TIMER register is updated within the hardware
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+ * before enabling the watchdog.
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+ */
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+ udelay(2);
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+
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ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
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/* flush write */
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ath79_wdt_rr(WDOG_REG_CTRL);
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