This will make these files much more maintainable. Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> SVN-Revision: 45597master
Imre Kaloz
10 years ago
parent
f86c07d8d4
commit
b9fbf31fe7
@ -0,0 +1,168 @@ |
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/*
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* U-Boot compatibility wrapper for the TP-Link TL-WDR4900 v1 board |
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* |
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* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org> |
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* |
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* Based on: |
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* cuboot-85xx.c |
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* Author: Scott Wood <scottwood@freescale.com> |
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* Copyright (c) 2007 Freescale Semiconductor, Inc. |
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* |
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* simpleboot.c |
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* Authors: Scott Wood <scottwood@freescale.com> |
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* Grant Likely <grant.likely@secretlab.ca> |
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* Copyright (c) 2007 Freescale Semiconductor, Inc. |
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* Copyright (c) 2008 Secret Lab Technologies Ltd. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 as published |
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* by the Free Software Foundation. |
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*/ |
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#include "ops.h" |
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#include "types.h" |
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#include "io.h" |
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#include "stdio.h" |
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#include <libfdt.h> |
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BSS_STACK(4*1024); |
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static unsigned long bus_freq; |
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static unsigned long int_freq; |
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static u64 mem_size; |
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static unsigned char enetaddr[6]; |
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static void process_boot_dtb(void *boot_dtb) |
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{ |
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const u32 *na, *ns, *reg, *val32; |
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const char *path; |
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u64 memsize64; |
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int node, size, i; |
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/* Make sure FDT blob is sane */ |
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if (fdt_check_header(boot_dtb) != 0) |
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fatal("Invalid device tree blob\n"); |
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/* Find the #address-cells and #size-cells properties */ |
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node = fdt_path_offset(boot_dtb, "/"); |
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if (node < 0) |
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fatal("Cannot find root node\n"); |
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na = fdt_getprop(boot_dtb, node, "#address-cells", &size); |
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if (!na || (size != 4)) |
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fatal("Cannot find #address-cells property"); |
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ns = fdt_getprop(boot_dtb, node, "#size-cells", &size); |
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if (!ns || (size != 4)) |
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fatal("Cannot find #size-cells property"); |
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/* Find the memory range */ |
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node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type", |
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"memory", sizeof("memory")); |
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if (node < 0) |
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fatal("Cannot find memory node\n"); |
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reg = fdt_getprop(boot_dtb, node, "reg", &size); |
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if (size < (*na+*ns) * sizeof(u32)) |
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fatal("cannot get memory range\n"); |
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/* Only interested in memory based at 0 */ |
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for (i = 0; i < *na; i++) |
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if (*reg++ != 0) |
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fatal("Memory range is not based at address 0\n"); |
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/* get the memsize and trucate it to under 4G on 32 bit machines */ |
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memsize64 = 0; |
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for (i = 0; i < *ns; i++) |
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memsize64 = (memsize64 << 32) | *reg++; |
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if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL) |
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memsize64 = 0xffffffff; |
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mem_size = memsize64; |
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/* get clock frequencies */ |
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node = fdt_node_offset_by_prop_value(boot_dtb, -1, "device_type", |
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"cpu", sizeof("cpu")); |
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if (!node) |
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fatal("Cannot find cpu node\n"); |
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val32 = fdt_getprop(boot_dtb, node, "clock-frequency", &size); |
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if (!val32 || (size != 4)) |
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fatal("Cannot get clock frequency"); |
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int_freq = *val32; |
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val32 = fdt_getprop(boot_dtb, node, "bus-frequency", &size); |
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if (!val32 || (size != 4)) |
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fatal("Cannot get bus frequency"); |
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bus_freq = *val32; |
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path = fdt_get_alias(boot_dtb, "ethernet0"); |
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if (path) { |
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const void *p; |
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node = fdt_path_offset(boot_dtb, path); |
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if (node < 0) |
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fatal("Cannot find ethernet0 node"); |
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p = fdt_getprop(boot_dtb, node, "mac-address", &size); |
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if (!p || (size < 6)) { |
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printf("no mac-address property, finding local\n\r"); |
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p = fdt_getprop(boot_dtb, node, "local-mac-address", &size); |
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} |
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if (!p || (size < 6)) |
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fatal("cannot get MAC addres"); |
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memcpy(enetaddr, p, sizeof(enetaddr)); |
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} |
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} |
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static void platform_fixups(void) |
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{ |
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void *soc, *mpic; |
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dt_fixup_memory(0, mem_size); |
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dt_fixup_mac_address_by_alias("ethernet0", enetaddr); |
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dt_fixup_cpu_clocks(int_freq, bus_freq / 8, bus_freq); |
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/* Unfortunately, the specific model number is encoded in the
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* soc node name in existing dts files -- once that is fixed, |
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* this can do a simple path lookup. |
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*/ |
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soc = find_node_by_devtype(NULL, "soc"); |
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if (soc) { |
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void *serial = NULL; |
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setprop(soc, "bus-frequency", &bus_freq, sizeof(bus_freq)); |
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while ((serial = find_node_by_devtype(serial, "serial"))) { |
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if (get_parent(serial) != soc) |
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continue; |
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setprop(serial, "clock-frequency", &bus_freq, |
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sizeof(bus_freq)); |
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} |
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} |
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mpic = find_node_by_compatible(NULL, "fsl,mpic"); |
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if (mpic) |
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setprop(mpic, "clock-frequency", &bus_freq, sizeof(bus_freq)); |
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} |
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void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, |
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unsigned long r6, unsigned long r7) |
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{ |
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mem_size = 64 * 1024 * 1024; |
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simple_alloc_init(_end, mem_size - (u32)_end - 1024*1024, 32, 64); |
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fdt_init(_dtb_start); |
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serial_console_init(); |
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printf("\n\r-- TL-WDR4900 v1 boot wrapper --\n\r"); |
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process_boot_dtb((void *) r3); |
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platform_ops.fixups = platform_fixups; |
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} |
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@ -0,0 +1,212 @@ |
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/* |
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* TP-Link TL-WDR4900 v1 Device Tree Source |
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* |
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* Copyright 2013 Gabor Juhos <juhosg@openwrt.org> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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*/ |
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/include/ "fsl/p1010si-pre.dtsi" |
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/ { |
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model = "TP-Link TL-WDR4900 v1"; |
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compatible = "tp-link,TL-WDR4900v1"; |
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chosen { |
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bootargs = "console=ttyS0,115200"; |
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/* |
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linux,stdout-path = "/soc@ffe00000/serial@4500"; |
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*/ |
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}; |
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aliases { |
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spi0 = &spi0; |
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}; |
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memory { |
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device_type = "memory"; |
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}; |
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soc: soc@ffe00000 { |
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ranges = <0x0 0x0 0xffe00000 0x100000>; |
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spi0: spi@7000 { |
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flash@0 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "spansion,s25fl129p1"; |
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reg = <0>; |
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spi-max-frequency = <25000000>; |
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u-boot@0 { |
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reg = <0x0 0x0050000>; |
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label = "u-boot"; |
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read-only; |
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}; |
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dtb@50000 { |
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reg = <0x00050000 0x00010000>; |
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label = "dtb"; |
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read-only; |
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}; |
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kernel@60000 { |
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reg = <0x00060000 0x002a0000>; |
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label = "kernel"; |
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}; |
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rootfs@300000 { |
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reg = <0x00300000 0x00ce0000>; |
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label = "rootfs"; |
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}; |
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config@fe0000 { |
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reg = <0x00fe0000 0x00010000>; |
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label = "config"; |
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read-only; |
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}; |
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caldata@ff0000 { |
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reg = <0x00ff0000 0x00010000>; |
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label = "caldata"; |
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read-only; |
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}; |
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firmware@60000 { |
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reg = <0x00060000 0x00f80000>; |
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label = "firmware"; |
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}; |
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}; |
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}; |
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gpio0: gpio-controller@f000 { |
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}; |
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usb@22000 { |
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phy_type = "utmi"; |
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dr_mode = "host"; |
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}; |
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mdio@24000 { |
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phy0: ethernet-phy@0 { |
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reg = <0x0>; |
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qca,ar8327-initvals = < |
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0x00004 0x07600000 /* PAD0_MODE */ |
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0x00008 0x00000000 /* PAD5_MODE */ |
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0x0000c 0x01000000 /* PAD6_MODE */ |
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0x00010 0x40000000 /* POWER_ON_STRIP */ |
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0x00050 0xcf35cf35 /* LED_CTRL0 */ |
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0x00054 0xcf35cf35 /* LED_CTRL1 */ |
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0x00058 0xcf35cf35 /* LED_CTRL2 */ |
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0x0005c 0x03ffff00 /* LED_CTRL3 */ |
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0x0007c 0x0000007e /* PORT0_STATUS */ |
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>; |
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}; |
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}; |
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mdio@25000 { |
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status = "disabled"; |
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}; |
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mdio@26000 { |
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status = "disabled"; |
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}; |
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enet0: ethernet@b0000 { |
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phy-handle = <&phy0>; |
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phy-connection-type = "rgmii-id"; |
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}; |
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enet1: ethernet@b1000 { |
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status = "disabled"; |
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}; |
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enet2: ethernet@b2000 { |
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status = "disabled"; |
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}; |
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sdhc@2e000 { |
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status = "disabled"; |
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}; |
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serial1: serial@4600 { |
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status = "disabled"; |
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}; |
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can0: can@1c000 { |
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status = "disabled"; |
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}; |
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can1: can@1d000 { |
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status = "disabled"; |
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}; |
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}; |
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pci0: pcie@ffe09000 { |
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reg = <0 0xffe09000 0 0x1000>; |
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ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 |
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0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>; |
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pcie@0 { |
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ranges = <0x2000000 0x0 0xa0000000 |
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0x2000000 0x0 0xa0000000 |
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0x0 0x20000000 |
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0x1000000 0x0 0x0 |
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0x1000000 0x0 0x0 |
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0x0 0x100000>; |
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}; |
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}; |
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pci1: pcie@ffe0a000 { |
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reg = <0 0xffe0a000 0 0x1000>; |
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ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 |
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0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; |
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pcie@0 { |
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ranges = <0x2000000 0x0 0x80000000 |
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0x2000000 0x0 0x80000000 |
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0x0 0x20000000 |
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0x1000000 0x0 0x0 |
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0x1000000 0x0 0x0 |
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0x0 0x100000>; |
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}; |
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}; |
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ifc: ifc@ffe1e000 { |
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status = "disabled"; |
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}; |
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leds { |
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compatible = "gpio-leds"; |
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system { |
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gpios = <&gpio0 2 1>; /* active low */ |
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label = "tp-link:blue:system"; |
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}; |
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usb1 { |
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gpios = <&gpio0 3 1>; /* active low */ |
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label = "tp-link:green:usb1"; |
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}; |
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usb2 { |
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gpios = <&gpio0 4 1>; /* active low */ |
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label = "tp-link:green:usb2"; |
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}; |
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}; |
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buttons { |
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compatible = "gpio-keys"; |
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reset { |
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label = "Reset button"; |
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gpios = <&gpio0 5 1>; /* active low */ |
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linux,code = <0x198>; /* KEY_RESTART */ |
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}; |
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}; |
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}; |
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/include/ "fsl/p1010si-post.dtsi" |
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@ -0,0 +1,145 @@ |
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/*
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* TL-WDR4900 v1 board setup |
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* |
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* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org> |
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* |
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* Based on: |
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* p1010rdb.c: |
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* P1010RDB Board Setup |
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* Copyright 2011 Freescale Semiconductor Inc. |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License as published by the |
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* Free Software Foundation; either version 2 of the License, or (at your |
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* option) any later version. |
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*/ |
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#include <linux/stddef.h> |
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#include <linux/kernel.h> |
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#include <linux/pci.h> |
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#include <linux/delay.h> |
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#include <linux/interrupt.h> |
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#include <linux/of_platform.h> |
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#include <linux/ath9k_platform.h> |
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#include <linux/leds.h> |
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#include <asm/time.h> |
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#include <asm/machdep.h> |
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#include <asm/pci-bridge.h> |
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#include <mm/mmu_decl.h> |
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#include <asm/prom.h> |
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#include <asm/udbg.h> |
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#include <asm/mpic.h> |
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#include <sysdev/fsl_soc.h> |
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#include <sysdev/fsl_pci.h> |
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#include "mpc85xx.h" |
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void __init tl_wdr4900_v1_pic_init(void) |
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{ |
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struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | |
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MPIC_SINGLE_DEST_CPU, |
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0, 256, " OpenPIC "); |
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BUG_ON(mpic == NULL); |
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mpic_init(mpic); |
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} |
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#ifdef CONFIG_PCI |
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static struct gpio_led tl_wdr4900_v1_wmac_leds_gpio[] = { |
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{ |
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.name = "tp-link:blue:wps", |
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.gpio = 1, |
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.active_low = 1, |
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}, |
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}; |
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static struct ath9k_platform_data tl_wdr4900_v1_wmac0_data = { |
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.led_pin = 0, |
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.eeprom_name = "pci_wmac0.eeprom", |
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.leds = tl_wdr4900_v1_wmac_leds_gpio, |
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.num_leds = ARRAY_SIZE(tl_wdr4900_v1_wmac_leds_gpio), |
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}; |
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static struct ath9k_platform_data tl_wdr4900_v1_wmac1_data = { |
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.led_pin = 0, |
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.eeprom_name = "pci_wmac1.eeprom", |
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}; |
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static void tl_wdr4900_v1_pci_wmac_fixup(struct pci_dev *dev) |
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{ |
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if (!machine_is(tl_wdr4900_v1)) |
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return; |
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if (dev->bus->number == 1 && |
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PCI_SLOT(dev->devfn) == 0) { |
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dev->dev.platform_data = &tl_wdr4900_v1_wmac0_data; |
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return; |
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} |
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if (dev->bus->number == 3 && |
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PCI_SLOT(dev->devfn) == 0 && |
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dev->device == 0xabcd) { |
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dev->dev.platform_data = &tl_wdr4900_v1_wmac1_data; |
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/*
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* The PCI header of the AR9381 chip is not programmed |
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* correctly by the bootloader and the device uses wrong |
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* data due to that. Replace the broken values with the |
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* correct ones. |
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*/ |
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dev->device = 0x30; |
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dev->class = 0x028000; |
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pr_info("pci %s: AR9381 fixup applied\n", pci_name(dev)); |
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} |
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} |
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, |
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tl_wdr4900_v1_pci_wmac_fixup); |
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#endif /* CONFIG_PCI */ |
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/*
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* Setup the architecture |
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*/ |
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static void __init tl_wdr4900_v1_setup_arch(void) |
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{ |
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if (ppc_md.progress) |
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ppc_md.progress("tl_wdr4900_v1_setup_arch()", 0); |
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fsl_pci_assign_primary(); |
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printk(KERN_INFO "TL-WDR4900 v1 board from TP-Link\n"); |
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} |
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machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices); |
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machine_arch_initcall(tl_wdr4900_v1, swiotlb_setup_bus_notifier); |
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/*
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* Called very early, device-tree isn't unflattened |
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*/ |
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static int __init tl_wdr4900_v1_probe(void) |
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{ |
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unsigned long root = of_get_flat_dt_root(); |
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if (of_flat_dt_is_compatible(root, "tp-link,TL-WDR4900v1")) |
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return 1; |
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return 0; |
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} |
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define_machine(tl_wdr4900_v1) { |
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.name = "Freescale P1014", |
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.probe = tl_wdr4900_v1_probe, |
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.setup_arch = tl_wdr4900_v1_setup_arch, |
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.init_IRQ = tl_wdr4900_v1_pic_init, |
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#ifdef CONFIG_PCI |
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus, |
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#endif |
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.get_irq = mpic_get_irq, |
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.restart = fsl_rstcr_restart, |
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.calibrate_decr = generic_calibrate_decr, |
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.progress = udbg_progress, |
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}; |
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@ -1,48 +0,0 @@ |
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From 1c20a5420c2602e2438209f34a633eae377eda5e Mon Sep 17 00:00:00 2001
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From: Heiner Kallweit <hkallweit1@gmail.com>
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Date: Thu, 19 Feb 2015 23:43:32 +0100
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Subject: [PATCH] mpc85xx: add mpic timer clock frequency
|
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|
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MPIC timers are enabled in the config, however a devicetree clock setting
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is missing causing the following error:
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/soc@ffe00000/timer@41100: cannot get timer frequency.
|
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/soc@ffe00000/timer@42100: cannot get timer frequency.
|
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|
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This patch adds the missing clock and avoids the error.
|
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It's a functional copy of this code
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do_fixup_by_compat_u32(blob, "fsl,mpic",
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"clock-frequency", get_bus_freq(0), 1);
|
||||
in arch/powerpc/cpu/mpc85xx/fdt.c in the u-boot code.
|
||||
|
||||
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
|
||||
---
|
||||
arch/powerpc/boot/cuboot-tl-wdr4900-v1.c | 6 +++++-
|
||||
1 file changed, 5 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
|
||||
index 095e777..17459ef 100644
|
||||
--- a/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
|
||||
+++ b/arch/powerpc/boot/cuboot-tl-wdr4900-v1.c
|
||||
@@ -119,7 +119,7 @@ static void process_boot_dtb(void *boot_dtb)
|
||||
|
||||
static void platform_fixups(void)
|
||||
{
|
||||
- void *soc;
|
||||
+ void *soc, *mpic;
|
||||
|
||||
dt_fixup_memory(0, mem_size);
|
||||
|
||||
@@ -144,6 +144,10 @@ static void platform_fixups(void)
|
||||
sizeof(bus_freq));
|
||||
}
|
||||
}
|
||||
+
|
||||
+ mpic = find_node_by_compatible(NULL, "fsl,mpic");
|
||||
+ if (mpic)
|
||||
+ setprop(mpic, "clock-frequency", &bus_freq, sizeof(bus_freq));
|
||||
}
|
||||
|
||||
void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
|
||||
--
|
||||
2.3.0
|
||||
|
||||
Loading…
Reference in new issue