From b7bc4ccab2fc4eba0d365378f8d48261d8f7d96c Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 8 Oct 2009 17:23:59 +0000 Subject: [PATCH] add support for the hardware random number generator SVN-Revision: 18004 --- target/linux/octeon/config-default | 3 +- .../octeon/patches/016-octeon_hw_rng.patch | 351 ++++++++++++++++++ 2 files changed, 353 insertions(+), 1 deletion(-) create mode 100644 target/linux/octeon/patches/016-octeon_hw_rng.patch diff --git a/target/linux/octeon/config-default b/target/linux/octeon/config-default index 6f18b30569..90389f83ae 100644 --- a/target/linux/octeon/config-default +++ b/target/linux/octeon/config-default @@ -140,7 +140,8 @@ CONFIG_HAVE_SYSCALL_WRAPPERS=y # CONFIG_HECI is not set # CONFIG_HIGH_RES_TIMERS is not set CONFIG_HW_HAS_PCI=y -# CONFIG_HW_RANDOM is not set +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OCTEON=y CONFIG_HZ=250 # CONFIG_HZ_100 is not set CONFIG_HZ_250=y diff --git a/target/linux/octeon/patches/016-octeon_hw_rng.patch b/target/linux/octeon/patches/016-octeon_hw_rng.patch new file mode 100644 index 0000000000..65afe7705a --- /dev/null +++ b/target/linux/octeon/patches/016-octeon_hw_rng.patch @@ -0,0 +1,351 @@ +From: David Daney +Date: Thu, 20 Aug 2009 21:10:22 +0000 (-0700) +Subject: MIPS: Octeon: Add hardware RNG platform device. +X-Git-Tag: linux-2.6.32-rc1~34 +X-Git-Url: http://www.linux-mips.org/git?p=linux.git;a=commitdiff_plain;h=c691b963;hp=a68577bc6ce2b5e422cdb7a993b1c07cc410e02a + +MIPS: Octeon: Add hardware RNG platform device. + +Add a platform device for the Octeon Random Number Generator (RNG). + +Signed-off-by: David Daney +Acked-by: Herbert Xu +Signed-off-by: Ralf Baechle +--- + +Index: linux-2.6.30.8/arch/mips/cavium-octeon/setup.c +=================================================================== +--- linux-2.6.30.8.orig/arch/mips/cavium-octeon/setup.c 2009-09-24 17:28:02.000000000 +0200 ++++ linux-2.6.30.8/arch/mips/cavium-octeon/setup.c 2009-10-08 13:10:09.000000000 +0200 +@@ -32,6 +32,7 @@ + #include + + #include ++#include + + #ifdef CONFIG_CAVIUM_DECODE_RSL + extern void cvmx_interrupt_rsl_decode(void); +@@ -925,3 +926,45 @@ + return ret; + } + device_initcall(octeon_cf_device_init); ++ ++/* Octeon Random Number Generator. */ ++static int __init octeon_rng_device_init(void) ++{ ++ struct platform_device *pd; ++ int ret = 0; ++ ++ struct resource rng_resources[] = { ++ { ++ .flags = IORESOURCE_MEM, ++ .start = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS), ++ .end = XKPHYS_TO_PHYS(CVMX_RNM_CTL_STATUS) + 0xf ++ }, { ++ .flags = IORESOURCE_MEM, ++ .start = cvmx_build_io_address(8, 0), ++ .end = cvmx_build_io_address(8, 0) + 0x7 ++ } ++ }; ++ ++ pd = platform_device_alloc("octeon_rng", -1); ++ if (!pd) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ ret = platform_device_add_resources(pd, rng_resources, ++ ARRAY_SIZE(rng_resources)); ++ if (ret) ++ goto fail; ++ ++ ret = platform_device_add(pd); ++ if (ret) ++ goto fail; ++ ++ return ret; ++fail: ++ platform_device_put(pd); ++ ++out: ++ return ret; ++} ++device_initcall(octeon_rng_device_init); +Index: linux-2.6.30.8/arch/mips/include/asm/octeon/cvmx-rnm-defs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.30.8/arch/mips/include/asm/octeon/cvmx-rnm-defs.h 2009-10-08 13:10:09.000000000 +0200 +@@ -0,0 +1,88 @@ ++/***********************license start*************** ++ * Author: Cavium Networks ++ * ++ * Contact: support@caviumnetworks.com ++ * This file is part of the OCTEON SDK ++ * ++ * Copyright (c) 2003-2008 Cavium Networks ++ * ++ * This file is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License, Version 2, as ++ * published by the Free Software Foundation. ++ * ++ * This file is distributed in the hope that it will be useful, but ++ * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty ++ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or ++ * NONINFRINGEMENT. See the GNU General Public License for more ++ * details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this file; if not, write to the Free Software ++ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ++ * or visit http://www.gnu.org/licenses/. ++ * ++ * This file may also be available under a different license from Cavium. ++ * Contact Cavium Networks for more information ++ ***********************license end**************************************/ ++ ++#ifndef __CVMX_RNM_DEFS_H__ ++#define __CVMX_RNM_DEFS_H__ ++ ++#include ++ ++#define CVMX_RNM_BIST_STATUS \ ++ CVMX_ADD_IO_SEG(0x0001180040000008ull) ++#define CVMX_RNM_CTL_STATUS \ ++ CVMX_ADD_IO_SEG(0x0001180040000000ull) ++ ++union cvmx_rnm_bist_status { ++ uint64_t u64; ++ struct cvmx_rnm_bist_status_s { ++ uint64_t reserved_2_63:62; ++ uint64_t rrc:1; ++ uint64_t mem:1; ++ } s; ++ struct cvmx_rnm_bist_status_s cn30xx; ++ struct cvmx_rnm_bist_status_s cn31xx; ++ struct cvmx_rnm_bist_status_s cn38xx; ++ struct cvmx_rnm_bist_status_s cn38xxp2; ++ struct cvmx_rnm_bist_status_s cn50xx; ++ struct cvmx_rnm_bist_status_s cn52xx; ++ struct cvmx_rnm_bist_status_s cn52xxp1; ++ struct cvmx_rnm_bist_status_s cn56xx; ++ struct cvmx_rnm_bist_status_s cn56xxp1; ++ struct cvmx_rnm_bist_status_s cn58xx; ++ struct cvmx_rnm_bist_status_s cn58xxp1; ++}; ++ ++union cvmx_rnm_ctl_status { ++ uint64_t u64; ++ struct cvmx_rnm_ctl_status_s { ++ uint64_t reserved_9_63:55; ++ uint64_t ent_sel:4; ++ uint64_t exp_ent:1; ++ uint64_t rng_rst:1; ++ uint64_t rnm_rst:1; ++ uint64_t rng_en:1; ++ uint64_t ent_en:1; ++ } s; ++ struct cvmx_rnm_ctl_status_cn30xx { ++ uint64_t reserved_4_63:60; ++ uint64_t rng_rst:1; ++ uint64_t rnm_rst:1; ++ uint64_t rng_en:1; ++ uint64_t ent_en:1; ++ } cn30xx; ++ struct cvmx_rnm_ctl_status_cn30xx cn31xx; ++ struct cvmx_rnm_ctl_status_cn30xx cn38xx; ++ struct cvmx_rnm_ctl_status_cn30xx cn38xxp2; ++ struct cvmx_rnm_ctl_status_s cn50xx; ++ struct cvmx_rnm_ctl_status_s cn52xx; ++ struct cvmx_rnm_ctl_status_s cn52xxp1; ++ struct cvmx_rnm_ctl_status_s cn56xx; ++ struct cvmx_rnm_ctl_status_s cn56xxp1; ++ struct cvmx_rnm_ctl_status_s cn58xx; ++ struct cvmx_rnm_ctl_status_s cn58xxp1; ++}; ++ ++#endif +Index: linux-2.6.30.8/drivers/char/hw_random/Kconfig +=================================================================== +--- linux-2.6.30.8.orig/drivers/char/hw_random/Kconfig 2009-09-24 17:28:02.000000000 +0200 ++++ linux-2.6.30.8/drivers/char/hw_random/Kconfig 2009-10-08 13:10:09.000000000 +0200 +@@ -126,6 +126,19 @@ + + If unsure, say Y. + ++config HW_RANDOM_OCTEON ++ tristate "Octeon Random Number Generator support" ++ depends on HW_RANDOM && CPU_CAVIUM_OCTEON ++ default HW_RANDOM ++ ---help--- ++ This driver provides kernel-side support for the Random Number ++ Generator hardware found on Octeon processors. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called octeon-rng. ++ ++ If unsure, say Y. ++ + config HW_RANDOM_PASEMI + tristate "PA Semi HW Random Number Generator support" + depends on HW_RANDOM && PPC_PASEMI +Index: linux-2.6.30.8/drivers/char/hw_random/Makefile +=================================================================== +--- linux-2.6.30.8.orig/drivers/char/hw_random/Makefile 2009-09-24 17:28:02.000000000 +0200 ++++ linux-2.6.30.8/drivers/char/hw_random/Makefile 2009-10-08 13:10:23.000000000 +0200 +@@ -15,3 +15,4 @@ + obj-$(CONFIG_HW_RANDOM_OMAP) += omap-rng.o + obj-$(CONFIG_HW_RANDOM_PASEMI) += pasemi-rng.o + obj-$(CONFIG_HW_RANDOM_VIRTIO) += virtio-rng.o ++obj-$(CONFIG_HW_RANDOM_OCTEON) += octeon-rng.o +Index: linux-2.6.30.8/drivers/char/hw_random/octeon-rng.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.30.8/drivers/char/hw_random/octeon-rng.c 2009-10-08 13:10:09.000000000 +0200 +@@ -0,0 +1,147 @@ ++/* ++ * Hardware Random Number Generator support for Cavium Networks ++ * Octeon processor family. ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2009 Cavium Networks ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct octeon_rng { ++ struct hwrng ops; ++ void __iomem *control_status; ++ void __iomem *result; ++}; ++ ++static int octeon_rng_init(struct hwrng *rng) ++{ ++ union cvmx_rnm_ctl_status ctl; ++ struct octeon_rng *p = container_of(rng, struct octeon_rng, ops); ++ ++ ctl.u64 = 0; ++ ctl.s.ent_en = 1; /* Enable the entropy source. */ ++ ctl.s.rng_en = 1; /* Enable the RNG hardware. */ ++ cvmx_write_csr((u64)p->control_status, ctl.u64); ++ return 0; ++} ++ ++static void octeon_rng_cleanup(struct hwrng *rng) ++{ ++ union cvmx_rnm_ctl_status ctl; ++ struct octeon_rng *p = container_of(rng, struct octeon_rng, ops); ++ ++ ctl.u64 = 0; ++ /* Disable everything. */ ++ cvmx_write_csr((u64)p->control_status, ctl.u64); ++} ++ ++static int octeon_rng_data_read(struct hwrng *rng, u32 *data) ++{ ++ struct octeon_rng *p = container_of(rng, struct octeon_rng, ops); ++ ++ *data = cvmx_read64_uint32((u64)p->result); ++ return sizeof(u32); ++} ++ ++static int __devinit octeon_rng_probe(struct platform_device *pdev) ++{ ++ struct resource *res_ports; ++ struct resource *res_result; ++ struct octeon_rng *rng; ++ int ret; ++ struct hwrng ops = { ++ .name = "octeon", ++ .init = octeon_rng_init, ++ .cleanup = octeon_rng_cleanup, ++ .data_read = octeon_rng_data_read ++ }; ++ ++ rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL); ++ if (!rng) ++ return -ENOMEM; ++ ++ res_ports = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res_ports) ++ goto err_ports; ++ ++ res_result = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!res_result) ++ goto err_ports; ++ ++ ++ rng->control_status = devm_ioremap_nocache(&pdev->dev, ++ res_ports->start, ++ sizeof(u64)); ++ if (!rng->control_status) ++ goto err_ports; ++ ++ rng->result = devm_ioremap_nocache(&pdev->dev, ++ res_result->start, ++ sizeof(u64)); ++ if (!rng->result) ++ goto err_r; ++ ++ rng->ops = ops; ++ ++ dev_set_drvdata(&pdev->dev, &rng->ops); ++ ret = hwrng_register(&rng->ops); ++ if (ret) ++ goto err; ++ ++ dev_info(&pdev->dev, "Octeon Random Number Generator\n"); ++ ++ return 0; ++err: ++ devm_iounmap(&pdev->dev, rng->control_status); ++err_r: ++ devm_iounmap(&pdev->dev, rng->result); ++err_ports: ++ devm_kfree(&pdev->dev, rng); ++ return -ENOENT; ++} ++ ++static int __exit octeon_rng_remove(struct platform_device *pdev) ++{ ++ struct hwrng *rng = dev_get_drvdata(&pdev->dev); ++ ++ hwrng_unregister(rng); ++ ++ return 0; ++} ++ ++static struct platform_driver octeon_rng_driver = { ++ .driver = { ++ .name = "octeon_rng", ++ .owner = THIS_MODULE, ++ }, ++ .probe = octeon_rng_probe, ++ .remove = __exit_p(octeon_rng_remove), ++}; ++ ++static int __init octeon_rng_mod_init(void) ++{ ++ return platform_driver_register(&octeon_rng_driver); ++} ++ ++static void __exit octeon_rng_mod_exit(void) ++{ ++ platform_driver_unregister(&octeon_rng_driver); ++} ++ ++module_init(octeon_rng_mod_init); ++module_exit(octeon_rng_mod_exit); ++ ++MODULE_AUTHOR("David Daney"); ++MODULE_LICENSE("GPL");