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/*
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Broadcom B43 wireless driver |
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PIO data transfer |
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Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de> |
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This program is free software; you can redistribute it and/or modify |
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it under the terms of the GNU General Public License as published by |
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the Free Software Foundation; either version 2 of the License, or |
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(at your option) any later version. |
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU General Public License for more details. |
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You should have received a copy of the GNU General Public License |
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along with this program; see the file COPYING. If not, write to |
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the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor, |
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Boston, MA 02110-1301, USA. |
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*/ |
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#include "b43.h" |
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#include "pio.h" |
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#include "dma.h" |
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#include "main.h" |
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#include "xmit.h" |
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#include <linux/delay.h> |
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static void b43_pio_rx_work(struct work_struct *work); |
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static u16 generate_cookie(struct b43_pio_txqueue *q, |
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struct b43_pio_txpacket *pack) |
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{ |
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u16 cookie; |
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/* Use the upper 4 bits of the cookie as
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* PIO controller ID and store the packet index number |
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* in the lower 12 bits. |
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* Note that the cookie must never be 0, as this |
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* is a special value used in RX path. |
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* It can also not be 0xFFFF because that is special |
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* for multicast frames. |
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*/ |
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cookie = (((u16)q->index + 1) << 12); |
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cookie |= pack->index; |
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return cookie; |
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} |
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static |
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struct b43_pio_txqueue * parse_cookie(struct b43_wldev *dev, |
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u16 cookie, |
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struct b43_pio_txpacket **pack) |
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{ |
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struct b43_pio *pio = &dev->pio; |
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struct b43_pio_txqueue *q = NULL; |
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unsigned int pack_index; |
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switch (cookie & 0xF000) { |
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case 0x1000: |
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q = pio->tx_queue_AC_BK; |
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break; |
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case 0x2000: |
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q = pio->tx_queue_AC_BE; |
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break; |
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case 0x3000: |
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q = pio->tx_queue_AC_VI; |
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break; |
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case 0x4000: |
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q = pio->tx_queue_AC_VO; |
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break; |
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case 0x5000: |
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q = pio->tx_queue_mcast; |
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break; |
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} |
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if (B43_WARN_ON(!q)) |
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return NULL; |
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pack_index = (cookie & 0x0FFF); |
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if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets))) |
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return NULL; |
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*pack = &q->packets[pack_index]; |
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return q; |
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} |
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static u16 index_to_pioqueue_base(struct b43_wldev *dev, |
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unsigned int index) |
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{ |
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static const u16 bases[] = { |
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B43_MMIO_PIO_BASE0, |
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B43_MMIO_PIO_BASE1, |
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B43_MMIO_PIO_BASE2, |
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B43_MMIO_PIO_BASE3, |
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B43_MMIO_PIO_BASE4, |
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B43_MMIO_PIO_BASE5, |
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B43_MMIO_PIO_BASE6, |
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B43_MMIO_PIO_BASE7, |
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}; |
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static const u16 bases_rev11[] = { |
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B43_MMIO_PIO11_BASE0, |
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B43_MMIO_PIO11_BASE1, |
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B43_MMIO_PIO11_BASE2, |
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B43_MMIO_PIO11_BASE3, |
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B43_MMIO_PIO11_BASE4, |
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B43_MMIO_PIO11_BASE5, |
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}; |
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if (dev->dev->id.revision >= 11) { |
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B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11)); |
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return bases_rev11[index]; |
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} |
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B43_WARN_ON(index >= ARRAY_SIZE(bases)); |
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return bases[index]; |
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} |
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static u16 pio_txqueue_offset(struct b43_wldev *dev) |
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{ |
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if (dev->dev->id.revision >= 11) |
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return 0x18; |
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return 0; |
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} |
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static u16 pio_rxqueue_offset(struct b43_wldev *dev) |
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{ |
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if (dev->dev->id.revision >= 11) |
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return 0x38; |
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return 8; |
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} |
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static struct b43_pio_txqueue * b43_setup_pioqueue_tx(struct b43_wldev *dev, |
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unsigned int index) |
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{ |
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struct b43_pio_txqueue *q; |
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struct b43_pio_txpacket *p; |
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unsigned int i; |
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q = kzalloc(sizeof(*q), GFP_KERNEL); |
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if (!q) |
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return NULL; |
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spin_lock_init(&q->lock); |
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q->dev = dev; |
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q->rev = dev->dev->id.revision; |
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q->mmio_base = index_to_pioqueue_base(dev, index) + |
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pio_txqueue_offset(dev); |
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q->index = index; |
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q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS; |
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if (q->rev >= 8) { |
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q->buffer_size = 1920; //FIXME this constant is wrong.
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} else { |
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q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE); |
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q->buffer_size -= 80; |
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} |
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INIT_LIST_HEAD(&q->packets_list); |
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for (i = 0; i < ARRAY_SIZE(q->packets); i++) { |
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p = &(q->packets[i]); |
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INIT_LIST_HEAD(&p->list); |
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p->index = i; |
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p->queue = q; |
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list_add(&p->list, &q->packets_list); |
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} |
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return q; |
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} |
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static struct b43_pio_rxqueue * b43_setup_pioqueue_rx(struct b43_wldev *dev, |
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unsigned int index) |
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{ |
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struct b43_pio_rxqueue *q; |
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q = kzalloc(sizeof(*q), GFP_KERNEL); |
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if (!q) |
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return NULL; |
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spin_lock_init(&q->lock); |
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q->dev = dev; |
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q->rev = dev->dev->id.revision; |
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q->mmio_base = index_to_pioqueue_base(dev, index) + |
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pio_rxqueue_offset(dev); |
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INIT_WORK(&q->rx_work, b43_pio_rx_work); |
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/* Enable Direct FIFO RX (PIO) on the engine. */ |
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b43_dma_direct_fifo_rx(dev, index, 1); |
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return q; |
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} |
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static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q) |
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{ |
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struct b43_pio_txpacket *pack; |
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unsigned int i; |
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for (i = 0; i < ARRAY_SIZE(q->packets); i++) { |
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pack = &(q->packets[i]); |
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if (pack->skb) { |
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dev_kfree_skb_any(pack->skb); |
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pack->skb = NULL; |
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} |
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} |
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} |
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static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q, |
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const char *name) |
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{ |
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if (!q) |
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return; |
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b43_pio_cancel_tx_packets(q); |
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kfree(q); |
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} |
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static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q, |
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const char *name) |
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{ |
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if (!q) |
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return; |
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kfree(q); |
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} |
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#define destroy_queue_tx(pio, queue) do { \ |
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b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
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(pio)->queue = NULL; \
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} while (0) |
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#define destroy_queue_rx(pio, queue) do { \ |
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b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
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(pio)->queue = NULL; \
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} while (0) |
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void b43_pio_free(struct b43_wldev *dev) |
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{ |
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struct b43_pio *pio; |
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if (!b43_using_pio_transfers(dev)) |
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return; |
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pio = &dev->pio; |
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destroy_queue_rx(pio, rx_queue); |
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destroy_queue_tx(pio, tx_queue_mcast); |
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destroy_queue_tx(pio, tx_queue_AC_VO); |
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destroy_queue_tx(pio, tx_queue_AC_VI); |
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destroy_queue_tx(pio, tx_queue_AC_BE); |
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destroy_queue_tx(pio, tx_queue_AC_BK); |
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} |
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void b43_pio_stop(struct b43_wldev *dev) |
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{ |
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if (!b43_using_pio_transfers(dev)) |
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return; |
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cancel_work_sync(&dev->pio.rx_queue->rx_work); |
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} |
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int b43_pio_init(struct b43_wldev *dev) |
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{ |
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struct b43_pio *pio = &dev->pio; |
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int err = -ENOMEM; |
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b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL) |
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& ~B43_MACCTL_BE); |
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b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0); |
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pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0); |
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if (!pio->tx_queue_AC_BK) |
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goto out; |
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pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1); |
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if (!pio->tx_queue_AC_BE) |
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goto err_destroy_bk; |
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pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2); |
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if (!pio->tx_queue_AC_VI) |
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goto err_destroy_be; |
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pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3); |
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if (!pio->tx_queue_AC_VO) |
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goto err_destroy_vi; |
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pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4); |
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if (!pio->tx_queue_mcast) |
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goto err_destroy_vo; |
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pio->rx_queue = b43_setup_pioqueue_rx(dev, 0); |
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if (!pio->rx_queue) |
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goto err_destroy_mcast; |
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b43dbg(dev->wl, "PIO initialized\n"); |
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err = 0; |
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out: |
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return err; |
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err_destroy_mcast: |
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destroy_queue_tx(pio, tx_queue_mcast); |
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err_destroy_vo: |
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destroy_queue_tx(pio, tx_queue_AC_VO); |
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err_destroy_vi: |
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destroy_queue_tx(pio, tx_queue_AC_VI); |
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err_destroy_be: |
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destroy_queue_tx(pio, tx_queue_AC_BE); |
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err_destroy_bk: |
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destroy_queue_tx(pio, tx_queue_AC_BK); |
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return err; |
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} |
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/* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */ |
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static struct b43_pio_txqueue * select_queue_by_priority(struct b43_wldev *dev, |
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u8 queue_prio) |
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{ |
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struct b43_pio_txqueue *q; |
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if (b43_modparam_qos) { |
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/* 0 = highest priority */ |
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switch (queue_prio) { |
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default: |
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B43_WARN_ON(1); |
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/* fallthrough */ |
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case 0: |
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q = dev->pio.tx_queue_AC_VO; |
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break; |
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case 1: |
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q = dev->pio.tx_queue_AC_VI; |
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break; |
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case 2: |
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q = dev->pio.tx_queue_AC_BE; |
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break; |
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case 3: |
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q = dev->pio.tx_queue_AC_BK; |
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break; |
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} |
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} else |
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q = dev->pio.tx_queue_AC_BE; |
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return q; |
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} |
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static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q, |
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u16 ctl, |
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const void *_data, |
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unsigned int data_len) |
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{ |
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struct b43_wldev *dev = q->dev; |
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const u8 *data = _data; |
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ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI; |
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b43_piotx_write16(q, B43_PIO_TXCTL, ctl); |
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ssb_block_write(dev->dev, data, (data_len & ~1), |
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q->mmio_base + B43_PIO_TXDATA, |
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sizeof(u16)); |
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if (data_len & 1) { |
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/* Write the last byte. */ |
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ctl &= ~B43_PIO_TXCTL_WRITEHI; |
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b43_piotx_write16(q, B43_PIO_TXCTL, ctl); |
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b43_piotx_write16(q, B43_PIO_TXDATA, data[data_len - 1]); |
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} |
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return ctl; |
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} |
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static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack, |
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const u8 *hdr, unsigned int hdrlen) |
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{ |
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struct b43_pio_txqueue *q = pack->queue; |
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const char *frame = pack->skb->data; |
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unsigned int frame_len = pack->skb->len; |
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u16 ctl; |
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ctl = b43_piotx_read16(q, B43_PIO_TXCTL); |
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ctl |= B43_PIO_TXCTL_FREADY; |
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ctl &= ~B43_PIO_TXCTL_EOF; |
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/* Transfer the header data. */ |
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ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen); |
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/* Transfer the frame data. */ |
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ctl = tx_write_2byte_queue(q, ctl, frame, frame_len); |
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ctl |= B43_PIO_TXCTL_EOF; |
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b43_piotx_write16(q, B43_PIO_TXCTL, ctl); |
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} |
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static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q, |
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u32 ctl, |
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const void *_data, |
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unsigned int data_len) |
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{ |
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struct b43_wldev *dev = q->dev; |
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const u8 *data = _data; |
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ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 | |
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B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31; |
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b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); |
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ssb_block_write(dev->dev, data, (data_len & ~3), |
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q->mmio_base + B43_PIO8_TXDATA, |
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sizeof(u32)); |
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if (data_len & 3) { |
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u32 value = 0; |
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/* Write the last few bytes. */ |
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ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 | |
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B43_PIO8_TXCTL_24_31); |
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data = &(data[data_len - 1]); |
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switch (data_len & 3) { |
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case 3: |
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ctl |= B43_PIO8_TXCTL_16_23; |
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value |= (u32)(*data) << 16; |
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data--; |
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case 2: |
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ctl |= B43_PIO8_TXCTL_8_15; |
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value |= (u32)(*data) << 8; |
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data--; |
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case 1: |
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value |= (u32)(*data); |
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} |
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b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); |
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b43_piotx_write32(q, B43_PIO8_TXDATA, value); |
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} |
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return ctl; |
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} |
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static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack, |
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const u8 *hdr, unsigned int hdrlen) |
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{ |
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struct b43_pio_txqueue *q = pack->queue; |
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const char *frame = pack->skb->data; |
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unsigned int frame_len = pack->skb->len; |
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u32 ctl; |
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ctl = b43_piotx_read32(q, B43_PIO8_TXCTL); |
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ctl |= B43_PIO8_TXCTL_FREADY; |
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ctl &= ~B43_PIO8_TXCTL_EOF; |
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/* Transfer the header data. */ |
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ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen); |
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/* Transfer the frame data. */ |
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ctl = tx_write_4byte_queue(q, ctl, frame, frame_len); |
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ctl |= B43_PIO8_TXCTL_EOF; |
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b43_piotx_write32(q, B43_PIO_TXCTL, ctl); |
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} |
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static int pio_tx_frame(struct b43_pio_txqueue *q, |
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struct sk_buff *skb) |
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{ |
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struct b43_pio_txpacket *pack; |
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struct b43_txhdr txhdr; |
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u16 cookie; |
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int err; |
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unsigned int hdrlen; |
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
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B43_WARN_ON(list_empty(&q->packets_list)); |
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pack = list_entry(q->packets_list.next, |
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struct b43_pio_txpacket, list); |
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cookie = generate_cookie(q, pack); |
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hdrlen = b43_txhdr_size(q->dev); |
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err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb->data, |
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skb->len, info, cookie); |
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if (err) |
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return err; |
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if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) { |
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/* Tell the firmware about the cookie of the last
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* mcast frame, so it can clear the more-data bit in it. */ |
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b43_shm_write16(q->dev, B43_SHM_SHARED, |
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B43_SHM_SH_MCASTCOOKIE, cookie); |
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} |
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pack->skb = skb; |
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if (q->rev >= 8) |
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pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen); |
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else |
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pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen); |
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/* Remove it from the list of available packet slots.
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* It will be put back when we receive the status report. */ |
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list_del(&pack->list); |
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/* Update the queue statistics. */ |
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q->buffer_used += roundup(skb->len + hdrlen, 4); |
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q->free_packet_slots -= 1; |
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|
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return 0; |
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} |
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|
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int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb) |
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{ |
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struct b43_pio_txqueue *q; |
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struct ieee80211_hdr *hdr; |
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unsigned long flags; |
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unsigned int hdrlen, total_len; |
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int err = 0; |
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struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
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|
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hdr = (struct ieee80211_hdr *)skb->data; |
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|
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if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) { |
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/* The multicast queue will be sent after the DTIM. */ |
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q = dev->pio.tx_queue_mcast; |
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/* Set the frame More-Data bit. Ucode will clear it
|
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* for us on the last frame. */ |
||||
hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA); |
||||
} else { |
||||
/* Decide by priority where to put this frame. */ |
||||
q = select_queue_by_priority(dev, skb_get_queue_mapping(skb)); |
||||
} |
||||
|
||||
spin_lock_irqsave(&q->lock, flags); |
||||
|
||||
hdrlen = b43_txhdr_size(dev); |
||||
total_len = roundup(skb->len + hdrlen, 4); |
||||
|
||||
if (unlikely(total_len > q->buffer_size)) { |
||||
err = -ENOBUFS; |
||||
b43dbg(dev->wl, "PIO: TX packet longer than queue.\n"); |
||||
goto out_unlock; |
||||
} |
||||
if (unlikely(q->free_packet_slots == 0)) { |
||||
err = -ENOBUFS; |
||||
b43warn(dev->wl, "PIO: TX packet overflow.\n"); |
||||
goto out_unlock; |
||||
} |
||||
B43_WARN_ON(q->buffer_used > q->buffer_size); |
||||
|
||||
if (total_len > (q->buffer_size - q->buffer_used)) { |
||||
/* Not enough memory on the queue. */ |
||||
err = -EBUSY; |
||||
ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb)); |
||||
q->stopped = 1; |
||||
goto out_unlock; |
||||
} |
||||
|
||||
/* Assign the queue number to the ring (if not already done before)
|
||||
* so TX status handling can use it. The mac80211-queue to b43-queue |
||||
* mapping is static, so we don't need to store it per frame. */ |
||||
q->queue_prio = skb_get_queue_mapping(skb); |
||||
|
||||
err = pio_tx_frame(q, skb); |
||||
if (unlikely(err == -ENOKEY)) { |
||||
/* Drop this packet, as we don't have the encryption key
|
||||
* anymore and must not transmit it unencrypted. */ |
||||
dev_kfree_skb_any(skb); |
||||
err = 0; |
||||
goto out_unlock; |
||||
} |
||||
if (unlikely(err)) { |
||||
b43err(dev->wl, "PIO transmission failure\n"); |
||||
goto out_unlock; |
||||
} |
||||
q->nr_tx_packets++; |
||||
|
||||
B43_WARN_ON(q->buffer_used > q->buffer_size); |
||||
if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) || |
||||
(q->free_packet_slots == 0)) { |
||||
/* The queue is full. */ |
||||
ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb)); |
||||
q->stopped = 1; |
||||
} |
||||
|
||||
out_unlock: |
||||
spin_unlock_irqrestore(&q->lock, flags); |
||||
|
||||
return err; |
||||
} |
||||
|
||||
/* Called with IRQs disabled. */ |
||||
void b43_pio_handle_txstatus(struct b43_wldev *dev, |
||||
const struct b43_txstatus *status) |
||||
{ |
||||
struct b43_pio_txqueue *q; |
||||
struct b43_pio_txpacket *pack = NULL; |
||||
unsigned int total_len; |
||||
struct ieee80211_tx_info *info; |
||||
|
||||
q = parse_cookie(dev, status->cookie, &pack); |
||||
if (unlikely(!q)) |
||||
return; |
||||
B43_WARN_ON(!pack); |
||||
|
||||
spin_lock(&q->lock); /* IRQs are already disabled. */ |
||||
|
||||
info = (void *)pack->skb; |
||||
memset(&info->status, 0, sizeof(info->status)); |
||||
|
||||
b43_fill_txstatus_report(info, status); |
||||
|
||||
total_len = pack->skb->len + b43_txhdr_size(dev); |
||||
total_len = roundup(total_len, 4); |
||||
q->buffer_used -= total_len; |
||||
q->free_packet_slots += 1; |
||||
|
||||
ieee80211_tx_status_irqsafe(dev->wl->hw, pack->skb); |
||||
pack->skb = NULL; |
||||
list_add(&pack->list, &q->packets_list); |
||||
|
||||
if (q->stopped) { |
||||
ieee80211_wake_queue(dev->wl->hw, q->queue_prio); |
||||
q->stopped = 0; |
||||
} |
||||
|
||||
spin_unlock(&q->lock); |
||||
} |
||||
|
||||
void b43_pio_get_tx_stats(struct b43_wldev *dev, |
||||
struct ieee80211_tx_queue_stats *stats) |
||||
{ |
||||
const int nr_queues = dev->wl->hw->queues; |
||||
struct b43_pio_txqueue *q; |
||||
unsigned long flags; |
||||
int i; |
||||
|
||||
for (i = 0; i < nr_queues; i++) { |
||||
q = select_queue_by_priority(dev, i); |
||||
|
||||
spin_lock_irqsave(&q->lock, flags); |
||||
stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots; |
||||
stats[i].limit = B43_PIO_MAX_NR_TXPACKETS; |
||||
stats[i].count = q->nr_tx_packets; |
||||
spin_unlock_irqrestore(&q->lock, flags); |
||||
} |
||||
} |
||||
|
||||
/* Returns whether we should fetch another frame. */ |
||||
static bool pio_rx_frame(struct b43_pio_rxqueue *q) |
||||
{ |
||||
struct b43_wldev *dev = q->dev; |
||||
struct b43_rxhdr_fw4 rxhdr; |
||||
u16 len; |
||||
u32 macstat; |
||||
unsigned int i, padding; |
||||
struct sk_buff *skb; |
||||
const char *err_msg = NULL; |
||||
|
||||
memset(&rxhdr, 0, sizeof(rxhdr)); |
||||
|
||||
/* Check if we have data and wait for it to get ready. */ |
||||
if (q->rev >= 8) { |
||||
u32 ctl; |
||||
|
||||
ctl = b43_piorx_read32(q, B43_PIO8_RXCTL); |
||||
if (!(ctl & B43_PIO8_RXCTL_FRAMERDY)) |
||||
return 0; |
||||
b43_piorx_write32(q, B43_PIO8_RXCTL, |
||||
B43_PIO8_RXCTL_FRAMERDY); |
||||
for (i = 0; i < 10; i++) { |
||||
ctl = b43_piorx_read32(q, B43_PIO8_RXCTL); |
||||
if (ctl & B43_PIO8_RXCTL_DATARDY) |
||||
goto data_ready; |
||||
udelay(10); |
||||
} |
||||
} else { |
||||
u16 ctl; |
||||
|
||||
ctl = b43_piorx_read16(q, B43_PIO_RXCTL); |
||||
if (!(ctl & B43_PIO_RXCTL_FRAMERDY)) |
||||
return 0; |
||||
b43_piorx_write16(q, B43_PIO_RXCTL, |
||||
B43_PIO_RXCTL_FRAMERDY); |
||||
for (i = 0; i < 10; i++) { |
||||
ctl = b43_piorx_read16(q, B43_PIO_RXCTL); |
||||
if (ctl & B43_PIO_RXCTL_DATARDY) |
||||
goto data_ready; |
||||
udelay(10); |
||||
} |
||||
} |
||||
b43dbg(q->dev->wl, "PIO RX timed out\n"); |
||||
return 1; |
||||
data_ready: |
||||
|
||||
/* Get the preamble (RX header) */ |
||||
if (q->rev >= 8) { |
||||
ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr), |
||||
q->mmio_base + B43_PIO8_RXDATA, |
||||
sizeof(u32)); |
||||
} else { |
||||
ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr), |
||||
q->mmio_base + B43_PIO_RXDATA, |
||||
sizeof(u16)); |
||||
} |
||||
/* Sanity checks. */ |
||||
len = le16_to_cpu(rxhdr.frame_len); |
||||
if (unlikely(len > 0x700)) { |
||||
err_msg = "len > 0x700"; |
||||
goto rx_error; |
||||
} |
||||
if (unlikely(len == 0)) { |
||||
err_msg = "len == 0"; |
||||
goto rx_error; |
||||
} |
||||
|
||||
macstat = le32_to_cpu(rxhdr.mac_status); |
||||
if (macstat & B43_RX_MAC_FCSERR) { |
||||
if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) { |
||||
/* Drop frames with failed FCS. */ |
||||
err_msg = "Frame FCS error"; |
||||
goto rx_error; |
||||
} |
||||
} |
||||
|
||||
/* We always pad 2 bytes, as that's what upstream code expects
|
||||
* due to the RX-header being 30 bytes. In case the frame is |
||||
* unaligned, we pad another 2 bytes. */ |
||||
padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0; |
||||
skb = dev_alloc_skb(len + padding + 2); |
||||
if (unlikely(!skb)) { |
||||
err_msg = "Out of memory"; |
||||
goto rx_error; |
||||
} |
||||
skb_reserve(skb, 2); |
||||
skb_put(skb, len + padding); |
||||
if (q->rev >= 8) { |
||||
ssb_block_read(dev->dev, skb->data + padding, (len & ~3), |
||||
q->mmio_base + B43_PIO8_RXDATA, |
||||
sizeof(u32)); |
||||
if (len & 3) { |
||||
u32 value; |
||||
char *data; |
||||
|
||||
/* Read the last few bytes. */ |
||||
value = b43_piorx_read32(q, B43_PIO8_RXDATA); |
||||
data = &(skb->data[len + padding - 1]); |
||||
switch (len & 3) { |
||||
case 3: |
||||
*data = (value >> 16); |
||||
data--; |
||||
case 2: |
||||
*data = (value >> 8); |
||||
data--; |
||||
case 1: |
||||
*data = value; |
||||
} |
||||
} |
||||
} else { |
||||
ssb_block_read(dev->dev, skb->data + padding, (len & ~1), |
||||
q->mmio_base + B43_PIO_RXDATA, |
||||
sizeof(u16)); |
||||
if (len & 1) { |
||||
u16 value; |
||||
|
||||
/* Read the last byte. */ |
||||
value = b43_piorx_read16(q, B43_PIO_RXDATA); |
||||
skb->data[len + padding - 1] = value; |
||||
} |
||||
} |
||||
|
||||
b43_rx(q->dev, skb, &rxhdr); |
||||
|
||||
return 1; |
||||
|
||||
rx_error: |
||||
if (err_msg) |
||||
b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg); |
||||
b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY); |
||||
return 1; |
||||
} |
||||
|
||||
/* RX workqueue. We can sleep, yay! */ |
||||
static void b43_pio_rx_work(struct work_struct *work) |
||||
{ |
||||
struct b43_pio_rxqueue *q = container_of(work, struct b43_pio_rxqueue, |
||||
rx_work); |
||||
unsigned int budget = 50; |
||||
bool stop; |
||||
|
||||
do { |
||||
spin_lock_irq(&q->lock); |
||||
stop = (pio_rx_frame(q) == 0); |
||||
spin_unlock_irq(&q->lock); |
||||
cond_resched(); |
||||
if (stop) |
||||
break; |
||||
} while (--budget); |
||||
} |
||||
|
||||
/* Called with IRQs disabled. */ |
||||
void b43_pio_rx(struct b43_pio_rxqueue *q) |
||||
{ |
||||
/* Due to latency issues we must run the RX path in
|
||||
* a workqueue to be able to schedule between packets. */ |
||||
queue_work(q->dev->wl->hw->workqueue, &q->rx_work); |
||||
} |
||||
|
||||
static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q) |
||||
{ |
||||
unsigned long flags; |
||||
|
||||
spin_lock_irqsave(&q->lock, flags); |
||||
if (q->rev >= 8) { |
||||
b43_piotx_write32(q, B43_PIO8_TXCTL, |
||||
b43_piotx_read32(q, B43_PIO8_TXCTL) |
||||
| B43_PIO8_TXCTL_SUSPREQ); |
||||
} else { |
||||
b43_piotx_write16(q, B43_PIO_TXCTL, |
||||
b43_piotx_read16(q, B43_PIO_TXCTL) |
||||
| B43_PIO_TXCTL_SUSPREQ); |
||||
} |
||||
spin_unlock_irqrestore(&q->lock, flags); |
||||
} |
||||
|
||||
static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q) |
||||
{ |
||||
unsigned long flags; |
||||
|
||||
spin_lock_irqsave(&q->lock, flags); |
||||
if (q->rev >= 8) { |
||||
b43_piotx_write32(q, B43_PIO8_TXCTL, |
||||
b43_piotx_read32(q, B43_PIO8_TXCTL) |
||||
& ~B43_PIO8_TXCTL_SUSPREQ); |
||||
} else { |
||||
b43_piotx_write16(q, B43_PIO_TXCTL, |
||||
b43_piotx_read16(q, B43_PIO_TXCTL) |
||||
& ~B43_PIO_TXCTL_SUSPREQ); |
||||
} |
||||
spin_unlock_irqrestore(&q->lock, flags); |
||||
} |
||||
|
||||
void b43_pio_tx_suspend(struct b43_wldev *dev) |
||||
{ |
||||
b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); |
||||
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK); |
||||
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE); |
||||
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI); |
||||
b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO); |
||||
b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast); |
||||
} |
||||
|
||||
void b43_pio_tx_resume(struct b43_wldev *dev) |
||||
{ |
||||
b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast); |
||||
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO); |
||||
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI); |
||||
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE); |
||||
b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK); |
||||
b43_power_saving_ctl_bits(dev, 0); |
||||
} |
@ -0,0 +1,216 @@ |
||||
#ifndef B43_PIO_H_ |
||||
#define B43_PIO_H_ |
||||
|
||||
#include "b43.h" |
||||
|
||||
#include <linux/interrupt.h> |
||||
#include <linux/io.h> |
||||
#include <linux/list.h> |
||||
#include <linux/skbuff.h> |
||||
|
||||
|
||||
/*** Registers for PIO queues up to revision 7. ***/ |
||||
/* TX queue. */ |
||||
#define B43_PIO_TXCTL 0x00 |
||||
#define B43_PIO_TXCTL_WRITELO 0x0001 |
||||
#define B43_PIO_TXCTL_WRITEHI 0x0002 |
||||
#define B43_PIO_TXCTL_EOF 0x0004 |
||||
#define B43_PIO_TXCTL_FREADY 0x0008 |
||||
#define B43_PIO_TXCTL_FLUSHREQ 0x0020 |
||||
#define B43_PIO_TXCTL_FLUSHPEND 0x0040 |
||||
#define B43_PIO_TXCTL_SUSPREQ 0x0080 |
||||
#define B43_PIO_TXCTL_QSUSP 0x0100 |
||||
#define B43_PIO_TXCTL_COMMCNT 0xFC00 |
||||
#define B43_PIO_TXCTL_COMMCNT_SHIFT 10 |
||||
#define B43_PIO_TXDATA 0x02 |
||||
#define B43_PIO_TXQBUFSIZE 0x04 |
||||
/* RX queue. */ |
||||
#define B43_PIO_RXCTL 0x00 |
||||
#define B43_PIO_RXCTL_FRAMERDY 0x0001 |
||||
#define B43_PIO_RXCTL_DATARDY 0x0002 |
||||
#define B43_PIO_RXDATA 0x02 |
||||
|
||||
/*** Registers for PIO queues revision 8 and later. ***/ |
||||
/* TX queue */ |
||||
#define B43_PIO8_TXCTL 0x00 |
||||
#define B43_PIO8_TXCTL_0_7 0x00000001 |
||||
#define B43_PIO8_TXCTL_8_15 0x00000002 |
||||
#define B43_PIO8_TXCTL_16_23 0x00000004 |
||||
#define B43_PIO8_TXCTL_24_31 0x00000008 |
||||
#define B43_PIO8_TXCTL_EOF 0x00000010 |
||||
#define B43_PIO8_TXCTL_FREADY 0x00000080 |
||||
#define B43_PIO8_TXCTL_SUSPREQ 0x00000100 |
||||
#define B43_PIO8_TXCTL_QSUSP 0x00000200 |
||||
#define B43_PIO8_TXCTL_FLUSHREQ 0x00000400 |
||||
#define B43_PIO8_TXCTL_FLUSHPEND 0x00000800 |
||||
#define B43_PIO8_TXDATA 0x04 |
||||
/* RX queue */ |
||||
#define B43_PIO8_RXCTL 0x00 |
||||
#define B43_PIO8_RXCTL_FRAMERDY 0x00000001 |
||||
#define B43_PIO8_RXCTL_DATARDY 0x00000002 |
||||
#define B43_PIO8_RXDATA 0x04 |
||||
|
||||
|
||||
/* The maximum number of TX-packets the HW can handle. */ |
||||
#define B43_PIO_MAX_NR_TXPACKETS 32 |
||||
|
||||
|
||||
#ifdef CONFIG_B43_PIO |
||||
|
||||
struct b43_pio_txpacket { |
||||
/* Pointer to the TX queue we belong to. */ |
||||
struct b43_pio_txqueue *queue; |
||||
/* The TX data packet. */ |
||||
struct sk_buff *skb; |
||||
/* Index in the (struct b43_pio_txqueue)->packets array. */ |
||||
u8 index; |
||||
|
||||
struct list_head list; |
||||
}; |
||||
|
||||
struct b43_pio_txqueue { |
||||
struct b43_wldev *dev; |
||||
spinlock_t lock; |
||||
u16 mmio_base; |
||||
|
||||
/* The device queue buffer size in bytes. */ |
||||
u16 buffer_size; |
||||
/* The number of used bytes in the device queue buffer. */ |
||||
u16 buffer_used; |
||||
/* The number of packets that can still get queued.
|
||||
* This is decremented on queueing a packet and incremented |
||||
* after receiving the transmit status. */ |
||||
u16 free_packet_slots; |
||||
|
||||
/* True, if the mac80211 queue was stopped due to overflow at TX. */ |
||||
bool stopped; |
||||
/* Our b43 queue index number */ |
||||
u8 index; |
||||
/* The mac80211 QoS queue priority. */ |
||||
u8 queue_prio; |
||||
|
||||
/* Buffer for TX packet meta data. */ |
||||
struct b43_pio_txpacket packets[B43_PIO_MAX_NR_TXPACKETS]; |
||||
struct list_head packets_list; |
||||
|
||||
/* Total number of transmitted packets. */ |
||||
unsigned int nr_tx_packets; |
||||
|
||||
/* Shortcut to the 802.11 core revision. This is to
|
||||
* avoid horrible pointer dereferencing in the fastpaths. */ |
||||
u8 rev; |
||||
}; |
||||
|
||||
struct b43_pio_rxqueue { |
||||
struct b43_wldev *dev; |
||||
spinlock_t lock; |
||||
u16 mmio_base; |
||||
|
||||
/* Work to reduce latency issues on RX. */ |
||||
struct work_struct rx_work; |
||||
|
||||
/* Shortcut to the 802.11 core revision. This is to
|
||||
* avoid horrible pointer dereferencing in the fastpaths. */ |
||||
u8 rev; |
||||
}; |
||||
|
||||
|
||||
static inline u16 b43_piotx_read16(struct b43_pio_txqueue *q, u16 offset) |
||||
{ |
||||
return b43_read16(q->dev, q->mmio_base + offset); |
||||
} |
||||
|
||||
static inline u32 b43_piotx_read32(struct b43_pio_txqueue *q, u16 offset) |
||||
{ |
||||
return b43_read32(q->dev, q->mmio_base + offset); |
||||
} |
||||
|
||||
static inline void b43_piotx_write16(struct b43_pio_txqueue *q, |
||||
u16 offset, u16 value) |
||||
{ |
||||
b43_write16(q->dev, q->mmio_base + offset, value); |
||||
} |
||||
|
||||
static inline void b43_piotx_write32(struct b43_pio_txqueue *q, |
||||
u16 offset, u32 value) |
||||
{ |
||||
b43_write32(q->dev, q->mmio_base + offset, value); |
||||
} |
||||
|
||||
|
||||
static inline u16 b43_piorx_read16(struct b43_pio_rxqueue *q, u16 offset) |
||||
{ |
||||
return b43_read16(q->dev, q->mmio_base + offset); |
||||
} |
||||
|
||||
static inline u32 b43_piorx_read32(struct b43_pio_rxqueue *q, u16 offset) |
||||
{ |
||||
return b43_read32(q->dev, q->mmio_base + offset); |
||||
} |
||||
|
||||
static inline void b43_piorx_write16(struct b43_pio_rxqueue *q, |
||||
u16 offset, u16 value) |
||||
{ |
||||
b43_write16(q->dev, q->mmio_base + offset, value); |
||||
} |
||||
|
||||
static inline void b43_piorx_write32(struct b43_pio_rxqueue *q, |
||||
u16 offset, u32 value) |
||||
{ |
||||
b43_write32(q->dev, q->mmio_base + offset, value); |
||||
} |
||||
|
||||
|
||||
int b43_pio_init(struct b43_wldev *dev); |
||||
void b43_pio_stop(struct b43_wldev *dev); |
||||
void b43_pio_free(struct b43_wldev *dev); |
||||
|
||||
int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb); |
||||
void b43_pio_handle_txstatus(struct b43_wldev *dev, |
||||
const struct b43_txstatus *status); |
||||
void b43_pio_get_tx_stats(struct b43_wldev *dev, |
||||
struct ieee80211_tx_queue_stats *stats); |
||||
void b43_pio_rx(struct b43_pio_rxqueue *q); |
||||
|
||||
void b43_pio_tx_suspend(struct b43_wldev *dev); |
||||
void b43_pio_tx_resume(struct b43_wldev *dev); |
||||
|
||||
|
||||
#else /* CONFIG_B43_PIO */ |
||||
|
||||
|
||||
static inline int b43_pio_init(struct b43_wldev *dev) |
||||
{ |
||||
return 0; |
||||
} |
||||
static inline void b43_pio_free(struct b43_wldev *dev) |
||||
{ |
||||
} |
||||
static inline void b43_pio_stop(struct b43_wldev *dev) |
||||
{ |
||||
} |
||||
static inline int b43_pio_tx(struct b43_wldev *dev, |
||||
struct sk_buff *skb) |
||||
{ |
||||
return 0; |
||||
} |
||||
static inline void b43_pio_handle_txstatus(struct b43_wldev *dev, |
||||
const struct b43_txstatus *status) |
||||
{ |
||||
} |
||||
static inline void b43_pio_get_tx_stats(struct b43_wldev *dev, |
||||
struct ieee80211_tx_queue_stats *stats) |
||||
{ |
||||
} |
||||
static inline void b43_pio_rx(struct b43_pio_rxqueue *q) |
||||
{ |
||||
} |
||||
static inline void b43_pio_tx_suspend(struct b43_wldev *dev) |
||||
{ |
||||
} |
||||
static inline void b43_pio_tx_resume(struct b43_wldev *dev) |
||||
{ |
||||
} |
||||
|
||||
#endif /* CONFIG_B43_PIO */ |
||||
#endif /* B43_PIO_H_ */ |
Loading…
Reference in new issue