Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org> SVN-Revision: 46208master
Felix Fietkau
9 years ago
parent
c9e433206f
commit
b26077026f
@ -0,0 +1,142 @@ |
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/*
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* Atheros AP143 reference board support |
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* |
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* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved. |
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* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org> |
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* |
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* Permission to use, copy, modify, and/or distribute this software for any |
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* purpose with or without fee is hereby granted, provided that the above |
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* copyright notice and this permission notice appear in all copies. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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* |
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*/ |
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#include <linux/platform_device.h> |
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#include <linux/ath9k_platform.h> |
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#include <linux/ar8216_platform.h> |
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#include <asm/mach-ath79/ar71xx_regs.h> |
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#include "common.h" |
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#include "dev-eth.h" |
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#include "dev-gpio-buttons.h" |
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#include "dev-leds-gpio.h" |
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#include "dev-m25p80.h" |
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#include "dev-spi.h" |
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#include "dev-usb.h" |
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#include "dev-wmac.h" |
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#include "machtypes.h" |
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#define AP143_GPIO_LED_WLAN 12 |
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#define AP143_GPIO_LED_WPS 13 |
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#define AP143_GPIO_LED_STATUS 13 |
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#define AP143_GPIO_LED_WAN 4 |
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#define AP143_GPIO_LED_LAN1 16 |
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#define AP143_GPIO_LED_LAN2 15 |
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#define AP143_GPIO_LED_LAN3 14 |
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#define AP143_GPIO_LED_LAN4 11 |
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#define AP143_GPIO_BTN_WPS 17 |
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#define AP143_KEYS_POLL_INTERVAL 20 /* msecs */ |
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#define AP143_KEYS_DEBOUNCE_INTERVAL (3 * AP143_KEYS_POLL_INTERVAL) |
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#define AP143_MAC0_OFFSET 0 |
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#define AP143_MAC1_OFFSET 6 |
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#define AP143_WMAC_CALDATA_OFFSET 0x1000 |
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static struct gpio_led ap143_leds_gpio[] __initdata = { |
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{ |
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.name = "ap143:green:status", |
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.gpio = AP143_GPIO_LED_STATUS, |
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.active_low = 1, |
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}, |
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{ |
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.name = "ap143:green:wlan", |
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.gpio = AP143_GPIO_LED_WLAN, |
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.active_low = 1, |
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} |
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}; |
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static struct gpio_keys_button ap143_gpio_keys[] __initdata = { |
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{ |
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.desc = "WPS button", |
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.type = EV_KEY, |
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.code = KEY_WPS_BUTTON, |
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.debounce_interval = AP143_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = AP143_GPIO_BTN_WPS, |
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.active_low = 1, |
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}, |
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}; |
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static void __init ap143_gpio_led_setup(void) |
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{ |
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ath79_gpio_direction_select(AP143_GPIO_LED_WAN, true); |
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ath79_gpio_direction_select(AP143_GPIO_LED_LAN1, true); |
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ath79_gpio_direction_select(AP143_GPIO_LED_LAN2, true); |
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ath79_gpio_direction_select(AP143_GPIO_LED_LAN3, true); |
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ath79_gpio_direction_select(AP143_GPIO_LED_LAN4, true); |
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ath79_gpio_output_select(AP143_GPIO_LED_WAN, |
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QCA953X_GPIO_OUT_MUX_LED_LINK5); |
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ath79_gpio_output_select(AP143_GPIO_LED_LAN1, |
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QCA953X_GPIO_OUT_MUX_LED_LINK1); |
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ath79_gpio_output_select(AP143_GPIO_LED_LAN2, |
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QCA953X_GPIO_OUT_MUX_LED_LINK2); |
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ath79_gpio_output_select(AP143_GPIO_LED_LAN3, |
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QCA953X_GPIO_OUT_MUX_LED_LINK3); |
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ath79_gpio_output_select(AP143_GPIO_LED_LAN4, |
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QCA953X_GPIO_OUT_MUX_LED_LINK4); |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(ap143_leds_gpio), |
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ap143_leds_gpio); |
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ath79_register_gpio_keys_polled(-1, AP143_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(ap143_gpio_keys), |
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ap143_gpio_keys); |
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} |
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static void __init ap143_setup(void) |
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{ |
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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ath79_register_m25p80(NULL); |
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ap143_gpio_led_setup(); |
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ath79_register_usb(); |
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ath79_wmac_set_led_pin(AP143_GPIO_LED_WLAN); |
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ath79_register_wmac(art + AP143_WMAC_CALDATA_OFFSET, NULL); |
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ath79_register_mdio(0, 0x0); |
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ath79_register_mdio(1, 0x0); |
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ath79_init_mac(ath79_eth0_data.mac_addr, art + AP143_MAC0_OFFSET, 0); |
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ath79_init_mac(ath79_eth1_data.mac_addr, art + AP143_MAC1_OFFSET, 0); |
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/* WAN port */ |
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; |
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ath79_eth0_data.speed = SPEED_100; |
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ath79_eth0_data.duplex = DUPLEX_FULL; |
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ath79_eth0_data.phy_mask = BIT(4); |
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ath79_register_eth(0); |
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/* LAN ports */ |
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; |
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ath79_eth1_data.speed = SPEED_1000; |
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ath79_eth1_data.duplex = DUPLEX_FULL; |
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ath79_switch_data.phy_poll_mask |= BIT(4); |
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ath79_switch_data.phy4_mii_en = 1; |
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ath79_register_eth(1); |
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} |
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MIPS_MACHINE(ATH79_MACH_AP143, "AP143", "Qualcomm Atheros AP143 reference board", |
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ap143_setup); |
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@ -0,0 +1,24 @@ |
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--- a/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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@@ -398,6 +398,11 @@ void __init ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio)
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ar934x_set_ext_lna_gpio(chain, gpio);
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}
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+void __init ath79_wmac_set_led_pin(int gpio)
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+{
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+ ath79_wmac_data.led_pin = gpio;
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+}
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+
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void __init ath79_register_wmac(u8 *cal_data, u8 *mac_addr)
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{
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if (soc_is_ar913x())
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--- a/arch/mips/ath79/dev-wmac.h
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+++ b/arch/mips/ath79/dev-wmac.h
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@@ -18,6 +18,7 @@ void ath79_wmac_disable_2ghz(void);
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void ath79_wmac_disable_5ghz(void);
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void ath79_wmac_set_tx_gain_buffalo(void);
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void ath79_wmac_set_ext_lna_gpio(unsigned chain, int gpio);
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+void ath79_wmac_set_led_pin(int gpio);
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bool ar93xx_wmac_read_mac_address(u8 *dest);
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@ -0,0 +1,43 @@ |
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--- a/arch/mips/ath79/common.h
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+++ b/arch/mips/ath79/common.h
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@@ -28,6 +28,7 @@ void ath79_gpio_function_enable(u32 mask);
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void ath79_gpio_function_disable(u32 mask);
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void ath79_gpio_function_setup(u32 set, u32 clear);
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void ath79_gpio_output_select(unsigned gpio, u8 val);
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+int ath79_gpio_direction_select(unsigned gpio, bool oe);
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void ath79_gpio_init(void);
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#endif /* __ATH79_COMMON_H */
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--- a/arch/mips/ath79/gpio.c
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+++ b/arch/mips/ath79/gpio.c
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@@ -130,6 +130,30 @@ static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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return 0;
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}
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+int ath79_gpio_direction_select(unsigned gpio, bool oe)
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+{
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+ void __iomem *base = ath79_gpio_base;
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+ unsigned long flags;
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+ bool ieq_1 = (soc_is_ar934x() ||
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+ soc_is_qca953x());
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+
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+ if (gpio >= ath79_gpio_count)
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+ return -1;
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+
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+ spin_lock_irqsave(&ath79_gpio_lock, flags);
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+
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+ if ((ieq_1 && oe) || (!ieq_1 && !oe))
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+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << gpio),
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+ base + AR71XX_GPIO_REG_OE);
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+ else
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+ __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << gpio),
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+ base + AR71XX_GPIO_REG_OE);
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+
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+ spin_unlock_irqrestore(&ath79_gpio_lock, flags);
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+
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+ return 0;
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+}
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+
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static struct gpio_chip ath79_gpio_chip = {
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.label = "ath79",
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.get = ath79_gpio_get_value,
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@ -0,0 +1,43 @@ |
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -114,6 +114,20 @@ config ATH79_MACH_AP136
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Say 'Y' here if you want your kernel to support the
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Atheros AP136 or AP135 reference boards.
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+config ATH79_MACH_AP143
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+ bool "Atheros AP143 reference board"
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+ select SOC_QCA953X
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_SPI
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+ select ATH79_DEV_USB
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+ select ATH79_DEV_WMAC
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_M25P80
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+ help
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+ Say 'Y' here if you want your kernel to support the
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+ Atheros AP143 reference board.
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+
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config ATH79_MACH_AP81
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bool "Atheros AP81 reference board"
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select SOC_AR913X
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -47,6 +47,7 @@ obj-$(CONFIG_ATH79_MACH_AP113) += mach-ap113.o
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obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o
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obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o
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obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
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+obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o
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obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
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obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o
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obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -29,6 +29,7 @@ enum ath79_mach_type {
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ATH79_MACH_AP135_020, /* Atheros AP135-020 reference board */
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ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */
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ATH79_MACH_AP136_020, /* Atheros AP136-020 reference board */
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+ ATH79_MACH_AP143, /* Atheros AP143 reference board */
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ATH79_MACH_AP81, /* Atheros AP81 reference board */
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ATH79_MACH_AP83, /* Atheros AP83 */
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ATH79_MACH_AP96, /* Atheros AP96 */
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