fixup pcie clock, thanks Chris

SVN-Revision: 27072
14 years ago · acbb2db5e2
parent 41a169115b
commit acbb2db5e2
1 changed files with 11 additions and 0 deletions
--- a/target/linux/cns3xxx/patches/054-cns3xxx_pcie_clock.patch
+++ b/target/linux/cns3xxx/patches/054-cns3xxx_pcie_clock.patch
@ -0,0 +1,11 @@
+--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
+@@ -378,8 +378,6 @@ static int __init cns3xxx_pcie_init(void
+ 	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
+ 		iotable_init(cns3xxx_pcie[i].cfg_bases,
+ 			     ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
+-		cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_PCIE(i));
+-		cns3xxx_pwr_soft_rst(0x1 << PM_SOFT_RST_REG_OFFST_PCIE(i));
+ 		cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
+ 		cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
+ 		pci_common_init(&cns3xxx_pcie[i].hw_pci);