ar71xx: add support for ap152 reference board

Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org>

SVN-Revision: 46972
master
John Crispin 9 years ago
parent f6607a4bec
commit ac75fc8d98
  1. 3
      target/linux/ar71xx/base-files/lib/ar71xx.sh
  2. 1
      target/linux/ar71xx/config-4.1
  3. 141
      target/linux/ar71xx/files/arch/mips/ath79/mach-ap152.c
  4. 11
      target/linux/ar71xx/generic/profiles/atheros.mk
  5. 3
      target/linux/ar71xx/image/Makefile
  6. 43
      target/linux/ar71xx/patches-4.1/815-MIPS-ath79-add-ap152-support.patch

@ -377,6 +377,9 @@ ar71xx_board_detect() {
*"AP147-010 reference board")
name="ap147-010"
;;
*"AP152 reference board")
name="ap152"
;;
*AP81)
name="ap81"
;;

@ -41,6 +41,7 @@ CONFIG_ATH79_MACH_AP132=y
CONFIG_ATH79_MACH_AP136=y
CONFIG_ATH79_MACH_AP143=y
CONFIG_ATH79_MACH_AP147=y
CONFIG_ATH79_MACH_AP152=y
CONFIG_ATH79_MACH_AP81=y
CONFIG_ATH79_MACH_AP83=y
CONFIG_ATH79_MACH_AP96=y

@ -0,0 +1,141 @@
/*
* Qualcomm Atheros AP152 reference board support
*
* Copyright (c) 2015 Qualcomm Atheros
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define AP152_GPIO_LED_USB0 7
#define AP152_GPIO_LED_USB1 8
#define AP152_GPIO_BTN_RESET 2
#define AP152_GPIO_BTN_WPS 1
#define AP152_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP152_KEYS_DEBOUNCE_INTERVAL (3 * AP152_KEYS_POLL_INTERVAL)
#define AP152_MAC0_OFFSET 0
#define AP152_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap152_leds_gpio[] __initdata = {
{
.name = "ap152:green:usb0",
.gpio = AP152_GPIO_LED_USB0,
.active_low = 1,
},
{
.name = "ap152:green:usb1",
.gpio = AP152_GPIO_LED_USB1,
.active_low = 1,
},
};
static struct gpio_keys_button ap152_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP152_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP152_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg ap152_ar8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data ap152_ar8337_data = {
.pad0_cfg = &ap152_ar8337_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info ap152_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.phy_addr = 0,
.platform_data = &ap152_ar8337_data,
},
};
static void __init ap152_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap152_leds_gpio),
ap152_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP152_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap152_gpio_keys),
ap152_gpio_keys);
ath79_register_usb();
platform_device_register(&ath79_mdio0_device);
mdiobus_register_board_info(ap152_mdio0_info,
ARRAY_SIZE(ap152_mdio0_info));
ath79_register_wmac(art + AP152_WMAC_CALDATA_OFFSET, NULL);
ath79_register_pci();
ath79_init_mac(ath79_eth0_data.mac_addr, art + AP152_MAC0_OFFSET, 0);
/* GMAC0 is connected to an AR8337 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_AP152, "AP152", "Qualcomm Atheros AP152 reference board",
ap152_setup);

@ -93,6 +93,17 @@ endef
$(eval $(call Profile,AP147))
define Profile/AP152
NAME:=Qualcomm Atheros AP152 reference board
PACKAGES:=kmod-usb-core kmod-usb2 kmod-usb-storage
endef
define Profile/AP152/Description
Package set optimized for the Qualcomm Atheros AP152 reference board.
endef
$(eval $(call Profile,AP152))
define Profile/AP81
NAME:=Atheros AP81 reference board
PACKAGES:=kmod-usb-core kmod-usb2

@ -1242,6 +1242,7 @@ ap136_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1
ap143_mtdlayout_8M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,6336k(rootfs),1472k(kernel),64k(art)ro,7744k@0x50000(firmware)
ap143_mtdlayout_16M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware)
ap147_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art),16000k@0x50000(firmware)
ap152_mtdlayout_16M=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,14528k(rootfs),1472k(kernel),64k(art)ro,16000k@0x50000(firmware)
bxu2000n2_mtdlayout=mtdparts=spi0.0:256k(u-boot)ro,64k(u-boot-env)ro,1408k(kernel),8448k(rootfs),6016k(user),64k(cfg),64k(oem),64k(art)ro
cameo_ap81_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,3840k(firmware),64k(art)ro
cameo_ap91_mtdlayout=mtdparts=spi0.0:192k(u-boot)ro,64k(nvram)ro,3712k(firmware),64k(mac)ro,64k(art)ro
@ -2128,6 +2129,7 @@ $(eval $(call SingleProfile,AthLzma,64k,AP136_020,ap136-020,AP136-020,ttyS0,1152
$(eval $(call SingleProfile,AthLzma,64k,AP143_8M,ap143-8M,AP143,ttyS0,115200,$$(ap143_mtdlayout_8M),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,AP143_16M,ap143-16M,AP143,ttyS0,115200,$$(ap143_mtdlayout_16M),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,AP147_010,ap147-010,AP147-010,ttyS0,115200,$$(ap147_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,AP152_16M,ap152-16M,AP152,ttyS0,115200,$$(ap152_mtdlayout_16M),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,BXU2000N2,bxu2000n-2-a1,BXU2000n-2-A1,ttyS0,115200,$$(bxu2000n2_mtdlayout),RKuImage))
$(eval $(call SingleProfile,AthLzma,64k,CAP4200AG,cap4200ag,CAP4200AG,ttyS0,115200,$$(cap4200ag_mtdlayout),KRuImage))
$(eval $(call SingleProfile,AthLzma,64k,DB120,db120,DB120,ttyS0,115200,$$(db120_mtdlayout),RKuImage))
@ -2286,6 +2288,7 @@ $(eval $(call MultiProfile,AP121,AP121_2M AP121_4M AP121_8M))
$(eval $(call MultiProfile,AP136,AP136_010 AP136_020))
$(eval $(call MultiProfile,AP143,AP143_8M AP143_16M))
$(eval $(call MultiProfile,AP147,AP147_010))
$(eval $(call MultiProfile,AP152,AP152_16M))
$(eval $(call MultiProfile,DIR615IX,DIR615I1 DIR615I3))
$(eval $(call MultiProfile,EWDORIN, EWDORINAP EWDORINRT EWDORIN16M))
$(eval $(call MultiProfile,OPENMESH,OM2P OM5P MR600 MR900 MR1750))

@ -0,0 +1,43 @@
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -151,6 +151,20 @@ config ATH79_MACH_AP147
Say 'Y' here if you want your kernel to support the
QCA AP147 reference boards.
+config ATH79_MACH_AP152
+ bool "Atheros AP152 reference board"
+ select SOC_QCA956X
+ select ATH79_DEV_GPIO_BUTTONS
+ select ATH79_DEV_LEDS_GPIO
+ select ATH79_DEV_M25P80
+ select ATH79_DEV_USB
+ select ATH79_DEV_WMAC
+ select ATH79_DEV_AP9X_PCI if PCI
+ help
+ Say 'Y' here if you want your kernel to support the
+ QCA AP152 reference boards.
+
+
config ATH79_MACH_AP81
bool "Atheros AP81 reference board"
select SOC_AR913X
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_ATH79_MACH_AP132) += mach-ap132.o
obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o
obj-$(CONFIG_ATH79_MACH_AP143) += mach-ap143.o
obj-$(CONFIG_ATH79_MACH_AP147) += mach-ap147.o
+obj-$(CONFIG_ATH79_MACH_AP152) += mach-ap152.o
obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
obj-$(CONFIG_ATH79_MACH_AP83) += mach-ap83.o
obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o
--- a/arch/mips/ath79/machtypes.h
+++ b/arch/mips/ath79/machtypes.h
@@ -32,6 +32,7 @@ enum ath79_mach_type {
ATH79_MACH_AP136_020, /* Atheros AP136-020 reference board */
ATH79_MACH_AP143, /* Atheros AP143 reference board */
ATH79_MACH_AP147_010, /* Atheros AP147-010 reference board */
+ ATH79_MACH_AP152, /* Atheros AP152 reference board */
ATH79_MACH_AP81, /* Atheros AP81 reference board */
ATH79_MACH_AP83, /* Atheros AP83 */
ATH79_MACH_AP96, /* Atheros AP96 */
Loading…
Cancel
Save