mcs814x: implement MULTI_IRQ_HANDLER

Allows us to get rid of the IRQ entry point assembly

Signed-off-by: Florian Fainelli <florian@openwrt.org>

SVN-Revision: 36060
master
Florian Fainelli 12 years ago
parent 18908139f3
commit a9ef927cce
  1. 1
      target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/board-mcs8140-dt.c
  2. 23
      target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/include/mach/entry-macro.S
  3. 22
      target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/irq.c
  4. 3
      target/linux/mcs814x/patches-3.3/001-platform.patch

@ -40,5 +40,6 @@ DT_MACHINE_START(mcs8140_dt, "Moschip MCS8140 board")
.init_machine = mcs814x_dt_device_init,
.restart = mcs814x_restart,
.dt_compat = mcs8140_dt_board_compat,
.handle_irq = mcs814x_handle_irq,
MACHINE_END

@ -4,26 +4,3 @@
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =mcs814x_intc_base @ base virtual address of AIC peripheral
ldr \base, [\base]
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
mov \tmp, #MCS814X_IRQ_STS0 @ load tmp with STS0 register offset
ldr \irqstat, [\base, \tmp] @ load value at base + tmp
tst \irqstat, \irqstat @ test if no active IRQ's
beq 1002f @ if no active irqs return with status 0
mov \irqnr, #0 @ start from irq zero
mov \tmp, #1 @ the mask initially 1
1001:
tst \irqstat, \tmp @ and with mask
addeq \irqnr, \irqnr, #1 @ if zero then add one to nr
moveq \tmp, \tmp, lsl #1 @ shift mask one to left
beq 1001b @ if zero then loop again
mov \irqstat, \tmp @ save the return mask
mov \tmp, #MCS814X_IRQ_STS0 @ load tmp with ICR offset
str \irqstat, [\base, \tmp] @ clear irq with selected mask
1002:
.endm

@ -16,7 +16,7 @@
#include <asm/mach/irq.h>
#include <mach/mcs814x.h>
void __iomem *mcs814x_intc_base;
static void __iomem *mcs814x_intc_base;
static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
unsigned int num)
@ -43,6 +43,26 @@ static void __init mcs814x_alloc_gc(void __iomem *base, unsigned int irq_start,
writel_relaxed(0xffffffff, base + MCS814X_IRQ_ICR);
}
asmlinkage void __exception_irq_entry mcs814x_handle_irq(struct pt_regs *regs)
{
u32 status, irq;
do {
/* read the status register */
status = __raw_readl(mcs814x_intc_base + MCS814X_IRQ_STS0);
if (!status)
break;
irq = ffs(status) - 1;
status |= (1 << irq);
/* clear the interrupt */
__raw_writel(status, mcs814x_intc_base + MCS814X_IRQ_STS0);
/* call the generic handler */
handle_IRQ(irq, regs);
} while (1);
}
static const struct of_device_id mcs814x_intc_ids[] = {
{ .compatible = "moschip,mcs814x-intc" },
{ /* sentinel */ },

@ -1,6 +1,6 @@
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -869,6 +869,21 @@ config ARCH_EXYNOS
@@ -869,6 +869,22 @@ config ARCH_EXYNOS
help
Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
@ -16,6 +16,7 @@
+ select NEED_MACH_MEMORY_H
+ select USB_ARCH_HAS_OHCI
+ select USB_ARCH_HAS_EHCI
+ select MULTI_IRQ_HANDLER
+ help
+ Support for Moschip MCS814x SoCs (MCS8140).
+

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