Imre Kaloz
17 years ago
parent
cef5e994b3
commit
a425a7506c
@ -0,0 +1,199 @@ |
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--- a/arch/arm/mach-orion5x/Kconfig
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+++ b/arch/arm/mach-orion5x/Kconfig
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@@ -74,6 +74,12 @@
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Say 'Y' here if you want your kernel to support the
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Maxtor Shared Storage II platform.
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+config MACH_WNR854T
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+ bool "Netgear WNR854T"
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+ help
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+ Say 'Y' here if you want your kernel to support the
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+ Netgear WNR854T platform.
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+
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endmenu
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endif
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--- a/arch/arm/mach-orion5x/Makefile
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+++ b/arch/arm/mach-orion5x/Makefile
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@@ -10,3 +10,4 @@
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obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
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obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
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obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
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+obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
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--- /dev/null
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+++ b/arch/arm/mach-orion5x/wnr854t-setup.c
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@@ -0,0 +1,164 @@
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+/*
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+ * arch/arm/mach-orion5x/wnr854t-setup.c
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+ *
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+ * This file is licensed under the terms of the GNU General Public
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+ * License version 2. This program is licensed "as is" without any
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+ * warranty of any kind, whether express or implied.
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/platform_device.h>
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+#include <linux/pci.h>
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+#include <linux/irq.h>
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+#include <linux/delay.h>
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+#include <linux/mtd/physmap.h>
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+#include <linux/mv643xx_eth.h>
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+#include <asm/mach-types.h>
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+#include <asm/gpio.h>
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+#include <asm/mach/arch.h>
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+#include <asm/mach/pci.h>
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+#include <asm/arch/orion5x.h>
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+#include "common.h"
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+#include "mpp.h"
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+
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+static struct orion5x_mpp_mode wnr854t_mpp_modes[] __initdata = {
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+ { 0, MPP_GPIO }, /* Power LED green (0=on) */
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+ { 1, MPP_GPIO }, /* Reset Button (0=off) */
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+ { 2, MPP_GPIO }, /* Power LED blink (0=off) */
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+ { 3, MPP_GPIO }, /* WAN Status LED amber (0=off) */
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+ { 4, MPP_GPIO }, /* PCI int */
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+ { 5, MPP_GPIO }, /* ??? */
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+ { 6, MPP_GPIO }, /* ??? */
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+ { 7, MPP_GPIO }, /* ??? */
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+ { 8, MPP_UNUSED }, /* ??? */
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+ { 9, MPP_GIGE }, /* GE_RXERR */
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+ { 10, MPP_UNUSED }, /* ??? */
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+ { 11, MPP_UNUSED }, /* ??? */
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+ { 12, MPP_GIGE }, /* GE_TXD[4] */
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+ { 13, MPP_GIGE }, /* GE_TXD[5] */
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+ { 14, MPP_GIGE }, /* GE_TXD[6] */
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+ { 15, MPP_GIGE }, /* GE_TXD[7] */
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+ { 16, MPP_GIGE }, /* GE_RXD[4] */
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+ { 17, MPP_GIGE }, /* GE_RXD[5] */
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+ { 18, MPP_GIGE }, /* GE_RXD[6] */
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+ { 19, MPP_GIGE }, /* GE_RXD[7] */
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+ { -1 },
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+};
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+
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+/*
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+ * 8M NOR flash Device bus boot chip select
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+ */
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+#define WNR854T_NOR_BOOT_BASE 0xf4000000
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+#define WNR854T_NOR_BOOT_SIZE SZ_8M
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+
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+static struct mtd_partition wnr854t_nor_flash_partitions[] = {
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+ {
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+ .name = "kernel",
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+ .offset = 0x00000000,
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+ .size = 0x00100000,
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+ }, {
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+ .name = "rootfs",
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+ .offset = 0x00100000,
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+ .size = 0x00660000,
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+ }, {
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+ .name = "uboot",
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+ .offset = 0x00760000,
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+ .size = 0x00040000,
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+ },
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+};
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+
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+static struct physmap_flash_data wnr854t_nor_flash_data = {
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+ .width = 1,
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+ .parts = wnr854t_nor_flash_partitions,
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+ .nr_parts = ARRAY_SIZE(wnr854t_nor_flash_partitions),
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+};
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+
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+static struct resource wnr854t_nor_flash_resource = {
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+ .flags = IORESOURCE_MEM,
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+ .start = WNR854T_NOR_BOOT_BASE,
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+ .end = WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
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+};
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+
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+static struct platform_device wnr854t_nor_flash = {
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+ .name = "physmap-flash",
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+ .id = 0,
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+ .dev = {
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+ .platform_data = &wnr854t_nor_flash_data,
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+ },
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+ .num_resources = 1,
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+ .resource = &wnr854t_nor_flash_resource,
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+};
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+
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+static struct mv643xx_eth_platform_data wnr854t_eth_data = {
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+ .phy_addr = -1,
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+};
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+
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+static void __init wnr854t_init(void)
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+{
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+ /*
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+ * Setup basic Orion functions. Need to be called early.
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+ */
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+ orion5x_init();
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+
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+ orion5x_mpp_conf(wnr854t_mpp_modes);
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+
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+ /*
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+ * Configure peripherals.
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+ */
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+ orion5x_eth_init(&wnr854t_eth_data);
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+ orion5x_uart0_init();
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+
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+ orion5x_setup_dev_boot_win(WNR854T_NOR_BOOT_BASE,
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+ WNR854T_NOR_BOOT_SIZE);
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+ platform_device_register(&wnr854t_nor_flash);
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+}
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+
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+static int __init wnr854t_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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+{
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+ int irq;
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+
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+ /*
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+ * Check for devices with hard-wired IRQs.
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+ */
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+ irq = orion5x_pci_map_irq(dev, slot, pin);
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+ if (irq != -1)
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+ return irq;
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+
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+ /*
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+ * Mini-PCI slot.
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+ */
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+ if (slot == 7)
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+ return gpio_to_irq(4);
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+
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+ return -1;
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+}
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+
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+static struct hw_pci wnr854t_pci __initdata = {
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+ .nr_controllers = 2,
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+ .swizzle = pci_std_swizzle,
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+ .setup = orion5x_pci_sys_setup,
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+ .scan = orion5x_pci_sys_scan_bus,
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+ .map_irq = wnr854t_pci_map_irq,
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+};
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+
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+static int __init wnr854t_pci_init(void)
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+{
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+ if (machine_is_wnr854t())
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+ pci_common_init(&wnr854t_pci);
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+
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+ return 0;
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+}
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+subsys_initcall(wnr854t_pci_init);
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+
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+MACHINE_START(WNR854T, "Netgear WNR854T")
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+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
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+ .phys_io = ORION5X_REGS_PHYS_BASE,
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+ .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
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+ .boot_params = 0x00000100,
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+ .init_machine = wnr854t_init,
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+ .map_io = orion5x_map_io,
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+ .init_irq = orion5x_init_irq,
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+ .timer = &orion5x_timer,
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+ .fixup = tag_fixup_mem32,
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+MACHINE_END
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--- a/arch/arm/configs/orion5x_defconfig
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+++ b/arch/arm/configs/orion5x_defconfig
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@@ -166,6 +166,7 @@
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CONFIG_MACH_DNS323=y
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CONFIG_MACH_TS209=y
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CONFIG_MACH_LINKSTATION_PRO=y
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+CONFIG_MACH_WNR854T=y
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#
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# Boot options
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