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@ -5299,7 +5299,108 @@ |
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bool is_ath9k_unloaded;
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/* We use the hw_value as an index into our private channel structure */
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@@ -429,7 +429,6 @@ static int ath9k_init_queues(struct ath_
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@@ -339,7 +339,6 @@ int ath_descdma_setup(struct ath_softc *
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{
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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u8 *ds;
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- struct ath_buf *bf;
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int i, bsize, desc_len;
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ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n",
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@@ -391,33 +390,68 @@ int ath_descdma_setup(struct ath_softc *
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ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
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/* allocate buffers */
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- bsize = sizeof(struct ath_buf) * nbuf;
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- bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL);
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- if (!bf)
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- return -ENOMEM;
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+ if (is_tx) {
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+ struct ath_buf *bf;
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+
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+ bsize = sizeof(struct ath_buf) * nbuf;
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+ bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL);
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+ if (!bf)
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+ return -ENOMEM;
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+
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+ for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) {
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+ bf->bf_desc = ds;
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+ bf->bf_daddr = DS2PHYS(dd, ds);
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+
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+ if (!(sc->sc_ah->caps.hw_caps &
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+ ATH9K_HW_CAP_4KB_SPLITTRANS)) {
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+ /*
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+ * Skip descriptor addresses which can cause 4KB
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+ * boundary crossing (addr + length) with a 32 dword
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+ * descriptor fetch.
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+ */
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+ while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
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+ BUG_ON((caddr_t) bf->bf_desc >=
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+ ((caddr_t) dd->dd_desc +
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+ dd->dd_desc_len));
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+
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+ ds += (desc_len * ndesc);
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+ bf->bf_desc = ds;
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+ bf->bf_daddr = DS2PHYS(dd, ds);
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+ }
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+ }
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+ list_add_tail(&bf->list, head);
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+ }
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+ } else {
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+ struct ath_rxbuf *bf;
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- for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) {
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- bf->bf_desc = ds;
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- bf->bf_daddr = DS2PHYS(dd, ds);
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-
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- if (!(sc->sc_ah->caps.hw_caps &
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- ATH9K_HW_CAP_4KB_SPLITTRANS)) {
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- /*
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- * Skip descriptor addresses which can cause 4KB
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- * boundary crossing (addr + length) with a 32 dword
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- * descriptor fetch.
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- */
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- while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
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- BUG_ON((caddr_t) bf->bf_desc >=
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- ((caddr_t) dd->dd_desc +
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- dd->dd_desc_len));
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-
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- ds += (desc_len * ndesc);
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- bf->bf_desc = ds;
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- bf->bf_daddr = DS2PHYS(dd, ds);
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+ bsize = sizeof(struct ath_buf) * nbuf;
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+ bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL);
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+ if (!bf)
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+ return -ENOMEM;
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+
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+ for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) {
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+ bf->bf_desc = ds;
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+ bf->bf_daddr = DS2PHYS(dd, ds);
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+
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+ if (!(sc->sc_ah->caps.hw_caps &
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+ ATH9K_HW_CAP_4KB_SPLITTRANS)) {
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+ /*
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+ * Skip descriptor addresses which can cause 4KB
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+ * boundary crossing (addr + length) with a 32 dword
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+ * descriptor fetch.
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+ */
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+ while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
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+ BUG_ON((caddr_t) bf->bf_desc >=
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+ ((caddr_t) dd->dd_desc +
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+ dd->dd_desc_len));
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+
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+ ds += (desc_len * ndesc);
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+ bf->bf_desc = ds;
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+ bf->bf_daddr = DS2PHYS(dd, ds);
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+ }
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}
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+ list_add_tail(&bf->list, head);
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}
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- list_add_tail(&bf->list, head);
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}
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return 0;
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}
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@@ -429,7 +463,6 @@ static int ath9k_init_queues(struct ath_
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sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah);
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sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
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@ -5307,7 +5408,7 @@ |
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ath_cabq_update(sc);
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sc->tx.uapsdq = ath_txq_setup(sc, ATH9K_TX_QUEUE_UAPSD, 0);
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@@ -516,6 +515,7 @@ static void ath9k_init_misc(struct ath_s
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@@ -516,6 +549,7 @@ static void ath9k_init_misc(struct ath_s
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static void ath9k_init_platform(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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@ -5315,7 +5416,7 @@ |
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struct ath_common *common = ath9k_hw_common(ah);
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if (common->bus_ops->ath_bus_type != ATH_PCI)
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@@ -525,12 +525,27 @@ static void ath9k_init_platform(struct a
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@@ -525,12 +559,27 @@ static void ath9k_init_platform(struct a
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ATH9K_PCI_CUS230)) {
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ah->config.xlna_gpio = 9;
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ah->config.xatten_margin_cfg = true;
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@ -5344,7 +5445,7 @@ |
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}
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}
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@@ -584,6 +599,7 @@ static int ath9k_init_softc(u16 devid, s
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@@ -584,6 +633,7 @@ static int ath9k_init_softc(u16 devid, s
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{
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struct ath9k_platform_data *pdata = sc->dev->platform_data;
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struct ath_hw *ah = NULL;
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@ -5352,7 +5453,7 @@ |
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struct ath_common *common;
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int ret = 0, i;
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int csz = 0;
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@@ -600,6 +616,7 @@ static int ath9k_init_softc(u16 devid, s
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@@ -600,6 +650,7 @@ static int ath9k_init_softc(u16 devid, s
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ah->reg_ops.rmw = ath9k_reg_rmw;
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atomic_set(&ah->intr_ref_cnt, -1);
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sc->sc_ah = ah;
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@ -5360,7 +5461,7 @@ |
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sc->dfs_detector = dfs_pattern_detector_init(ah, NL80211_DFS_UNSET);
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@@ -631,11 +648,15 @@ static int ath9k_init_softc(u16 devid, s
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@@ -631,11 +682,15 @@ static int ath9k_init_softc(u16 devid, s
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ath9k_init_platform(sc);
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/*
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@ -5380,7 +5481,7 @@ |
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spin_lock_init(&common->cc_lock);
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@@ -710,13 +731,15 @@ static void ath9k_init_band_txpower(stru
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@@ -710,13 +765,15 @@ static void ath9k_init_band_txpower(stru
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struct ieee80211_supported_band *sband;
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struct ieee80211_channel *chan;
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struct ath_hw *ah = sc->sc_ah;
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@ -5397,7 +5498,7 @@ |
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ath9k_hw_set_txpowerlimit(ah, MAX_RATE_POWER, true);
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}
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}
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@@ -802,7 +825,8 @@ void ath9k_set_hw_capab(struct ath_softc
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@@ -802,7 +859,8 @@ void ath9k_set_hw_capab(struct ath_softc
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IEEE80211_HW_PS_NULLFUNC_STACK |
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IEEE80211_HW_SPECTRUM_MGMT |
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IEEE80211_HW_REPORTS_TX_ACK_STATUS |
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