This is a swconfig driver for the Marvell 88E6171 switch, which is a 7-port GigE switch with two CPU ports and 64 802.1q VLANs. Signed-off-by: Claudio Leite <leitec@staticky.com> SVN-Revision: 43486master
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/*
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* Marvell 88E6171 switch driver |
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* |
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* Copyright (c) 2014 Claudio Leite <leitec@staticky.com> |
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* |
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* Based on code (c) 2008 Felix Fietkau <nbd@openwrt.org> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License v2 as published by the |
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* Free Software Foundation |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/init.h> |
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#include <linux/list.h> |
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#include <linux/mii.h> |
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#include <linux/phy.h> |
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#include <linux/of.h> |
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#include <linux/of_mdio.h> |
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#include <linux/delay.h> |
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#include <linux/switch.h> |
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#include <linux/device.h> |
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#include <linux/platform_device.h> |
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#include "mvsw6171.h" |
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MODULE_DESCRIPTION("Marvell 88E6171 Switch driver"); |
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MODULE_AUTHOR("Claudio Leite <leitec@staticky.com>"); |
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MODULE_LICENSE("GPL v2"); |
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MODULE_ALIAS("platform:mvsw6171"); |
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/*
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* Register access is done through direct or indirect addressing, |
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* depending on how the switch is physically connected. |
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* |
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* Direct addressing: all port and global registers directly |
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* accessible via an address/register pair |
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* |
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* Indirect addressing: switch is mapped at a single address, |
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* port and global registers accessible via a single command/data |
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* register pair |
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*/ |
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static int |
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mvsw6171_wait_mask_raw(struct mii_bus *bus, int addr, |
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int reg, u16 mask, u16 val) |
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{ |
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int i = 100; |
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u16 r; |
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do { |
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r = bus->read(bus, addr, reg); |
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if ((r & mask) == val) |
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return 0; |
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} while (--i > 0); |
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return -ETIMEDOUT; |
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} |
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static u16 |
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r16(struct mii_bus *bus, bool indirect, int base_addr, int addr, int reg) |
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{ |
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u16 ind_addr; |
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if (!indirect) |
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return bus->read(bus, addr, reg); |
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/* Indirect read: First, make sure switch is free */ |
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mvsw6171_wait_mask_raw(bus, base_addr, MV_INDIRECT_REG_CMD, |
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MV_INDIRECT_INPROGRESS, 0); |
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/* Load address and request read */ |
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ind_addr = MV_INDIRECT_READ | (addr << MV_INDIRECT_ADDR_S) | reg; |
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bus->write(bus, base_addr, MV_INDIRECT_REG_CMD, |
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ind_addr); |
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/* Wait until it's ready */ |
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mvsw6171_wait_mask_raw(bus, base_addr, MV_INDIRECT_REG_CMD, |
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MV_INDIRECT_INPROGRESS, 0); |
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/* Read the requested data */ |
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return bus->read(bus, base_addr, MV_INDIRECT_REG_DATA); |
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} |
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static void |
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w16(struct mii_bus *bus, bool indirect, int base_addr, int addr, |
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int reg, u16 val) |
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{ |
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u16 ind_addr; |
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if (!indirect) { |
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bus->write(bus, addr, reg, val); |
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return; |
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} |
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/* Indirect write: First, make sure switch is free */ |
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mvsw6171_wait_mask_raw(bus, base_addr, MV_INDIRECT_REG_CMD, |
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MV_INDIRECT_INPROGRESS, 0); |
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/* Load the data to be written */ |
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bus->write(bus, base_addr, MV_INDIRECT_REG_DATA, val); |
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/* Wait again for switch to be free */ |
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mvsw6171_wait_mask_raw(bus, base_addr, MV_INDIRECT_REG_CMD, |
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MV_INDIRECT_INPROGRESS, 0); |
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/* Load address, and issue write command */ |
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ind_addr = MV_INDIRECT_WRITE | (addr << MV_INDIRECT_ADDR_S) | reg; |
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bus->write(bus, base_addr, MV_INDIRECT_REG_CMD, |
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ind_addr); |
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} |
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/* swconfig support */ |
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static inline u16 |
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sr16(struct switch_dev *dev, int addr, int reg) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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return r16(state->bus, state->is_indirect, state->base_addr, addr, reg); |
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} |
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static inline void |
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sw16(struct switch_dev *dev, int addr, int reg, u16 val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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w16(state->bus, state->is_indirect, state->base_addr, addr, reg, val); |
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} |
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static int |
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mvsw6171_wait_mask_s(struct switch_dev *dev, int addr, |
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int reg, u16 mask, u16 val) |
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{ |
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int i = 100; |
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u16 r; |
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do { |
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r = sr16(dev, addr, reg) & mask; |
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if (r == val) |
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return 0; |
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} while (--i > 0); |
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return -ETIMEDOUT; |
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} |
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static int |
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mvsw6171_get_port_mask(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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char *buf = state->buf; |
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int port, len, i; |
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u16 reg; |
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port = val->port_vlan; |
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reg = sr16(dev, MV_PORTREG(VLANMAP, port)) & MV_PORTS_MASK; |
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len = sprintf(buf, "0x%04x: ", reg); |
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for (i = 0; i < MV_PORTS; i++) { |
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if (reg & (1 << i)) |
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len += sprintf(buf + len, "%d ", i); |
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else if (i == port) |
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len += sprintf(buf + len, "(%d) ", i); |
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} |
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val->value.s = buf; |
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return 0; |
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} |
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static int |
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mvsw6171_get_port_qmode(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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val->value.i = state->ports[val->port_vlan].qmode; |
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return 0; |
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} |
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static int |
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mvsw6171_set_port_qmode(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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state->ports[val->port_vlan].qmode = val->value.i; |
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return 0; |
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} |
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static int |
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mvsw6171_get_pvid(struct switch_dev *dev, int port, int *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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*val = state->ports[port].pvid; |
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return 0; |
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} |
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static int |
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mvsw6171_set_pvid(struct switch_dev *dev, int port, int val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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if (val < 0 || val >= MV_VLANS) |
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return -EINVAL; |
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state->ports[port].pvid = (u16)val; |
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return 0; |
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} |
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static int |
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mvsw6171_get_port_status(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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char *buf = state->buf; |
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u16 status, speed; |
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int len; |
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status = sr16(dev, MV_PORTREG(STATUS, val->port_vlan)); |
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speed = (status & MV_PORT_STATUS_SPEED_MASK) >> |
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MV_PORT_STATUS_SPEED_SHIFT; |
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len = sprintf(buf, "link: "); |
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if (status & MV_PORT_STATUS_LINK) { |
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len += sprintf(buf + len, "up, speed: "); |
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switch (speed) { |
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case MV_PORT_STATUS_SPEED_10: |
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len += sprintf(buf + len, "10"); |
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break; |
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case MV_PORT_STATUS_SPEED_100: |
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len += sprintf(buf + len, "100"); |
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break; |
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case MV_PORT_STATUS_SPEED_1000: |
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len += sprintf(buf + len, "1000"); |
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break; |
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} |
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len += sprintf(buf + len, " Mbps, duplex: "); |
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if (status & MV_PORT_STATUS_FDX) |
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len += sprintf(buf + len, "full"); |
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else |
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len += sprintf(buf + len, "half"); |
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} else { |
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len += sprintf(buf + len, "down"); |
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} |
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val->value.s = buf; |
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return 0; |
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} |
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static int |
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mvsw6171_get_port_speed(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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u16 status, speed; |
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status = sr16(dev, MV_PORTREG(STATUS, val->port_vlan)); |
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speed = (status & MV_PORT_STATUS_SPEED_MASK) >> |
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MV_PORT_STATUS_SPEED_SHIFT; |
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val->value.i = 0; |
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if (status & MV_PORT_STATUS_LINK) { |
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switch (speed) { |
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case MV_PORT_STATUS_SPEED_10: |
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val->value.i = 10; |
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break; |
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case MV_PORT_STATUS_SPEED_100: |
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val->value.i = 100; |
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break; |
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case MV_PORT_STATUS_SPEED_1000: |
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val->value.i = 1000; |
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break; |
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} |
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} |
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return 0; |
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} |
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static int mvsw6171_get_vlan_ports(struct switch_dev *dev, |
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struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int i, j, mode, vno; |
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vno = val->port_vlan; |
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if (vno <= 0 || vno >= dev->vlans) |
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return -EINVAL; |
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for (i = 0, j = 0; i < dev->ports; i++) { |
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if (state->vlans[vno].mask & (1 << i)) { |
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val->value.ports[j].id = i; |
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mode = (state->vlans[vno].port_mode >> (i * 4)) & 0xf; |
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if (mode == MV_VTUCTL_EGRESS_TAGGED) |
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val->value.ports[j].flags = |
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(1 << SWITCH_PORT_FLAG_TAGGED); |
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else |
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val->value.ports[j].flags = 0; |
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j++; |
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} |
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} |
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val->len = j; |
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return 0; |
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} |
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static int mvsw6171_set_vlan_ports(struct switch_dev *dev, |
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struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int i, mode, pno, vno; |
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vno = val->port_vlan; |
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if (vno <= 0 || vno >= dev->vlans) |
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return -EINVAL; |
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state->vlans[vno].mask = 0; |
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state->vlans[vno].port_mode = 0; |
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if(state->vlans[vno].vid == 0) |
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state->vlans[vno].vid = vno; |
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for (i = 0; i < val->len; i++) { |
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pno = val->value.ports[i].id; |
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state->vlans[vno].mask |= (1 << pno); |
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if (val->value.ports[i].flags & |
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(1 << SWITCH_PORT_FLAG_TAGGED)) |
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mode = MV_VTUCTL_EGRESS_TAGGED; |
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else |
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mode = MV_VTUCTL_EGRESS_UNTAGGED; |
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state->vlans[vno].port_mode |= mode << (pno * 4); |
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} |
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/*
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* DISCARD is nonzero, so it must be explicitly |
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* set on ports not in the VLAN. |
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*/ |
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for (i = 0; i < dev->ports; i++) |
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if (!(state->vlans[vno].mask & (1 << i))) |
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state->vlans[vno].port_mode |= |
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MV_VTUCTL_DISCARD << (i * 4); |
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return 0; |
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} |
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static int mvsw6171_get_vlan_port_based(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int vno = val->port_vlan; |
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if (vno <= 0 || vno >= dev->vlans) |
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return -EINVAL; |
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if (state->vlans[vno].port_based) |
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val->value.i = 1; |
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else |
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val->value.i = 0; |
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return 0; |
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} |
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static int mvsw6171_set_vlan_port_based(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int vno = val->port_vlan; |
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if (vno <= 0 || vno >= dev->vlans) |
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return -EINVAL; |
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if (val->value.i == 1) |
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state->vlans[vno].port_based = true; |
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else |
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state->vlans[vno].port_based = false; |
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return 0; |
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} |
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static int mvsw6171_get_vid(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int vno = val->port_vlan; |
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if (vno <= 0 || vno >= dev->vlans) |
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return -EINVAL; |
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val->value.i = state->vlans[vno].vid; |
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return 0; |
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} |
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static int mvsw6171_set_vid(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int vno = val->port_vlan; |
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if (vno <= 0 || vno >= dev->vlans) |
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return -EINVAL; |
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state->vlans[vno].vid = val->value.i; |
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return 0; |
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} |
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static int mvsw6171_get_enable_vlan(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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val->value.i = state->vlan_enabled; |
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return 0; |
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} |
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static int mvsw6171_set_enable_vlan(struct switch_dev *dev, |
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const struct switch_attr *attr, struct switch_val *val) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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state->vlan_enabled = val->value.i; |
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return 0; |
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} |
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static int mvsw6171_vtu_program(struct switch_dev *dev) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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u16 v1, v2; |
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int i; |
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/* Flush */ |
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mvsw6171_wait_mask_s(dev, MV_GLOBALREG(VTU_OP), |
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MV_VTUOP_INPROGRESS, 0); |
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sw16(dev, MV_GLOBALREG(VTU_OP), |
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MV_VTUOP_INPROGRESS | MV_VTUOP_VALID); |
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/* Write VLAN table */ |
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for (i = 1; i < dev->vlans; i++) { |
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if (state->vlans[i].mask == 0 || |
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state->vlans[i].vid == 0 || |
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state->vlans[i].port_based == true) |
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continue; |
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mvsw6171_wait_mask_s(dev, MV_GLOBALREG(VTU_OP), |
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MV_VTUOP_INPROGRESS, 0); |
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sw16(dev, MV_GLOBALREG(VTU_VID), |
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MV_VTUOP_VALID | state->vlans[i].vid); |
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v1 = (u16)(state->vlans[i].port_mode & 0xffff); |
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v2 = (u16)((state->vlans[i].port_mode >> 16) & 0xffff); |
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sw16(dev, MV_GLOBALREG(VTU_DATA1), v1); |
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sw16(dev, MV_GLOBALREG(VTU_DATA2), v2); |
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sw16(dev, MV_GLOBALREG(VTU_OP), |
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MV_VTUOP_INPROGRESS | MV_VTUOP_LOAD); |
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mvsw6171_wait_mask_s(dev, MV_GLOBALREG(VTU_OP), |
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MV_VTUOP_INPROGRESS, 0); |
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} |
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return 0; |
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} |
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static void mvsw6171_vlan_port_config(struct switch_dev *dev, int vno) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int i, mode; |
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for (i = 0; i < dev->ports; i++) { |
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if (!(state->vlans[vno].mask & (1 << i))) |
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continue; |
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mode = (state->vlans[vno].port_mode >> (i * 4)) & 0xf; |
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if(mode != MV_VTUCTL_EGRESS_TAGGED) |
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state->ports[i].pvid = state->vlans[vno].vid; |
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if (state->vlans[vno].port_based) |
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state->ports[i].mask |= state->vlans[vno].mask; |
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else |
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state->ports[i].qmode = MV_8021Q_MODE_SECURE; |
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} |
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} |
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static int mvsw6171_update_state(struct switch_dev *dev) |
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{ |
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struct mvsw6171_state *state = get_state(dev); |
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int i; |
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u16 reg; |
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if (!state->registered) |
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return -EINVAL; |
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mvsw6171_vtu_program(dev); |
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/*
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* Set 802.1q-only mode if vlan_enabled is true. |
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* |
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* Without this, even if 802.1q is enabled for |
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* a port/VLAN, it still depends on the port-based |
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* VLAN mask being set. |
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* |
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* With this setting, port-based VLANs are still |
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* functional, provided the VID is not in the VTU. |
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*/ |
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reg = sr16(dev, MV_GLOBAL2REG(SDET_POLARITY)); |
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if (state->vlan_enabled) |
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reg |= MV_8021Q_VLAN_ONLY; |
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else |
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reg &= ~MV_8021Q_VLAN_ONLY; |
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sw16(dev, MV_GLOBAL2REG(SDET_POLARITY), reg); |
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/*
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* Set port-based VLAN masks on each port |
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* based only on VLAN definitions known to |
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* the driver (i.e. in state). |
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* |
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* This means any pre-existing port mapping is |
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* wiped out once our driver is initialized. |
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*/ |
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for (i = 0; i < dev->ports; i++) { |
||||
state->ports[i].mask = 0; |
||||
state->ports[i].qmode = MV_8021Q_MODE_DISABLE; |
||||
} |
||||
|
||||
for (i = 0; i < dev->vlans; i++) |
||||
mvsw6171_vlan_port_config(dev, i); |
||||
|
||||
for (i = 0; i < dev->ports; i++) { |
||||
reg = sr16(dev, MV_PORTREG(VLANID, i)) & ~MV_PVID_MASK; |
||||
reg |= state->ports[i].pvid; |
||||
sw16(dev, MV_PORTREG(VLANID, i), reg); |
||||
|
||||
state->ports[i].mask &= ~(1 << i); |
||||
|
||||
reg = sr16(dev, MV_PORTREG(VLANMAP, i)) & ~MV_PORTS_MASK; |
||||
reg |= state->ports[i].mask; |
||||
sw16(dev, MV_PORTREG(VLANMAP, i), reg); |
||||
|
||||
reg = sr16(dev, MV_PORTREG(CONTROL2, i)) & |
||||
~MV_8021Q_MODE_MASK; |
||||
reg |= state->ports[i].qmode << MV_8021Q_MODE_SHIFT; |
||||
sw16(dev, MV_PORTREG(CONTROL2, i), reg); |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static int mvsw6171_apply(struct switch_dev *dev) |
||||
{ |
||||
return mvsw6171_update_state(dev); |
||||
} |
||||
|
||||
static int mvsw6171_reset(struct switch_dev *dev) |
||||
{ |
||||
struct mvsw6171_state *state = get_state(dev); |
||||
int i; |
||||
u16 reg; |
||||
|
||||
/* Disable all ports before reset */ |
||||
for (i = 0; i < dev->ports; i++) { |
||||
reg = sr16(dev, MV_PORTREG(CONTROL, i)) & |
||||
~MV_PORTCTRL_ENABLED; |
||||
sw16(dev, MV_PORTREG(CONTROL, i), reg); |
||||
} |
||||
|
||||
reg = sr16(dev, MV_GLOBALREG(CONTROL)) | MV_CONTROL_RESET; |
||||
|
||||
sw16(dev, MV_GLOBALREG(CONTROL), reg); |
||||
if (mvsw6171_wait_mask_s(dev, MV_GLOBALREG(CONTROL), |
||||
MV_CONTROL_RESET, 0) < 0) |
||||
return -ETIMEDOUT; |
||||
|
||||
for (i = 0; i < dev->ports; i++) { |
||||
state->ports[i].qmode = 0; |
||||
state->ports[i].mask = 0; |
||||
state->ports[i].pvid = 0; |
||||
|
||||
/* Force flow control off */ |
||||
reg = sr16(dev, MV_PORTREG(FORCE, i)) & ~MV_FORCE_FC_MASK; |
||||
reg |= MV_FORCE_FC_DISABLE; |
||||
sw16(dev, MV_PORTREG(FORCE, i), reg); |
||||
|
||||
/* Set port association vector */ |
||||
sw16(dev, MV_PORTREG(ASSOC, i), (1 << i)); |
||||
} |
||||
|
||||
for (i = 0; i < dev->vlans; i++) { |
||||
state->vlans[i].port_based = false; |
||||
state->vlans[i].mask = 0; |
||||
state->vlans[i].vid = 0; |
||||
state->vlans[i].port_mode = 0; |
||||
} |
||||
|
||||
state->vlan_enabled = 0; |
||||
|
||||
mvsw6171_update_state(dev); |
||||
|
||||
/* Re-enable ports */ |
||||
for (i = 0; i < dev->ports; i++) { |
||||
reg = sr16(dev, MV_PORTREG(CONTROL, i)) | |
||||
MV_PORTCTRL_ENABLED; |
||||
sw16(dev, MV_PORTREG(CONTROL, i), reg); |
||||
} |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
enum { |
||||
MVSW6171_ENABLE_VLAN, |
||||
}; |
||||
|
||||
enum { |
||||
MVSW6171_VLAN_PORT_BASED, |
||||
MVSW6171_VLAN_ID, |
||||
}; |
||||
|
||||
enum { |
||||
MVSW6171_PORT_MASK, |
||||
MVSW6171_PORT_QMODE, |
||||
MVSW6171_PORT_STATUS, |
||||
MVSW6171_PORT_LINK, |
||||
}; |
||||
|
||||
static const struct switch_attr mvsw6171_global[] = { |
||||
[MVSW6171_ENABLE_VLAN] = { |
||||
.id = MVSW6171_ENABLE_VLAN, |
||||
.type = SWITCH_TYPE_INT, |
||||
.name = "enable_vlan", |
||||
.description = "Enable 802.1q VLAN support", |
||||
.get = mvsw6171_get_enable_vlan, |
||||
.set = mvsw6171_set_enable_vlan, |
||||
}, |
||||
}; |
||||
|
||||
static const struct switch_attr mvsw6171_vlan[] = { |
||||
[MVSW6171_VLAN_PORT_BASED] = { |
||||
.id = MVSW6171_VLAN_PORT_BASED, |
||||
.type = SWITCH_TYPE_INT, |
||||
.name = "port_based", |
||||
.description = "Use port-based (non-802.1q) VLAN only", |
||||
.get = mvsw6171_get_vlan_port_based, |
||||
.set = mvsw6171_set_vlan_port_based, |
||||
}, |
||||
[MVSW6171_VLAN_ID] = { |
||||
.id = MVSW6171_VLAN_ID, |
||||
.type = SWITCH_TYPE_INT, |
||||
.name = "vid", |
||||
.description = "Get/set VLAN ID", |
||||
.get = mvsw6171_get_vid, |
||||
.set = mvsw6171_set_vid, |
||||
}, |
||||
}; |
||||
|
||||
static const struct switch_attr mvsw6171_port[] = { |
||||
[MVSW6171_PORT_MASK] = { |
||||
.id = MVSW6171_PORT_MASK, |
||||
.type = SWITCH_TYPE_STRING, |
||||
.description = "Port-based VLAN mask", |
||||
.name = "mask", |
||||
.get = mvsw6171_get_port_mask, |
||||
.set = NULL, |
||||
}, |
||||
[MVSW6171_PORT_QMODE] = { |
||||
.id = MVSW6171_PORT_QMODE, |
||||
.type = SWITCH_TYPE_INT, |
||||
.description = "802.1q mode: 0=off/1=fallback/2=check/3=secure", |
||||
.name = "qmode", |
||||
.get = mvsw6171_get_port_qmode, |
||||
.set = mvsw6171_set_port_qmode, |
||||
}, |
||||
[MVSW6171_PORT_STATUS] = { |
||||
.id = MVSW6171_PORT_STATUS, |
||||
.type = SWITCH_TYPE_STRING, |
||||
.description = "Return port status", |
||||
.name = "status", |
||||
.get = mvsw6171_get_port_status, |
||||
.set = NULL, |
||||
}, |
||||
[MVSW6171_PORT_LINK] = { |
||||
.id = MVSW6171_PORT_LINK, |
||||
.type = SWITCH_TYPE_INT, |
||||
.description = "Get link speed", |
||||
.name = "link", |
||||
.get = mvsw6171_get_port_speed, |
||||
.set = NULL, |
||||
}, |
||||
}; |
||||
|
||||
static const struct switch_dev_ops mvsw6171_ops = { |
||||
.attr_global = { |
||||
.attr = mvsw6171_global, |
||||
.n_attr = ARRAY_SIZE(mvsw6171_global), |
||||
}, |
||||
.attr_vlan = { |
||||
.attr = mvsw6171_vlan, |
||||
.n_attr = ARRAY_SIZE(mvsw6171_vlan), |
||||
}, |
||||
.attr_port = { |
||||
.attr = mvsw6171_port, |
||||
.n_attr = ARRAY_SIZE(mvsw6171_port), |
||||
}, |
||||
.get_port_pvid = mvsw6171_get_pvid, |
||||
.set_port_pvid = mvsw6171_set_pvid, |
||||
.get_vlan_ports = mvsw6171_get_vlan_ports, |
||||
.set_vlan_ports = mvsw6171_set_vlan_ports, |
||||
.apply_config = mvsw6171_apply, |
||||
.reset_switch = mvsw6171_reset, |
||||
}; |
||||
|
||||
/* end swconfig stuff */ |
||||
|
||||
static int mvsw6171_probe(struct platform_device *pdev) |
||||
{ |
||||
struct mvsw6171_state *state; |
||||
struct device_node *np = pdev->dev.of_node; |
||||
struct device_node *mdio; |
||||
u32 val; |
||||
u16 reg; |
||||
int err; |
||||
|
||||
state = kzalloc(sizeof(*state), GFP_KERNEL); |
||||
if (!state) |
||||
return -ENOMEM; |
||||
|
||||
mdio = of_parse_phandle(np, "mii-bus", 0); |
||||
if (!mdio) { |
||||
dev_err(&pdev->dev, "Couldn't get MII bus handle\n"); |
||||
err = -ENODEV; |
||||
goto out_err; |
||||
} |
||||
|
||||
state->bus = of_mdio_find_bus(mdio); |
||||
if (!state->bus) { |
||||
dev_err(&pdev->dev, "Couldn't find MII bus from handle\n"); |
||||
err = -ENODEV; |
||||
goto out_err; |
||||
} |
||||
|
||||
state->is_indirect = of_property_read_bool(np, "is-indirect"); |
||||
|
||||
if (state->is_indirect) { |
||||
if (of_property_read_u32(np, "reg", &val)) { |
||||
dev_err(&pdev->dev, "Switch address not specified\n"); |
||||
err = -ENODEV; |
||||
goto out_err; |
||||
} |
||||
|
||||
state->base_addr = val; |
||||
} else { |
||||
state->base_addr = MV_BASE; |
||||
} |
||||
|
||||
reg = r16(state->bus, state->is_indirect, state->base_addr, |
||||
MV_PORTREG(IDENT, 0)) & MV_IDENT_MASK; |
||||
if (reg != MV_IDENT_VALUE) { |
||||
dev_err(&pdev->dev, "No switch found at 0x%02x\n", |
||||
state->base_addr); |
||||
err = -ENODEV; |
||||
goto out_err; |
||||
} |
||||
|
||||
platform_set_drvdata(pdev, state); |
||||
dev_info(&pdev->dev, "Found %s at %s:%02x\n", MV_IDENT_STR, |
||||
state->bus->id, state->base_addr); |
||||
|
||||
dev_info(&pdev->dev, "Using %sdirect addressing\n", |
||||
(state->is_indirect ? "in" : "")); |
||||
|
||||
if (of_property_read_u32(np, "cpu-port-0", &val)) { |
||||
dev_err(&pdev->dev, "CPU port not set\n"); |
||||
err = -ENODEV; |
||||
goto out_err; |
||||
} |
||||
|
||||
state->cpu_port0 = val; |
||||
|
||||
if (!of_property_read_u32(np, "cpu-port-1", &val)) |
||||
state->cpu_port1 = val; |
||||
else |
||||
state->cpu_port1 = -1; |
||||
|
||||
state->dev.vlans = MV_VLANS; |
||||
state->dev.cpu_port = state->cpu_port0; |
||||
state->dev.ports = MV_PORTS; |
||||
state->dev.name = MV_IDENT_STR; |
||||
state->dev.ops = &mvsw6171_ops; |
||||
state->dev.alias = dev_name(&pdev->dev); |
||||
|
||||
err = register_switch(&state->dev, NULL); |
||||
if (err < 0) |
||||
goto out_err; |
||||
|
||||
state->registered = true; |
||||
|
||||
return 0; |
||||
out_err: |
||||
kfree(state); |
||||
return err; |
||||
} |
||||
|
||||
static int |
||||
mvsw6171_remove(struct platform_device *pdev) |
||||
{ |
||||
struct mvsw6171_state *state = platform_get_drvdata(pdev); |
||||
|
||||
if (state->registered) |
||||
unregister_switch(&state->dev); |
||||
|
||||
kfree(state); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static const struct of_device_id mvsw6171_match[] = { |
||||
{ .compatible = "marvell,88e6171" }, |
||||
{ } |
||||
}; |
||||
MODULE_DEVICE_TABLE(of, mvsw6171_match); |
||||
|
||||
static struct platform_driver mvsw6171_driver = { |
||||
.probe = mvsw6171_probe, |
||||
.remove = mvsw6171_remove, |
||||
.driver = { |
||||
.name = "mvsw6171", |
||||
.of_match_table = of_match_ptr(mvsw6171_match), |
||||
.owner = THIS_MODULE, |
||||
}, |
||||
}; |
||||
|
||||
static int __init mvsw6171_module_init(void) |
||||
{ |
||||
return platform_driver_register(&mvsw6171_driver); |
||||
} |
||||
late_initcall(mvsw6171_module_init); |
||||
|
||||
static void __exit mvsw6171_module_exit(void) |
||||
{ |
||||
platform_driver_unregister(&mvsw6171_driver); |
||||
} |
||||
module_exit(mvsw6171_module_exit); |
@ -0,0 +1,230 @@ |
||||
/*
|
||||
* Marvell 88E6171 switch driver |
||||
* |
||||
* Copyright (c) 2014 Claudio Leite <leitec@staticky.com> |
||||
* |
||||
* Based on code (c) 2008 Felix Fietkau <nbd@openwrt.org> |
||||
* |
||||
* This program is free software; you can redistribute it and/or modify it |
||||
* under the terms of the GNU General Public License v2 as published by the |
||||
* Free Software Foundation |
||||
*/ |
||||
|
||||
#ifndef __MVSW6171_H |
||||
#define __MVSW6171_H |
||||
|
||||
#define MV_PORTS 7 |
||||
#define MV_PORTS_MASK ((1 << MV_PORTS) - 1) |
||||
|
||||
#define MV_CPUPORT 6 |
||||
|
||||
#define MV_BASE 0x10 |
||||
|
||||
#define MV_SWITCHPORT_BASE 0x10 |
||||
#define MV_SWITCHPORT(_n) (MV_SWITCHPORT_BASE + (_n)) |
||||
#define MV_SWITCHREGS (MV_BASE + 0xb) |
||||
|
||||
#define MV_VLANS 64 |
||||
|
||||
enum { |
||||
MV_PORT_STATUS = 0x00, |
||||
MV_PORT_FORCE = 0x01, |
||||
MV_PORT_PAUSE = 0x02, |
||||
MV_PORT_IDENT = 0x03, |
||||
MV_PORT_CONTROL = 0x04, |
||||
MV_PORT_CONTROL1 = 0x05, |
||||
MV_PORT_VLANMAP = 0x06, |
||||
MV_PORT_VLANID = 0x07, |
||||
MV_PORT_CONTROL2 = 0x08, |
||||
MV_PORT_ASSOC = 0x0b, |
||||
MV_PORT_RXCOUNT = 0x10, |
||||
MV_PORT_TXCOUNT = 0x11, |
||||
}; |
||||
#define MV_PORTREG(_type, _port) MV_SWITCHPORT(_port), MV_PORT_##_type |
||||
|
||||
enum { |
||||
MV_PORT_STATUS_FDX = (1 << 10), |
||||
MV_PORT_STATUS_LINK = (1 << 11), |
||||
}; |
||||
|
||||
enum { |
||||
MV_PORT_STATUS_SPEED_10 = 0x00, |
||||
MV_PORT_STATUS_SPEED_100 = 0x01, |
||||
MV_PORT_STATUS_SPEED_1000 = 0x02, |
||||
}; |
||||
#define MV_PORT_STATUS_SPEED_SHIFT 8 |
||||
#define MV_PORT_STATUS_SPEED_MASK (3 << 8) |
||||
|
||||
enum { |
||||
MV_PORTCTRL_BLOCK = (1 << 0), |
||||
MV_PORTCTRL_LEARN = (2 << 0), |
||||
MV_PORTCTRL_ENABLED = (3 << 0), |
||||
MV_PORTCTRL_VLANTUN = (1 << 7), |
||||
MV_PORTCTRL_EGRESS = (1 << 12), |
||||
}; |
||||
|
||||
#define MV_FORCE_FC_MASK (3 << 6) |
||||
|
||||
enum { |
||||
MV_FORCE_FC_ENABLE = (3 << 6), |
||||
MV_FORCE_FC_DISABLE = (1 << 6), |
||||
}; |
||||
|
||||
enum { |
||||
MV_8021Q_EGRESS_UNMODIFIED = 0x00, |
||||
MV_8021Q_EGRESS_UNTAGGED = 0x01, |
||||
MV_8021Q_EGRESS_TAGGED = 0x02, |
||||
MV_8021Q_EGRESS_ADDTAG = 0x03, |
||||
}; |
||||
|
||||
#define MV_8021Q_MODE_SHIFT 10 |
||||
#define MV_8021Q_MODE_MASK (0x3 << MV_8021Q_MODE_SHIFT) |
||||
|
||||
enum { |
||||
MV_8021Q_MODE_DISABLE = 0x00, |
||||
MV_8021Q_MODE_FALLBACK = 0x01, |
||||
MV_8021Q_MODE_CHECK = 0x02, |
||||
MV_8021Q_MODE_SECURE = 0x03, |
||||
}; |
||||
|
||||
#define MV_PORTASSOC_MONITOR (1 << 15) |
||||
|
||||
enum { |
||||
MV_SWITCH_MAC0 = 0x01, |
||||
MV_SWITCH_MAC1 = 0x02, |
||||
MV_SWITCH_MAC2 = 0x03, |
||||
MV_SWITCH_CTRL = 0x04, |
||||
MV_SWITCH_ATU_CTRL = 0x0a, |
||||
MV_SWITCH_ATU_OP = 0x0b, |
||||
MV_SWITCH_ATU_DATA = 0x0c, |
||||
MV_SWITCH_ATU_MAC0 = 0x0d, |
||||
MV_SWITCH_ATU_MAC1 = 0x0e, |
||||
MV_SWITCH_ATU_MAC2 = 0x0f, |
||||
MV_SWITCH_GLOBAL = 0x1b, |
||||
MV_SWITCH_GLOBAL2 = 0x1c, |
||||
}; |
||||
#define MV_SWITCHREG(_type) MV_SWITCHREGS, MV_SWITCH_##_type |
||||
|
||||
enum { |
||||
MV_SWITCHCTL_EEIE = (1 << 0), |
||||
MV_SWITCHCTL_PHYIE = (1 << 1), |
||||
MV_SWITCHCTL_ATUDONE = (1 << 2), |
||||
MV_SWITCHCTL_ATUIE = (1 << 3), |
||||
MV_SWITCHCTL_CTRMODE = (1 << 8), |
||||
MV_SWITCHCTL_RELOAD = (1 << 9), |
||||
MV_SWITCHCTL_MSIZE = (1 << 10), |
||||
MV_SWITCHCTL_DROP = (1 << 13), |
||||
}; |
||||
|
||||
enum { |
||||
#define MV_ATUCTL_AGETIME_MIN 16 |
||||
#define MV_ATUCTL_AGETIME_MAX 4080 |
||||
#define MV_ATUCTL_AGETIME(_n) ((((_n) / 16) & 0xff) << 4) |
||||
MV_ATUCTL_ATU_256 = (0 << 12), |
||||
MV_ATUCTL_ATU_512 = (1 << 12), |
||||
MV_ATUCTL_ATU_1K = (2 << 12), |
||||
MV_ATUCTL_ATUMASK = (3 << 12), |
||||
MV_ATUCTL_NO_LEARN = (1 << 14), |
||||
MV_ATUCTL_RESET = (1 << 15), |
||||
}; |
||||
|
||||
enum { |
||||
#define MV_ATUOP_DBNUM(_n) ((_n) & 0x0f) |
||||
MV_ATUOP_NOOP = (0 << 12), |
||||
MV_ATUOP_FLUSH_ALL = (1 << 12), |
||||
MV_ATUOP_FLUSH_U = (2 << 12), |
||||
MV_ATUOP_LOAD_DB = (3 << 12), |
||||
MV_ATUOP_GET_NEXT = (4 << 12), |
||||
MV_ATUOP_FLUSH_DB = (5 << 12), |
||||
MV_ATUOP_FLUSH_DB_UU = (6 << 12), |
||||
MV_ATUOP_INPROGRESS = (1 << 15), |
||||
}; |
||||
|
||||
enum { |
||||
MV_GLOBAL_STATUS = 0x00, |
||||
MV_GLOBAL_CONTROL = 0x04, |
||||
MV_GLOBAL_VTU_OP = 0x05, |
||||
MV_GLOBAL_VTU_VID = 0x06, |
||||
MV_GLOBAL_VTU_DATA1 = 0x07, |
||||
MV_GLOBAL_VTU_DATA2 = 0x08, |
||||
MV_GLOBAL_VTU_DATA3 = 0x09, |
||||
}; |
||||
#define MV_GLOBALREG(_type) MV_SWITCH_GLOBAL, MV_GLOBAL_##_type |
||||
|
||||
enum { |
||||
MV_GLOBAL2_SDET_POLARITY = 0x1D, |
||||
}; |
||||
#define MV_GLOBAL2REG(_type) MV_SWITCH_GLOBAL2, MV_GLOBAL2_##_type |
||||
|
||||
enum { |
||||
MV_VTUOP_VALID = (1 << 12), |
||||
MV_VTUOP_LOAD = (3 << 12), |
||||
MV_VTUOP_INPROGRESS = (1 << 15), |
||||
}; |
||||
|
||||
enum { |
||||
MV_CONTROL_RESET = (1 << 15), |
||||
MV_CONTROL_PPU_ENABLE = (1 << 14), |
||||
}; |
||||
|
||||
enum { |
||||
MV_VTUCTL_EGRESS_UNMODIFIED = 0x00, |
||||
MV_VTUCTL_EGRESS_UNTAGGED = 0x01, |
||||
MV_VTUCTL_EGRESS_TAGGED = 0x02, |
||||
MV_VTUCTL_DISCARD = 0x03, |
||||
}; |
||||
|
||||
enum { |
||||
MV_8021Q_VLAN_ONLY = (1 << 15), |
||||
}; |
||||
|
||||
enum { |
||||
MV_INDIRECT_REG_CMD = 0, |
||||
MV_INDIRECT_REG_DATA = 1, |
||||
}; |
||||
|
||||
enum { |
||||
MV_INDIRECT_INPROGRESS = 0x8000, |
||||
MV_INDIRECT_WRITE = 0x9400, |
||||
MV_INDIRECT_READ = 0x9800, |
||||
}; |
||||
#define MV_INDIRECT_ADDR_S 5 |
||||
|
||||
#define MV_IDENT_MASK 0xffc0 |
||||
#define MV_IDENT_VALUE 0x1700 |
||||
#define MV_IDENT_STR "MV88E6171" |
||||
|
||||
#define MV_PVID_MASK 0x0fff |
||||
|
||||
struct mvsw6171_state { |
||||
struct switch_dev dev; |
||||
struct mii_bus *bus; |
||||
int base_addr; |
||||
|
||||
bool registered; |
||||
bool is_indirect; |
||||
|
||||
int cpu_port0; |
||||
int cpu_port1; |
||||
|
||||
int vlan_enabled; |
||||
struct port_state { |
||||
u16 pvid; |
||||
u16 mask; |
||||
u8 qmode; |
||||
} ports[MV_PORTS]; |
||||
|
||||
struct vlan_state { |
||||
bool port_based; |
||||
|
||||
u16 mask; |
||||
u16 vid; |
||||
u32 port_mode; |
||||
} vlans[MV_VLANS]; |
||||
|
||||
char buf[128]; |
||||
}; |
||||
|
||||
#define get_state(_dev) container_of((_dev), struct mvsw6171_state, dev) |
||||
|
||||
#endif |
@ -0,0 +1,23 @@ |
||||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -131,6 +131,10 @@ config MVSWITCH_PHY
|
||||
tristate "Driver for Marvell 88E6060 switches"
|
||||
select ETHERNET_PACKET_MANGLE
|
||||
|
||||
+config MVSW6171_PHY
|
||||
+ tristate "Driver for Marvell 88E6171 switches"
|
||||
+ select SWCONFIG
|
||||
+
|
||||
config IP17XX_PHY
|
||||
tristate "Driver for IC+ IP17xx switches"
|
||||
select SWCONFIG
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -19,6 +19,7 @@ obj-$(CONFIG_BCM87XX_PHY) += bcm87xx.o
|
||||
obj-$(CONFIG_ICPLUS_PHY) += icplus.o
|
||||
obj-$(CONFIG_ADM6996_PHY) += adm6996.o
|
||||
obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
|
||||
+obj-$(CONFIG_MVSW6171_PHY) += mvsw6171.o
|
||||
obj-$(CONFIG_IP17XX_PHY) += ip17xx.o
|
||||
obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
obj-$(CONFIG_AR8216_PHY) += ar8216.o
|
@ -0,0 +1,23 @@ |
||||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -143,6 +143,10 @@ config MVSWITCH_PHY
|
||||
tristate "Driver for Marvell 88E6060 switches"
|
||||
select ETHERNET_PACKET_MANGLE
|
||||
|
||||
+config MVSW6171_PHY
|
||||
+ tristate "Driver for Marvell 88E6171 switches"
|
||||
+ select SWCONFIG
|
||||
+
|
||||
config IP17XX_PHY
|
||||
tristate "Driver for IC+ IP17xx switches"
|
||||
select SWCONFIG
|
||||
--- a/drivers/net/phy/Makefile
|
||||
+++ b/drivers/net/phy/Makefile
|
||||
@@ -20,6 +20,7 @@ obj-$(CONFIG_BCM87XX_PHY) += bcm87xx.o
|
||||
obj-$(CONFIG_ICPLUS_PHY) += icplus.o
|
||||
obj-$(CONFIG_ADM6996_PHY) += adm6996.o
|
||||
obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
|
||||
+obj-$(CONFIG_MVSW6171_PHY) += mvsw6171.o
|
||||
obj-$(CONFIG_IP17XX_PHY) += ip17xx.o
|
||||
obj-$(CONFIG_REALTEK_PHY) += realtek.o
|
||||
obj-$(CONFIG_AR8216_PHY) += ar8216.o
|
Loading…
Reference in new issue