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@ -30,5 +30,25 @@ |
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#define _CONFADDR_DBGLED (_VIRT_CONFADDR + _CONFOFFSET_DBGLED) |
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#define _CONFADDR_SYSDBG (_VIRT_CONFADDR + _CONFOFFSET_SYSDBG) |
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/* System configuration and bootstrap registers */ |
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#define SYSDBG_BS1 0x00 |
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#define CPU_FREQ_SHIFT 27 |
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#define CPU_FREQ_MASK 0x0F |
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#define SDRAM_FREQ_BIT (1 << 22) |
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#define SYSDBG_BS2 0x04 |
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#define LED_CFG_MASK 0x03 |
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#define CPU_MODE_SHIFT 23 |
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#define CPU_MODE_MASK 0x03 |
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#define SYSDBG_SYSCTL_MAC 0x1d |
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#define BUF_SHIFT_BIT (1 << 0) |
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#define SYSDBG_SYSCTL 0x08 |
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#define SYSCTL_EMAC (1 << 0) |
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#define SYSCTL_CIPHER (1 << 16) |
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#define SYSDBG_PLL_CTL 0x3C |
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#endif /* __ASM_ARCH_MCS814X_H */ |
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