Signed-off-by: Imre Kaloz <kaloz@openwrt.org> SVN-Revision: 43401master
Imre Kaloz
10 years ago
parent
200c30b426
commit
974f286261
@ -0,0 +1,37 @@ |
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#!/bin/sh |
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. /lib/functions/system.sh |
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. /lib/ar71xx.sh |
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firmware_file="/lib/firmware/ath10k/QCA988X/hw2.0/firmware-3.bin" |
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firmware_md5_orig="5163aa8de591f80b06c77f22e9777473" |
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firmware_md5_current="$(md5sum $firmware_file)" |
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firmware_md5_current="${firmware_md5_current%% *}" |
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do_patch_ath10k_firmware() { |
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# verify md5sum before patching |
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[ "firmware_md5_orig" != "firmware_md5_current" ] || { |
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return |
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} |
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# some boards have bogus mac in otp, patch the default mac in the firmware |
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case $(ar71xx_board_name) in |
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dgl-5500-a1) |
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local mac |
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mac=$(mtd_get_mac_ascii nvram wlan1_mac) |
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cp $firmware_file /tmp/ath10k-firmware.bin |
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macaddr_2bin $mac | dd of=/tmp/ath10k-firmware.bin \ |
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conv=notrunc bs=1 seek=280 count=6 |
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;; |
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esac |
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[ -f /tmp/ath10k-firmware.bin ] || { |
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return |
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} |
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cp /tmp/ath10k-firmware.bin $firmware_file |
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rm /tmp/ath10k-firmware.bin |
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} |
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boot_hook_add preinit_main do_patch_ath10k_firmware |
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@ -0,0 +1,150 @@ |
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/*
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* D-Link DGL-5500 board support |
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* |
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* Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org> |
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* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org> |
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* |
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* This program is free software; you can redistribute it and/or modify it |
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* under the terms of the GNU General Public License version 2 as published |
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* by the Free Software Foundation. |
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*/ |
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#include <linux/gpio.h> |
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#include <linux/platform_device.h> |
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#include <linux/ar8216_platform.h> |
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#include <asm/mach-ath79/ar71xx_regs.h> |
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#include "common.h" |
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#include "pci.h" |
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#include "dev-gpio-buttons.h" |
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#include "dev-eth.h" |
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#include "dev-leds-gpio.h" |
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#include "dev-m25p80.h" |
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#include "dev-usb.h" |
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#include "dev-wmac.h" |
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#include "machtypes.h" |
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#define DGL_5500_A1_GPIO_LED_POWER_ORANGE 14 |
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#define DGL_5500_A1_GPIO_LED_POWER_GREEN 19 |
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#define DGL_5500_A1_GPIO_LED_PLANET_GREEN 22 |
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#define DGL_5500_A1_GPIO_LED_PLANET_ORANGE 23 |
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#define DGL_5500_A1_GPIO_BTN_WPS 16 |
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#define DGL_5500_A1_GPIO_BTN_RESET 17 |
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#define DGL_5500_A1_KEYS_POLL_INTERVAL 20 /* msecs */ |
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#define DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL \ |
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(3 * DGL_5500_A1_KEYS_POLL_INTERVAL) |
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#define DGL_5500_A1_WMAC_CALDATA_OFFSET 0x1000 |
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#define DGL_5500_A1_LAN_MAC_OFFSET 0x04 |
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#define DGL_5500_A1_WAN_MAC_OFFSET 0x16 |
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static struct gpio_led dgl_5500_a1_leds_gpio[] __initdata = { |
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{ |
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.name = "d-link:green:power", |
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.gpio = DGL_5500_A1_GPIO_LED_POWER_GREEN, |
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.active_low = 1, |
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}, |
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{ |
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.name = "d-link:orange:power", |
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.gpio = DGL_5500_A1_GPIO_LED_POWER_ORANGE, |
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.active_low = 1, |
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}, |
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{ |
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.name = "d-link:green:planet", |
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.gpio = DGL_5500_A1_GPIO_LED_PLANET_GREEN, |
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.active_low = 1, |
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}, |
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{ |
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.name = "d-link:orange:planet", |
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.gpio = DGL_5500_A1_GPIO_LED_PLANET_ORANGE, |
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.active_low = 1, |
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}, |
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}; |
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static struct gpio_keys_button dgl_5500_a1_gpio_keys[] __initdata = { |
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{ |
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.desc = "Reset button", |
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.type = EV_KEY, |
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.code = KEY_RESTART, |
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.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = DGL_5500_A1_GPIO_BTN_RESET, |
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.active_low = 1, |
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}, |
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{ |
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.desc = "WPS button", |
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.type = EV_KEY, |
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.code = KEY_WPS_BUTTON, |
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.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL, |
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.gpio = DGL_5500_A1_GPIO_BTN_WPS, |
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.active_low = 1, |
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}, |
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}; |
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static struct ar8327_pad_cfg dgl_5500_a1_ar8327_pad0_cfg = { |
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/* Use the SGMII interface for the GMAC0 of the AR8327 switch */ |
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.mode = AR8327_PAD_MAC_SGMII, |
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.sgmii_delay_en = true, |
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}; |
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static struct ar8327_platform_data dgl_5500_a1_ar8327_data = { |
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.pad0_cfg = &dgl_5500_a1_ar8327_pad0_cfg, |
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.port0_cfg = { |
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.force_link = 1, |
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.speed = AR8327_PORT_SPEED_1000, |
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.duplex = 1, |
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.txpause = 1, |
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.rxpause = 1, |
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}, |
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}; |
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static struct mdio_board_info dgl_5500_a1_mdio0_info[] = { |
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{ |
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.bus_id = "ag71xx-mdio.0", |
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.phy_addr = 0, |
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.platform_data = &dgl_5500_a1_ar8327_data, |
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}, |
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}; |
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static void __init dgl_5500_a1_setup(void) |
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{ |
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u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000); |
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); |
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u8 lan_mac[ETH_ALEN]; |
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ath79_parse_ascii_mac(mac + DGL_5500_A1_LAN_MAC_OFFSET, lan_mac); |
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ath79_register_m25p80(NULL); |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dgl_5500_a1_leds_gpio), |
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dgl_5500_a1_leds_gpio); |
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ath79_register_gpio_keys_polled(-1, DGL_5500_A1_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(dgl_5500_a1_gpio_keys), |
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dgl_5500_a1_gpio_keys); |
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ath79_register_wmac(art + DGL_5500_A1_WMAC_CALDATA_OFFSET, lan_mac); |
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ath79_register_mdio(0, 0x0); |
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mdiobus_register_board_info(dgl_5500_a1_mdio0_info, |
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ARRAY_SIZE(dgl_5500_a1_mdio0_info)); |
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ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0); |
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/* GMAC1 is connected to an AR8327N switch via the SMGII interface */ |
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ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; |
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ath79_eth1_data.phy_mask = BIT(0); |
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ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev; |
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ath79_eth1_pll_data.pll_1000 = 0x03000101; |
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ath79_register_eth(1); |
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ath79_register_usb(); |
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ath79_register_pci(); |
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} |
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MIPS_MACHINE(ATH79_MACH_DGL_5500_A1, "DGL-5500-A1", "D-Link DGL-5500 rev. A1", |
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dgl_5500_a1_setup); |
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@ -0,0 +1,39 @@ |
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -40,6 +40,7 @@ enum ath79_mach_type {
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ATH79_MACH_CPE510, /* TP-LINK CPE510 */
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ATH79_MACH_DB120, /* Atheros DB120 reference board */
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ATH79_MACH_PB44, /* Atheros PB44 reference board */
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+ ATH79_MACH_DGL_5500_A1, /* D-link DGL-5500 rev. A1 */
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ATH79_MACH_DHP_1565_A1, /* D-Link DHP-1565 rev. A1 */
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ATH79_MACH_DIR_505_A1, /* D-Link DIR-505 rev. A1 */
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ATH79_MACH_DIR_600_A1, /* D-Link DIR-600 rev. A1 */
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -55,6 +55,7 @@ obj-$(CONFIG_ATH79_MACH_BHU_BXU2000N2_A)
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obj-$(CONFIG_ATH79_MACH_CAP4200AG) += mach-cap4200ag.o
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obj-$(CONFIG_ATH79_MACH_CPE510) += mach-cpe510.o
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obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o
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+obj-$(CONFIG_ATH79_MACH_DGL_5500_A1) += mach-dgl-5500-a1.o
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obj-$(CONFIG_ATH79_MACH_DHP_1565_A1) += mach-dhp-1565-a1.o
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obj-$(CONFIG_ATH79_MACH_DIR_505_A1) += mach-dir-505-a1.o
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obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -293,6 +293,16 @@ config ATH79_MACH_WPE72
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select ATH79_DEV_USB
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select MYLOADER
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+config ATH79_MACH_DGL_5500_A1
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+ bool "D-Link DGL-5500 A1 support"
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+ select SOC_QCA955X
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_M25P80
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+ select ATH79_DEV_WMAC
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+ select ATH79_DEV_USB
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+
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config ATH79_MACH_DHP_1565_A1
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bool "D-Link DHP-1565 rev. A1 board support"
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select SOC_AR934X
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