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@ -315,7 +315,7 @@ static u32 ar71xx_get_eth_pll(unsigned int mac, int speed) |
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return pll_val; |
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} |
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static void ar71xx_set_pll_ge0(int speed) |
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static void ar71xx_set_speed_ge0(int speed) |
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{ |
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u32 val = ar71xx_get_eth_pll(0, speed); |
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@ -323,7 +323,7 @@ static void ar71xx_set_pll_ge0(int speed) |
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val, AR71XX_ETH0_PLL_SHIFT); |
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} |
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static void ar71xx_set_pll_ge1(int speed) |
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static void ar71xx_set_speed_ge1(int speed) |
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{ |
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u32 val = ar71xx_get_eth_pll(1, speed); |
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@ -331,17 +331,17 @@ static void ar71xx_set_pll_ge1(int speed) |
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val, AR71XX_ETH1_PLL_SHIFT); |
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} |
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static void ar724x_set_pll_ge0(int speed) |
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static void ar724x_set_speed_ge0(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar724x_set_pll_ge1(int speed) |
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static void ar724x_set_speed_ge1(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar7242_set_pll_ge0(int speed) |
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static void ar7242_set_speed_ge0(int speed) |
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{ |
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u32 val = ar71xx_get_eth_pll(0, speed); |
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void __iomem *base; |
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@ -351,7 +351,7 @@ static void ar7242_set_pll_ge0(int speed) |
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iounmap(base); |
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} |
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static void ar91xx_set_pll_ge0(int speed) |
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static void ar91xx_set_speed_ge0(int speed) |
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{ |
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u32 val = ar71xx_get_eth_pll(0, speed); |
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@ -359,7 +359,7 @@ static void ar91xx_set_pll_ge0(int speed) |
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val, AR91XX_ETH0_PLL_SHIFT); |
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} |
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static void ar91xx_set_pll_ge1(int speed) |
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static void ar91xx_set_speed_ge1(int speed) |
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{ |
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u32 val = ar71xx_get_eth_pll(1, speed); |
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@ -367,22 +367,22 @@ static void ar91xx_set_pll_ge1(int speed) |
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val, AR91XX_ETH1_PLL_SHIFT); |
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} |
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static void ar933x_set_pll_ge0(int speed) |
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static void ar933x_set_speed_ge0(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar933x_set_pll_ge1(int speed) |
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static void ar933x_set_speed_ge1(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar934x_set_pll_ge0(int speed) |
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static void ar934x_set_speed_ge0(int speed) |
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{ |
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/* TODO */ |
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} |
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static void ar934x_set_pll_ge1(int speed) |
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static void ar934x_set_speed_ge1(int speed) |
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{ |
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/* TODO */ |
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} |
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@ -744,16 +744,16 @@ void __init ar71xx_add_device_eth(unsigned int id) |
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case AR71XX_SOC_AR7130: |
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pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1 |
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: ar71xx_ddr_flush_ge0; |
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pdata->set_pll = id ? ar71xx_set_pll_ge1 |
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: ar71xx_set_pll_ge0; |
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pdata->set_speed = id ? ar71xx_set_speed_ge1 |
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: ar71xx_set_speed_ge0; |
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break; |
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case AR71XX_SOC_AR7141: |
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case AR71XX_SOC_AR7161: |
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pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1 |
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: ar71xx_ddr_flush_ge0; |
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pdata->set_pll = id ? ar71xx_set_pll_ge1 |
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: ar71xx_set_pll_ge0; |
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pdata->set_speed = id ? ar71xx_set_speed_ge1 |
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: ar71xx_set_speed_ge0; |
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pdata->has_gbit = 1; |
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break; |
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@ -764,8 +764,8 @@ void __init ar71xx_add_device_eth(unsigned int id) |
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RESET_MODULE_GE1_PHY; |
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pdata->ddr_flush = id ? ar724x_ddr_flush_ge1 |
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: ar724x_ddr_flush_ge0; |
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pdata->set_pll = id ? ar724x_set_pll_ge1 |
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: ar7242_set_pll_ge0; |
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pdata->set_speed = id ? ar724x_set_speed_ge1 |
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: ar7242_set_speed_ge0; |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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@ -786,8 +786,8 @@ void __init ar71xx_add_device_eth(unsigned int id) |
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ar71xx_eth1_data.reset_bit |= RESET_MODULE_GE1_PHY; |
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pdata->ddr_flush = id ? ar724x_ddr_flush_ge1 |
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: ar724x_ddr_flush_ge0; |
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pdata->set_pll = id ? ar724x_set_pll_ge1 |
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: ar724x_set_pll_ge0; |
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pdata->set_speed = id ? ar724x_set_speed_ge1 |
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: ar724x_set_speed_ge0; |
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pdata->is_ar724x = 1; |
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if (ar71xx_soc == AR71XX_SOC_AR7240) |
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pdata->is_ar7240 = 1; |
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@ -803,16 +803,16 @@ void __init ar71xx_add_device_eth(unsigned int id) |
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case AR71XX_SOC_AR9130: |
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pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1 |
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: ar91xx_ddr_flush_ge0; |
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pdata->set_pll = id ? ar91xx_set_pll_ge1 |
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: ar91xx_set_pll_ge0; |
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pdata->set_speed = id ? ar91xx_set_speed_ge1 |
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: ar91xx_set_speed_ge0; |
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pdata->is_ar91xx = 1; |
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break; |
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case AR71XX_SOC_AR9132: |
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pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1 |
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: ar91xx_ddr_flush_ge0; |
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pdata->set_pll = id ? ar91xx_set_pll_ge1 |
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: ar91xx_set_pll_ge0; |
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pdata->set_speed = id ? ar91xx_set_speed_ge1 |
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: ar91xx_set_speed_ge0; |
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pdata->is_ar91xx = 1; |
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pdata->has_gbit = 1; |
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break; |
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@ -825,8 +825,8 @@ void __init ar71xx_add_device_eth(unsigned int id) |
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AR933X_RESET_GE1_MDIO; |
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pdata->ddr_flush = id ? ar933x_ddr_flush_ge1 |
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: ar933x_ddr_flush_ge0; |
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pdata->set_pll = id ? ar933x_set_pll_ge1 |
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: ar933x_set_pll_ge0; |
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pdata->set_speed = id ? ar933x_set_speed_ge1 |
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: ar933x_set_speed_ge0; |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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@ -847,8 +847,8 @@ void __init ar71xx_add_device_eth(unsigned int id) |
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AR934X_RESET_GE1_MDIO; |
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pdata->ddr_flush = id ? ar934x_ddr_flush_ge1 |
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: ar934x_ddr_flush_ge0; |
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pdata->set_pll = id ? ar934x_set_pll_ge1 |
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: ar934x_set_pll_ge0; |
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pdata->set_speed = id ? ar934x_set_speed_ge1 |
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: ar934x_set_speed_ge0; |
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pdata->has_gbit = 1; |
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pdata->is_ar724x = 1; |
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