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@ -37,6 +37,7 @@ unsigned int adm5120_revision; |
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unsigned int adm5120_package; |
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unsigned int adm5120_nand_boot; |
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unsigned long adm5120_speed; |
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unsigned long adm5120_memsize; |
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/*
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* Locals |
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@ -266,7 +267,7 @@ static struct adm5120_board __initdata adm5120_boards[] = { |
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.mach_type = MACH_ADM5120_UNKNOWN, |
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.has_usb = 1, |
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.iface_num = 5, |
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.flash0_size = 0, |
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.flash0_size = 4*1024*1024, |
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} |
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}; |
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@ -728,6 +729,9 @@ static void __init adm5120_detect_board(void) |
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memcpy(&adm5120_board, board, sizeof(adm5120_board)); |
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} |
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#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r)) |
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#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v) |
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/*
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* CPU settings detection |
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*/ |
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@ -742,7 +746,7 @@ static void __init adm5120_detect_cpuinfo(void) |
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u32 code; |
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u32 clks; |
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code = *(u32 *)KSEG1ADDR(ADM5120_SWITCH_BASE+SWITCH_REG_CODE); |
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code = SWITCH_READ(SWITCH_REG_CODE); |
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adm5120_product_code = CODE_GET_PC(code); |
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adm5120_revision = CODE_GET_REV(code); |
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@ -758,6 +762,127 @@ static void __init adm5120_detect_cpuinfo(void) |
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adm5120_speed += 50000000; |
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} |
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#if 1 |
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# define mem_dbg(f, ...) prom_printf("mem_detect: " f, ## __VA_ARGS__) |
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extern void prom_printf(char *, ...); |
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#else |
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# define mem_dbg(f, ...) |
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#endif |
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static void __init adm5120_detect_memsize(void) |
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{ |
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u32 memctrl; |
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u32 size, maxsize; |
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volatile u8 *p,*r; |
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u8 t; |
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memctrl = SWITCH_READ(SWITCH_REG_MEMCTRL); |
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switch (memctrl & MEMCTRL_SDRS_MASK) { |
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case MEMCTRL_SDRS_4M: |
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maxsize = 4 << 20; |
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break; |
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case MEMCTRL_SDRS_8M: |
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maxsize = 8 << 20; |
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break; |
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case MEMCTRL_SDRS_16M: |
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maxsize = 16 << 20; |
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break; |
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default: |
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maxsize = 64 << 20; |
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break; |
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} |
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/* FIXME: need to disable buffers for both SDRAM bank? */ |
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mem_dbg("checking for %ldMB chip\n",maxsize >> 20); |
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/* detect size of the 1st SDRAM bank */ |
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p = (volatile u8 *)KSEG1ADDR(0); |
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t = *p; |
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for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) { |
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#if 1 |
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r = (p+size); |
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*p = 0x55; |
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mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, *r); |
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if (*r == 0x55) { |
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*p = 0xAA; |
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mem_dbg("2nd pattern at 0x%lx is 0x%02x\n", size, *r); |
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if (*r == 0xAA) { |
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/* mirrored address */ |
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mem_dbg("mirrored data found at 0x%lx\n", size); |
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break; |
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} |
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} |
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#else |
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p[0] = 0x55; |
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mem_dbg("1st pattern at 0x%lx is 0x%02x\n", size, p[size]); |
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if (p[size] != 0x55) |
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continue; |
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p[0] = 0xAA; |
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mem_dbg("2nd pattern at 0x%lx is 0x%02x\n", size, p[size]); |
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if (p[size] != 0xAA) |
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continue; |
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/* mirrored address */ |
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mem_dbg("mirrored data found at 0x%lx\n", size); |
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break; |
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#endif |
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} |
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*p = t; |
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mem_dbg("%ldMB chip found\n", size >> 20); |
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if (size == (32 << 20)) |
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/* if bank size is 32MB, 2nd bank is not supported */ |
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goto out; |
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if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0) |
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/* if 2nd bank is not enabled, we are done */ |
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goto out; |
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/*
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* some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
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* are missing. |
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*/ |
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mem_dbg("checking second bank\n"); |
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p += (maxsize+size)-1; |
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t = *p; |
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*p = 0x55; |
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if (*p != 0x55) |
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goto out; |
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*p = 0xAA; |
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if (*p != 0xAA) |
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goto out; |
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*p = t; |
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if (maxsize != size) { |
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/* adjusting MECTRL register */ |
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memctrl &= ~(MEMCTRL_SDRS_MASK); |
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switch (size>>20) { |
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case 4: |
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memctrl |= MEMCTRL_SDRS_4M; |
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break; |
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case 8: |
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memctrl |= MEMCTRL_SDRS_8M; |
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break; |
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case 16: |
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memctrl |= MEMCTRL_SDRS_16M; |
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break; |
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default: |
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memctrl |= MEMCTRL_SDRS_64M; |
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break; |
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} |
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SWITCH_WRITE(SWITCH_REG_MEMCTRL, memctrl); |
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} |
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size <<= 1; |
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out: |
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adm5120_memsize = size; |
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mem_dbg("%ldMB memory found\n",size>>20); |
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} |
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void __init adm5120_info_show(void) |
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{ |
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/* FIXME: move this somewhere else */ |
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@ -769,11 +894,13 @@ void __init adm5120_info_show(void) |
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printk("Boot loader is: %s\n", boot_loader_names[adm5120_boot_loader]); |
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printk("Booted from : %s flash\n", adm5120_nand_boot ? "NAND":"NOR"); |
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printk("Board is : %s\n", adm5120_board_name()); |
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printk("Memory size : %ldMB\n", adm5120_memsize >> 20); |
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} |
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void __init adm5120_info_init(void) |
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{ |
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adm5120_detect_cpuinfo(); |
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adm5120_detect_memsize(); |
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adm5120_detect_board(); |
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adm5120_info_show(); |
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