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@ -3,6 +3,7 @@ |
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* |
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* - MikroTik RouterBOARD mAP L-2nD |
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* - MikroTik RouterBOARD 941L-2nD |
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* - MikroTik RouterBOARD 951Ui-2nD |
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* |
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* Copyright (C) 2017 Thibaut VARENE <varenet@parisc-linux.org> |
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* |
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@ -16,6 +17,9 @@ |
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#include <linux/routerboot.h> |
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#include <linux/gpio.h> |
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#include <linux/spi/spi.h> |
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#include <linux/spi/74x164.h> |
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#include <linux/mtd/mtd.h> |
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#include <linux/mtd/partitions.h> |
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@ -40,6 +44,7 @@ |
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#define RBSPI_HAS_USB BIT(0) |
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#define RBSPI_HAS_WLAN BIT(1) |
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#define RBSPI_HAS_WAN4 BIT(2) /* has WAN port on PHY4 */ |
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#define RBSPI_HAS_SSR BIT(3) /* has an SSR on SPI bus 0 */ |
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#define RB_ROUTERBOOT_OFFSET 0x0000 |
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#define RB_BIOS_SIZE 0x1000 |
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@ -166,6 +171,96 @@ static struct gpio_led rbhapl_leds[] __initdata = { |
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}, |
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}; |
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/* common RB SSRs */ |
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#define RBSPI_SSR_GPIO_BASE 40 |
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#define RBSPI_SSR_GPIO(bit) (RBSPI_SSR_GPIO_BASE + (bit)) |
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/* RB 951Ui-2nD gpios */ |
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#define RB952_SSR_BIT_LED_LAN1 0 |
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#define RB952_SSR_BIT_LED_LAN2 1 |
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#define RB952_SSR_BIT_LED_LAN3 2 |
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#define RB952_SSR_BIT_LED_LAN4 3 |
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#define RB952_SSR_BIT_LED_LAN5 4 |
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#define RB952_SSR_BIT_USB_POWER 5 |
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#define RB952_SSR_BIT_LED_WLAN 6 |
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#define RB952_GPIO_SSR_CS 11 |
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#define RB952_GPIO_LED_USER 4 |
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#define RB952_GPIO_POE_POWER 14 |
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#define RB952_GPIO_USB_POWER RBSPI_SSR_GPIO(RB952_SSR_BIT_USB_POWER) |
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#define RB952_GPIO_LED_LAN1 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN1) |
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#define RB952_GPIO_LED_LAN2 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN2) |
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#define RB952_GPIO_LED_LAN3 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN3) |
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#define RB952_GPIO_LED_LAN4 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN4) |
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#define RB952_GPIO_LED_LAN5 RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_LAN5) |
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#define RB952_GPIO_LED_WLAN RBSPI_SSR_GPIO(RB952_SSR_BIT_LED_WLAN) |
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static struct gpio_led rb952_leds[] __initdata = { |
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{ |
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.name = "rb:green:user", |
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.gpio = RB952_GPIO_LED_USER, |
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.active_low = 0, |
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}, { |
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.name = "rb:blue:wlan", |
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.gpio = RB952_GPIO_LED_WLAN, |
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.active_low = 1, |
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}, { |
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.name = "rb:green:port1", |
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.gpio = RB952_GPIO_LED_LAN1, |
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.active_low = 1, |
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}, { |
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.name = "rb:green:port2", |
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.gpio = RB952_GPIO_LED_LAN2, |
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.active_low = 1, |
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}, { |
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.name = "rb:green:port3", |
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.gpio = RB952_GPIO_LED_LAN3, |
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.active_low = 1, |
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}, { |
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.name = "rb:green:port4", |
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.gpio = RB952_GPIO_LED_LAN4, |
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.active_low = 1, |
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}, { |
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.name = "rb:green:port5", |
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.gpio = RB952_GPIO_LED_LAN5, |
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.active_low = 1, |
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}, |
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}; |
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static struct gen_74x164_chip_platform_data rbspi_ssr_data = { |
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.base = RBSPI_SSR_GPIO_BASE, |
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}; |
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/* the spi-ath79 driver can only natively handle CS0. Other CS are bit-banged */ |
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static int rbspi_spi_cs_gpios[] = { |
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-ENOENT, /* CS0 is always -ENOENT: natively handled */ |
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-ENOENT, /* CS1 can be updated by the code as necessary */ |
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}; |
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static struct ath79_spi_platform_data rbspi_ath79_spi_data = { |
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.bus_num = 0, |
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.cs_gpios = rbspi_spi_cs_gpios, |
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}; |
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/*
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* Global spi_board_info: devices that don't have an SSR only have the SPI NOR |
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* flash on bus0 CS0, while devices that have an SSR add it on the same bus CS1 |
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*/ |
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static struct spi_board_info rbspi_spi_info[] = { |
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{ |
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.bus_num = 0, |
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.chip_select = 0, |
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.max_speed_hz = 25000000, |
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.modalias = "m25p80", |
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.platform_data = &rbspi_spi_flash_data, |
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}, { |
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.bus_num = 0, |
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.chip_select = 1, |
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.max_speed_hz = 25000000, |
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.modalias = "74x164", |
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.platform_data = &rbspi_ssr_data, |
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} |
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}; |
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void __init rbspi_wlan_init(int wmac_offset) |
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{ |
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char *art_buf; |
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@ -209,7 +304,16 @@ static int __init rbspi_platform_setup(void) |
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*/ |
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static void __init rbspi_peripherals_setup(u32 flags) |
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{ |
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ath79_register_m25p80(&rbspi_spi_flash_data); |
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unsigned spi_n; |
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if (flags & RBSPI_HAS_SSR) |
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spi_n = ARRAY_SIZE(rbspi_spi_info); |
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else |
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spi_n = 1; /* only one device on bus0 */ |
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rbspi_ath79_spi_data.num_chipselect = spi_n; |
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rbspi_ath79_spi_data.cs_gpios = rbspi_spi_cs_gpios; |
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ath79_register_spi(&rbspi_ath79_spi_data, rbspi_spi_info, spi_n); |
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if (flags & RBSPI_HAS_USB) |
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ath79_register_usb(); |
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@ -314,5 +418,46 @@ static void __init rbhapl_setup(void) |
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rbspi_gpio_keys_reset16); |
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} |
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/*
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* Init the hAP hardware. |
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* The 951Ui-2nD (hAP) has 5 ethernet ports, with ports 2-5 being assigned |
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* to LAN on the casing, and port 1 being assigned to "internet" (WAN). |
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* Port 1 is connected to PHY4 (the ports are labelled in reverse physical |
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* number), so the SoC can be set to connect GMAC0 to PHY4 and GMAC1 to the |
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* internal switch for the LAN ports. |
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* The device also has USB, PoE output and an SSR used for LED multiplexing. |
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*/ |
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static void __init rb952_setup(void) |
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{ |
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u32 flags = RBSPI_HAS_WLAN | RBSPI_HAS_WAN4 | RBSPI_HAS_USB | |
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RBSPI_HAS_SSR; |
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if (rbspi_platform_setup()) |
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return; |
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rbspi_spi_cs_gpios[1] = RB952_GPIO_SSR_CS; |
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rbspi_peripherals_setup(flags); |
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/* GMAC1 is HW MAC + 1, WLAN MAC IS HW MAC + 5 */ |
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rbspi_network_setup(flags, 1, 5); |
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gpio_request_one(RB952_GPIO_USB_POWER, |
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GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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"USB power"); |
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gpio_request_one(RB952_GPIO_POE_POWER, |
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GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, |
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"POE power"); |
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ath79_register_leds_gpio(-1, ARRAY_SIZE(rb952_leds), rb952_leds); |
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/* hAP has a single reset button as gpio 16 */ |
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ath79_register_gpio_keys_polled(-1, RBSPI_KEYS_POLL_INTERVAL, |
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ARRAY_SIZE(rbspi_gpio_keys_reset16), |
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rbspi_gpio_keys_reset16); |
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} |
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_MAPL, "map-hb", rbmapl_setup); |
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_941, "H951L", rbhapl_setup); |
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MIPS_MACHINE_NONAME(ATH79_MACH_RB_952, "952-hb", rb952_setup); |
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