We can now use the mainline tulip driver. Signed-off-by: Florian Fainelli <florian@openwrt.org> SVN-Revision: 34559master
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/*
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* originally drivers/net/tulip/tulip.h |
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* Copyright 2000,2001 The Linux Kernel Team |
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* Written/copyright 1994-2001 by Donald Becker. |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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*/ |
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#ifndef __NET_TULIP_H__ |
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#define __NET_TULIP_H__ |
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#include <linux/module.h> |
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#include <linux/export.h> |
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#include <linux/slab.h> |
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#include <linux/init.h> |
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#include <linux/mii.h> |
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#include <linux/crc32.h> |
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#include <linux/kernel.h> |
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#include <linux/types.h> |
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#include <linux/spinlock.h> |
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#include <linux/netdevice.h> |
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#include <linux/ethtool.h> |
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#include <linux/timer.h> |
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#include <linux/delay.h> |
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#include <linux/etherdevice.h> |
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#include <linux/platform_device.h> |
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#include <linux/io.h> |
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#include <linux/interrupt.h> |
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#include <asm/unaligned.h> |
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#include <asm/uaccess.h> |
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/* undefine, or define to various debugging levels (>4 == obscene levels) */ |
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#define TULIP_DEBUG 1 |
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#define VALID_INTR 0x0001a451 |
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#define ADM8668_WAN_IRQ 8 |
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#define ADM8668_LAN_IRQ 7 |
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#define ADM8668_WAN_MACADDR 0xb00205ac |
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#define ADM8668_LAN_MACADDR 0xb0020404 |
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/* Offsets to the Command and Status Registers, "CSRs". All accesses
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must be longword instructions and quadword aligned. */ |
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enum tulip_offsets { |
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CSR0 = 0, |
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CSR1 = 0x08, |
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CSR2 = 0x10, |
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CSR3 = 0x18, |
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CSR4 = 0x20, |
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CSR5 = 0x28, |
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CSR6 = 0x30, |
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CSR7 = 0x38, |
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CSR8 = 0x40, |
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CSR9 = 0x48, |
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CSR10 = 0x50, |
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CSR11 = 0x58, |
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CSR12 = 0x60, |
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CSR13 = 0x68, |
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CSR14 = 0x70, |
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CSR15 = 0x78, |
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CSR18 = 0x88, |
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CSR19 = 0x8c, |
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CSR20 = 0x90, |
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CSR27 = 0xAC, |
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CSR28 = 0xB0, |
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}; |
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#define RxPollInt (RxIntr|RxNoBuf|RxDied|RxJabber) |
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/* The bits in the CSR5 status registers, mostly interrupt sources. */ |
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enum status_bits { |
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TimerInt = 0x800, |
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SystemError = 0x2000, |
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TPLnkFail = 0x1000, |
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TPLnkPass = 0x10, |
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NormalIntr = 0x10000, |
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AbnormalIntr = 0x8000, |
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RxJabber = 0x200, |
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RxDied = 0x100, |
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RxNoBuf = 0x80, |
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RxIntr = 0x40, |
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TxFIFOUnderflow = 0x20, |
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RxErrIntr = 0x10, |
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TxJabber = 0x08, |
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TxNoBuf = 0x04, |
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TxDied = 0x02, |
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TxIntr = 0x01, |
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}; |
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/* bit mask for CSR5 TX/RX process state */ |
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#define CSR5_TS 0x00700000 |
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#define CSR5_RS 0x000e0000 |
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enum tulip_mode_bits { |
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TxThreshold = (1 << 22), |
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FullDuplex = (1 << 9), |
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TxOn = 0x2000, |
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AcceptBroadcast = 0x0100, |
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AcceptAllMulticast = 0x0080, |
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AcceptAllPhys = 0x0040, |
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AcceptRunt = 0x0008, |
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RxOn = 0x0002, |
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RxTx = (TxOn | RxOn), |
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}; |
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/* The Tulip Rx and Tx buffer descriptors. */ |
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struct tulip_rx_desc { |
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__le32 status; |
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__le32 length; |
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__le32 buffer1; |
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__le32 buffer2; |
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}; |
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struct tulip_tx_desc { |
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__le32 status; |
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__le32 length; |
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__le32 buffer1; |
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__le32 buffer2; /* We use only buffer 1. */ |
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}; |
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enum desc_status_bits { |
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DescOwned = 0x80000000, |
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DescWholePkt = 0x60000000, |
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DescEndPkt = 0x40000000, |
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DescStartPkt = 0x20000000, |
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DescEndRing = 0x02000000, |
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DescUseLink = 0x01000000, |
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/*
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* Error summary flag is logical or of 'CRC Error', 'Collision Seen', |
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* 'Frame Too Long', 'Runt' and 'Descriptor Error' flags generated |
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* within tulip chip. |
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*/ |
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RxDescErrorSummary = 0x8000, |
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RxDescCRCError = 0x0002, |
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RxDescCollisionSeen = 0x0040, |
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/*
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* 'Frame Too Long' flag is set if packet length including CRC exceeds |
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* 1518. However, a full sized VLAN tagged frame is 1522 bytes |
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* including CRC. |
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* |
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* The tulip chip does not block oversized frames, and if this flag is |
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* set on a receive descriptor it does not indicate the frame has been |
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* truncated. The receive descriptor also includes the actual length. |
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* Therefore we can safety ignore this flag and check the length |
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* ourselves. |
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*/ |
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RxDescFrameTooLong = 0x0080, |
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RxDescRunt = 0x0800, |
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RxDescDescErr = 0x4000, |
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RxWholePkt = 0x00000300, |
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/*
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* Top three bits of 14 bit frame length (status bits 27-29) should |
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* never be set as that would make frame over 2047 bytes. The Receive |
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* Watchdog flag (bit 4) may indicate the length is over 2048 and the |
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* length field is invalid. |
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*/ |
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RxLengthOver2047 = 0x38000010 |
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}; |
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/* Keep the ring sizes a power of two for efficiency.
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Making the Tx ring too large decreases the effectiveness of channel |
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bonding and packet priority. |
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There are no ill effects from too-large receive rings. */ |
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#define TX_RING_SIZE 32 |
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#define RX_RING_SIZE 128 |
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/* The receiver on the DC21143 rev 65 can fail to close the last
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* receive descriptor in certain circumstances (see errata) when |
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* using MWI. This can only occur if the receive buffer ends on |
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* a cache line boundary, so the "+ 4" below ensures it doesn't. |
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*/ |
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#define PKT_BUF_SZ (1536 + 4) /* Size of each temporary Rx buffer. */ |
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/* Ring-wrap flag in length field, use for last ring entry.
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0x01000000 means chain on buffer2 address, |
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0x02000000 means use the ring start address in CSR2/3. |
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Note: Some work-alike chips do not function correctly in chained mode. |
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The ASIX chip works only in chained mode. |
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Thus we indicates ring mode, but always write the 'next' field for |
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chained mode as well. |
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*/ |
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#define DESC_RING_WRAP 0x02000000 |
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struct ring_info { |
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struct sk_buff *skb; |
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dma_addr_t mapping; |
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}; |
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struct tulip_private { |
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struct tulip_rx_desc *rx_ring; |
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struct tulip_tx_desc *tx_ring; |
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dma_addr_t rx_ring_dma; |
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dma_addr_t tx_ring_dma; |
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/* The saved address of a sent-in-place packet/buffer, for skfree(). */ |
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struct ring_info tx_buffers[TX_RING_SIZE]; |
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/* The addresses of receive-in-place skbuffs. */ |
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struct ring_info rx_buffers[RX_RING_SIZE]; |
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struct napi_struct napi; |
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struct net_device_stats stats; |
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struct timer_list oom_timer; /* Out of memory timer. */ |
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u32 mc_filter[2]; |
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spinlock_t lock; |
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unsigned int cur_rx, cur_tx; /* The next free ring entry */ |
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unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ |
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unsigned int csr0; /* CSR0 setting. */ |
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unsigned int csr6; /* Current CSR6 control settings. */ |
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void (*link_change) (struct net_device * dev, int csr5); |
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struct platform_device *pdev; |
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unsigned long nir; |
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void __iomem *base_addr; |
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int pad0; /* Used for 8-byte alignment */ |
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struct net_device *dev; |
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}; |
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/* interrupt.c */ |
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irqreturn_t tulip_interrupt(int irq, void *dev_instance); |
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int tulip_refill_rx(struct net_device *dev); |
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int tulip_poll(struct napi_struct *napi, int budget); |
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/* tulip_core.c */ |
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extern int tulip_debug; |
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void oom_timer(unsigned long data); |
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static inline void tulip_start_rxtx(struct tulip_private *tp) |
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{ |
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void __iomem *ioaddr = tp->base_addr; |
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iowrite32(tp->csr6 | RxTx, ioaddr + CSR6); |
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barrier(); |
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(void) ioread32(ioaddr + CSR6); /* mmio sync */ |
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} |
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static inline void tulip_stop_rxtx(struct tulip_private *tp) |
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{ |
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void __iomem *ioaddr = tp->base_addr; |
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u32 csr6 = ioread32(ioaddr + CSR6); |
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if (csr6 & RxTx) { |
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unsigned i=1300/10; |
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iowrite32(csr6 & ~RxTx, ioaddr + CSR6); |
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barrier(); |
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/* wait until in-flight frame completes.
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* Max time @ 10BT: 1500*8b/10Mbps == 1200us (+ 100us margin) |
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* Typically expect this loop to end in < 50 us on 100BT. |
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*/ |
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while (--i && (ioread32(ioaddr + CSR5) & (CSR5_TS|CSR5_RS))) |
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udelay(10); |
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if (!i) |
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printk(KERN_DEBUG "fixme: tulip_stop_rxtx() failed" |
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" (CSR5 0x%x CSR6 0x%x)\n", |
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ioread32(ioaddr + CSR5), |
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ioread32(ioaddr + CSR6)); |
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} |
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} |
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static inline void tulip_restart_rxtx(struct tulip_private *tp) |
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{ |
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tulip_stop_rxtx(tp); |
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udelay(5); |
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tulip_start_rxtx(tp); |
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} |
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static inline void tulip_tx_timeout_complete(struct tulip_private *tp, void __iomem *ioaddr) |
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{ |
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/* Stop and restart the chip's Tx processes. */ |
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tulip_restart_rxtx(tp); |
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/* Trigger an immediate transmit demand. */ |
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iowrite32(0, ioaddr + CSR1); |
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tp->stats.tx_errors++; |
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} |
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#endif /* __NET_TULIP_H__ */ |
@ -1,618 +0,0 @@ |
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/*
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* originally drivers/net/tulip_core.c |
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* Copyright 2000,2001 The Linux Kernel Team |
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* Written/copyright 1994-2001 by Donald Becker. |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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*/ |
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#define DRV_NAME "tulip" |
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#define DRV_VERSION "1.1.15-NAPI" /* Keep at least for test */ |
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#define DRV_RELDATE "Feb 27, 2007" |
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#include "net.h" |
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static char version[] __devinitdata = |
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"ADM8668net driver version " DRV_VERSION " (" DRV_RELDATE ")\n"; |
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#define MAX_UNITS 2 |
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/*
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Set the bus performance register. |
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Typical: Set 16 longword cache alignment, no burst limit. |
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Cache alignment bits 15:14 Burst length 13:8 |
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0000 No alignment 0x00000000 unlimited 0800 8 longwords |
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4000 8 longwords 0100 1 longword 1000 16 longwords |
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8000 16 longwords 0200 2 longwords 2000 32 longwords |
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C000 32 longwords 0400 4 longwords |
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Warning: many older 486 systems are broken and require setting 0x00A04800 |
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8 longword cache alignment, 8 longword burst. |
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ToDo: Non-Intel setting could be better. |
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*/ |
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//static int csr0 = 0x00200000 | 0x4000;
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static int csr0 = 0; |
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/* Operational parameters that usually are not changed. */ |
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/* Time in jiffies before concluding the transmitter is hung. */ |
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#define TX_TIMEOUT (4*HZ) |
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MODULE_AUTHOR("Scott Nicholas <neutronscott@scottn.us>"); |
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MODULE_DESCRIPTION("ADM8668 new ethernet driver."); |
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MODULE_LICENSE("GPL"); |
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MODULE_VERSION(DRV_VERSION); |
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#ifdef TULIP_DEBUG |
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int tulip_debug = TULIP_DEBUG; |
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#else |
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int tulip_debug = 1; |
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#endif |
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static void tulip_tx_timeout(struct net_device *dev); |
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static void tulip_init_ring(struct net_device *dev); |
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static void tulip_free_ring(struct net_device *dev); |
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static netdev_tx_t tulip_start_xmit(struct sk_buff *skb, |
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struct net_device *dev); |
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static int tulip_open(struct net_device *dev); |
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static int tulip_close(struct net_device *dev); |
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static void tulip_up(struct net_device *dev); |
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static void tulip_down(struct net_device *dev); |
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static struct net_device_stats *tulip_get_stats(struct net_device *dev); |
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//static int private_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
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static void set_rx_mode(struct net_device *dev); |
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#ifdef CONFIG_NET_POLL_CONTROLLER |
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static void poll_tulip(struct net_device *dev); |
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#endif |
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static void tulip_up(struct net_device *dev) |
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{ |
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struct tulip_private *tp = netdev_priv(dev); |
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void __iomem *ioaddr = tp->base_addr; |
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napi_enable(&tp->napi); |
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/* Reset the chip, holding bit 0 set at least 50 PCI cycles. */ |
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iowrite32(0x00000001, ioaddr + CSR0); |
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/* Deassert reset.
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Wait the specified 50 PCI cycles after a reset by initializing |
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Tx and Rx queues and the address filter list. */ |
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iowrite32(tp->csr0, ioaddr + CSR0); |
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if (tulip_debug > 1) |
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printk(KERN_DEBUG "%s: tulip_up(), irq==%d\n", |
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dev->name, dev->irq); |
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iowrite32(tp->rx_ring_dma, ioaddr + CSR3); |
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iowrite32(tp->tx_ring_dma, ioaddr + CSR4); |
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tp->cur_rx = tp->cur_tx = 0; |
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tp->dirty_rx = tp->dirty_tx = 0; |
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/* set mac address */ |
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iowrite32(get_unaligned_le32(dev->dev_addr), ioaddr + 0xA4); |
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iowrite32(get_unaligned_le16(dev->dev_addr + 4), ioaddr + 0xA8); |
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iowrite32(0, ioaddr + CSR27); |
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iowrite32(0, ioaddr + CSR28); |
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tp->csr6 = 0; |
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/* Enable automatic Tx underrun recovery. */ |
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iowrite32(ioread32(ioaddr + CSR18) | 1, ioaddr + CSR18); |
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tp->csr6 = 0x00040000; |
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/* Start the chip's Tx to process setup frame. */ |
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tulip_stop_rxtx(tp); |
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barrier(); |
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udelay(5); |
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iowrite32(tp->csr6 | TxOn, ioaddr + CSR6); |
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/* Enable interrupts by setting the interrupt mask. */ |
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iowrite32(VALID_INTR, ioaddr + CSR5); |
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iowrite32(VALID_INTR, ioaddr + CSR7); |
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tulip_start_rxtx(tp); |
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iowrite32(0, ioaddr + CSR2); /* Rx poll demand */ |
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if (tulip_debug > 2) { |
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printk(KERN_DEBUG "%s: Done tulip_up(), CSR0 %08x, CSR5 %08x CSR6 %08x\n", |
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dev->name, ioread32(ioaddr + CSR0), |
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ioread32(ioaddr + CSR5), |
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ioread32(ioaddr + CSR6)); |
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} |
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init_timer(&tp->oom_timer); |
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tp->oom_timer.data = (unsigned long)dev; |
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tp->oom_timer.function = oom_timer; |
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} |
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static int |
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tulip_open(struct net_device *dev) |
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{ |
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int retval; |
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tulip_init_ring (dev); |
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retval = request_irq(dev->irq, tulip_interrupt, 0, dev->name, dev); |
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if (retval) |
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goto free_ring; |
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tulip_up (dev); |
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netif_start_queue (dev); |
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return 0; |
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free_ring: |
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tulip_free_ring (dev); |
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return retval; |
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} |
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static void tulip_tx_timeout(struct net_device *dev) |
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{ |
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struct tulip_private *tp = netdev_priv(dev); |
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void __iomem *ioaddr = tp->base_addr; |
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unsigned long flags; |
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spin_lock_irqsave (&tp->lock, flags); |
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dev_warn(&dev->dev, |
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"Transmit timed out, status %08x, CSR12 %08x, resetting...\n", |
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ioread32(ioaddr + CSR5), ioread32(ioaddr + CSR12)); |
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tulip_tx_timeout_complete(tp, ioaddr); |
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spin_unlock_irqrestore (&tp->lock, flags); |
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dev->trans_start = jiffies; /* prevent tx timeout */ |
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netif_wake_queue (dev); |
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} |
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/* Initialize the Rx and Tx rings, along with various 'dev' bits. */ |
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static void tulip_init_ring(struct net_device *dev) |
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{ |
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struct tulip_private *tp = netdev_priv(dev); |
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int i; |
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tp->nir = 0; |
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for (i = 0; i < RX_RING_SIZE; i++) { |
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tp->rx_ring[i].status = 0x00000000; |
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tp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ); |
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tp->rx_ring[i].buffer2 = cpu_to_le32(tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * (i + 1)); |
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tp->rx_buffers[i].skb = NULL; |
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tp->rx_buffers[i].mapping = 0; |
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} |
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/* Mark the last entry as wrapping the ring. */ |
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tp->rx_ring[i-1].length = cpu_to_le32(PKT_BUF_SZ | DESC_RING_WRAP); |
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tp->rx_ring[i-1].buffer2 = cpu_to_le32(tp->rx_ring_dma); |
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for (i = 0; i < RX_RING_SIZE; i++) { |
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dma_addr_t mapping; |
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/* Note the receive buffer must be longword aligned.
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dev_alloc_skb() provides 16 byte alignment. But do *not* |
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use skb_reserve() to align the IP header! */ |
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struct sk_buff *skb = dev_alloc_skb(PKT_BUF_SZ); |
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tp->rx_buffers[i].skb = skb; |
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if (skb == NULL) |
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break; |
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mapping = dma_map_single(&dev->dev, skb->data, |
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PKT_BUF_SZ, DMA_FROM_DEVICE); |
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tp->rx_buffers[i].mapping = mapping; |
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skb->dev = dev; /* Mark as being used by this device. */ |
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tp->rx_ring[i].status = cpu_to_le32(DescOwned); /* Owned by Tulip chip */ |
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tp->rx_ring[i].buffer1 = cpu_to_le32(mapping); |
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} |
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tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); |
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/* The Tx buffer descriptor is filled in as needed, but we
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do need to clear the ownership bit. */ |
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for (i = 0; i < TX_RING_SIZE; i++) { |
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tp->tx_buffers[i].skb = NULL; |
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tp->tx_buffers[i].mapping = 0; |
||||
tp->tx_ring[i].status = 0x00000000; |
||||
tp->tx_ring[i].buffer2 = cpu_to_le32(tp->tx_ring_dma + sizeof(struct tulip_tx_desc) * (i + 1)); |
||||
} |
||||
tp->tx_ring[i-1].buffer2 = cpu_to_le32(tp->tx_ring_dma); |
||||
} |
||||
|
||||
static netdev_tx_t |
||||
tulip_start_xmit(struct sk_buff *skb, struct net_device *dev) |
||||
{ |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
int entry; |
||||
u32 flag; |
||||
dma_addr_t mapping; |
||||
unsigned long flags; |
||||
|
||||
spin_lock_irqsave(&tp->lock, flags); |
||||
|
||||
/* Calculate the next Tx descriptor entry. */ |
||||
entry = tp->cur_tx % TX_RING_SIZE; |
||||
|
||||
tp->tx_buffers[entry].skb = skb; |
||||
mapping = dma_map_single(&tp->pdev->dev, skb->data, skb->len, |
||||
DMA_TO_DEVICE); |
||||
tp->tx_buffers[entry].mapping = mapping; |
||||
tp->tx_ring[entry].buffer1 = cpu_to_le32(mapping); |
||||
|
||||
if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE/2) {/* Typical path */ |
||||
flag = 0x60000000; /* No interrupt */ |
||||
} else if (tp->cur_tx - tp->dirty_tx == TX_RING_SIZE/2) { |
||||
flag = 0xe0000000; /* Tx-done intr. */ |
||||
} else if (tp->cur_tx - tp->dirty_tx < TX_RING_SIZE - 2) { |
||||
flag = 0x60000000; /* No Tx-done intr. */ |
||||
} else { /* Leave room for set_rx_mode() to fill entries. */ |
||||
flag = 0xe0000000; /* Tx-done intr. */ |
||||
netif_stop_queue(dev); |
||||
} |
||||
if (entry == TX_RING_SIZE-1) |
||||
flag = 0xe0000000 | DESC_RING_WRAP; |
||||
|
||||
tp->tx_ring[entry].length = cpu_to_le32(skb->len | flag); |
||||
/* if we were using Transmit Automatic Polling, we would need a
|
||||
* wmb() here. */ |
||||
tp->tx_ring[entry].status = cpu_to_le32(DescOwned); |
||||
wmb(); |
||||
|
||||
tp->cur_tx++; |
||||
|
||||
/* Trigger an immediate transmit demand. */ |
||||
iowrite32(0, tp->base_addr + CSR1); |
||||
|
||||
spin_unlock_irqrestore(&tp->lock, flags); |
||||
|
||||
return NETDEV_TX_OK; |
||||
} |
||||
|
||||
static void tulip_clean_tx_ring(struct tulip_private *tp) |
||||
{ |
||||
unsigned int dirty_tx; |
||||
|
||||
for (dirty_tx = tp->dirty_tx ; tp->cur_tx - dirty_tx > 0; |
||||
dirty_tx++) { |
||||
int entry = dirty_tx % TX_RING_SIZE; |
||||
int status = le32_to_cpu(tp->tx_ring[entry].status); |
||||
|
||||
if (status < 0) { |
||||
tp->stats.tx_errors++; /* It wasn't Txed */ |
||||
tp->tx_ring[entry].status = 0; |
||||
} |
||||
|
||||
dma_unmap_single(&tp->pdev->dev, tp->tx_buffers[entry].mapping, |
||||
tp->tx_buffers[entry].skb->len, |
||||
DMA_TO_DEVICE); |
||||
|
||||
/* Free the original skb. */ |
||||
dev_kfree_skb_irq(tp->tx_buffers[entry].skb); |
||||
tp->tx_buffers[entry].skb = NULL; |
||||
tp->tx_buffers[entry].mapping = 0; |
||||
} |
||||
} |
||||
|
||||
static void tulip_down (struct net_device *dev) |
||||
{ |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
void __iomem *ioaddr = tp->base_addr; |
||||
unsigned long flags; |
||||
|
||||
napi_disable(&tp->napi); |
||||
del_timer_sync (&tp->oom_timer); |
||||
spin_lock_irqsave (&tp->lock, flags); |
||||
|
||||
/* Disable interrupts by clearing the interrupt mask. */ |
||||
iowrite32 (0x00000000, ioaddr + CSR7); |
||||
|
||||
/* Stop the Tx and Rx processes. */ |
||||
tulip_stop_rxtx(tp); |
||||
|
||||
/* prepare receive buffers */ |
||||
tulip_refill_rx(dev); |
||||
|
||||
/* release any unconsumed transmit buffers */ |
||||
tulip_clean_tx_ring(tp); |
||||
|
||||
if (ioread32 (ioaddr + CSR6) != 0xffffffff) |
||||
tp->stats.rx_missed_errors += ioread32 (ioaddr + CSR8) & 0xffff; |
||||
|
||||
spin_unlock_irqrestore (&tp->lock, flags); |
||||
} |
||||
|
||||
static void tulip_free_ring (struct net_device *dev) |
||||
{ |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
int i; |
||||
|
||||
/* Free all the skbuffs in the Rx queue. */ |
||||
for (i = 0; i < RX_RING_SIZE; i++) { |
||||
struct sk_buff *skb = tp->rx_buffers[i].skb; |
||||
dma_addr_t mapping = tp->rx_buffers[i].mapping; |
||||
|
||||
tp->rx_buffers[i].skb = NULL; |
||||
tp->rx_buffers[i].mapping = 0; |
||||
|
||||
tp->rx_ring[i].status = 0; /* Not owned by Tulip chip. */ |
||||
tp->rx_ring[i].length = 0; |
||||
/* An invalid address. */ |
||||
tp->rx_ring[i].buffer1 = cpu_to_le32(0xBADF00D0); |
||||
if (skb) { |
||||
dma_unmap_single(&tp->pdev->dev, mapping, PKT_BUF_SZ, |
||||
DMA_FROM_DEVICE); |
||||
dev_kfree_skb (skb); |
||||
} |
||||
} |
||||
|
||||
for (i = 0; i < TX_RING_SIZE; i++) { |
||||
struct sk_buff *skb = tp->tx_buffers[i].skb; |
||||
|
||||
if (skb != NULL) { |
||||
dma_unmap_single(&tp->pdev->dev, |
||||
tp->tx_buffers[i].mapping, skb->len, DMA_TO_DEVICE); |
||||
dev_kfree_skb (skb); |
||||
} |
||||
tp->tx_buffers[i].skb = NULL; |
||||
tp->tx_buffers[i].mapping = 0; |
||||
} |
||||
} |
||||
|
||||
static int tulip_close (struct net_device *dev) |
||||
{ |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
void __iomem *ioaddr = tp->base_addr; |
||||
|
||||
netif_stop_queue (dev); |
||||
|
||||
tulip_down (dev); |
||||
|
||||
if (tulip_debug > 1) |
||||
dev_printk(KERN_DEBUG, &dev->dev, |
||||
"Shutting down ethercard, status was %02x\n", |
||||
ioread32 (ioaddr + CSR5)); |
||||
|
||||
free_irq (dev->irq, dev); |
||||
|
||||
tulip_free_ring (dev); |
||||
|
||||
return 0; |
||||
} |
||||
|
||||
static struct net_device_stats *tulip_get_stats(struct net_device *dev) |
||||
{ |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
void __iomem *ioaddr = tp->base_addr; |
||||
|
||||
if (netif_running(dev)) { |
||||
unsigned long flags; |
||||
|
||||
spin_lock_irqsave (&tp->lock, flags); |
||||
|
||||
tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff; |
||||
|
||||
spin_unlock_irqrestore(&tp->lock, flags); |
||||
} |
||||
|
||||
return &tp->stats; |
||||
} |
||||
|
||||
|
||||
static void tulip_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
||||
{ |
||||
strcpy(info->driver, DRV_NAME); |
||||
strcpy(info->version, DRV_VERSION); |
||||
strcpy(info->bus_info, "mmio"); |
||||
} |
||||
|
||||
static const struct ethtool_ops ops = { |
||||
.get_drvinfo = tulip_get_drvinfo |
||||
}; |
||||
|
||||
static void set_rx_mode(struct net_device *dev) |
||||
{ |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
void __iomem *ioaddr = tp->base_addr; |
||||
int csr6; |
||||
|
||||
csr6 = ioread32(ioaddr + CSR6) & ~0x00D5; |
||||
|
||||
tp->csr6 &= ~0x00D5; |
||||
if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ |
||||
tp->csr6 |= AcceptAllMulticast | AcceptAllPhys; |
||||
csr6 |= AcceptAllMulticast | AcceptAllPhys; |
||||
} else if ((netdev_mc_count(dev) > 1000) || |
||||
(dev->flags & IFF_ALLMULTI)) { |
||||
/* Too many to filter well -- accept all multicasts. */ |
||||
tp->csr6 |= AcceptAllMulticast; |
||||
csr6 |= AcceptAllMulticast; |
||||
} else { |
||||
/* Some work-alikes have only a 64-entry hash filter table. */ |
||||
/* Should verify correctness on big-endian/__powerpc__ */ |
||||
struct netdev_hw_addr *ha; |
||||
if (netdev_mc_count(dev) > 64) { |
||||
/* Arbitrary non-effective limit. */ |
||||
tp->csr6 |= AcceptAllMulticast; |
||||
csr6 |= AcceptAllMulticast; |
||||
} else { |
||||
u32 mc_filter[2] = {0, 0}; /* Multicast hash filter */ |
||||
int filterbit; |
||||
netdev_for_each_mc_addr(ha, dev) { |
||||
filterbit = ether_crc_le(ETH_ALEN, ha->addr); |
||||
filterbit &= 0x3f; |
||||
mc_filter[filterbit >> 5] |= 1 << (filterbit & 31); |
||||
if (tulip_debug > 2) |
||||
dev_info(&dev->dev, |
||||
"Added filter for %pM %08x bit %d\n", |
||||
ha->addr, |
||||
ether_crc(ETH_ALEN, ha->addr), |
||||
filterbit); |
||||
} |
||||
if (mc_filter[0] == tp->mc_filter[0] && |
||||
mc_filter[1] == tp->mc_filter[1]) |
||||
; /* No change. */ |
||||
iowrite32(mc_filter[0], ioaddr + CSR27); |
||||
iowrite32(mc_filter[1], ioaddr + CSR28); |
||||
tp->mc_filter[0] = mc_filter[0]; |
||||
tp->mc_filter[1] = mc_filter[1]; |
||||
} |
||||
} |
||||
|
||||
if (dev->irq == ADM8668_LAN_IRQ) |
||||
csr6 |= (1 << 9); /* force 100Mbps full duplex */ |
||||
// csr6 |= 1; /* pad 2 bytes. vlan? */
|
||||
|
||||
iowrite32(csr6, ioaddr + CSR6); |
||||
} |
||||
|
||||
static const struct net_device_ops tulip_netdev_ops = { |
||||
.ndo_open = tulip_open, |
||||
.ndo_start_xmit = tulip_start_xmit, |
||||
.ndo_tx_timeout = tulip_tx_timeout, |
||||
.ndo_stop = tulip_close, |
||||
.ndo_get_stats = tulip_get_stats, |
||||
.ndo_set_rx_mode = set_rx_mode, |
||||
.ndo_change_mtu = eth_change_mtu, |
||||
.ndo_set_mac_address = eth_mac_addr, |
||||
.ndo_validate_addr = eth_validate_addr, |
||||
#ifdef CONFIG_NET_POLL_CONTROLLER |
||||
.ndo_poll_controller = poll_tulip, |
||||
#endif |
||||
}; |
||||
|
||||
static int __devinit adm8668net_probe(struct platform_device *pdev) |
||||
{ |
||||
struct tulip_private *tp; |
||||
struct net_device *dev; |
||||
struct resource *res; |
||||
void __iomem *ioaddr; |
||||
int irq; |
||||
|
||||
if (pdev->id < 0 || pdev->id >= MAX_UNITS) |
||||
return -EINVAL; |
||||
|
||||
if (!(res = platform_get_resource(pdev, IORESOURCE_IRQ, 0))) |
||||
return -ENODEV; |
||||
irq = res->start; |
||||
if (!(res = platform_get_resource(pdev, IORESOURCE_MEM, 0))) |
||||
return -ENODEV; |
||||
if (!(ioaddr = ioremap(res->start, res->end - res->start))) |
||||
return -ENODEV; |
||||
if (!(dev = alloc_etherdev(sizeof (*tp)))) |
||||
return -ENOMEM; |
||||
|
||||
/* setup net dev */ |
||||
dev->base_addr = (unsigned long)res->start; |
||||
dev->irq = irq; |
||||
SET_NETDEV_DEV(dev, &pdev->dev); |
||||
|
||||
/* tulip private struct */ |
||||
tp = netdev_priv(dev); |
||||
tp->dev = dev; |
||||
tp->base_addr = ioaddr; |
||||
tp->csr0 = csr0; |
||||
tp->pdev = pdev; |
||||
tp->rx_ring = dma_alloc_coherent(&pdev->dev, |
||||
sizeof(struct tulip_rx_desc) * RX_RING_SIZE + |
||||
sizeof(struct tulip_tx_desc) * TX_RING_SIZE, |
||||
&tp->rx_ring_dma, GFP_KERNEL); |
||||
if (!tp->rx_ring) |
||||
return -ENODEV; |
||||
tp->tx_ring = (struct tulip_tx_desc *)(tp->rx_ring + RX_RING_SIZE); |
||||
tp->tx_ring_dma = tp->rx_ring_dma + sizeof(struct tulip_rx_desc) * RX_RING_SIZE; |
||||
|
||||
spin_lock_init(&tp->lock); |
||||
|
||||
/* Stop the chip's Tx and Rx processes. */ |
||||
tulip_stop_rxtx(tp); |
||||
|
||||
/* Clear the missed-packet counter. */ |
||||
ioread32(ioaddr + CSR8); |
||||
|
||||
/* Addresses are stored in BSP area of NOR flash */ |
||||
if (irq == ADM8668_WAN_IRQ) |
||||
memcpy(dev->dev_addr, (char *)ADM8668_WAN_MACADDR, 6); |
||||
else |
||||
memcpy(dev->dev_addr, (char *)ADM8668_LAN_MACADDR, 6); |
||||
|
||||
/* The Tulip-specific entries in the device structure. */ |
||||
dev->netdev_ops = &tulip_netdev_ops; |
||||
dev->watchdog_timeo = TX_TIMEOUT; |
||||
netif_napi_add(dev, &tp->napi, tulip_poll, 16); |
||||
SET_ETHTOOL_OPS(dev, &ops); |
||||
|
||||
if (register_netdev(dev)) |
||||
goto err_out_free_ring; |
||||
|
||||
dev_info(&dev->dev, |
||||
"ADM8668net at MMIO %#lx %pM, IRQ %d\n", |
||||
(unsigned long)dev->base_addr, dev->dev_addr, irq); |
||||
|
||||
platform_set_drvdata(pdev, dev); |
||||
return 0; |
||||
|
||||
err_out_free_ring: |
||||
dma_free_coherent(&pdev->dev, |
||||
sizeof (struct tulip_rx_desc) * RX_RING_SIZE + |
||||
sizeof (struct tulip_tx_desc) * TX_RING_SIZE, |
||||
tp->rx_ring, tp->rx_ring_dma); |
||||
return -ENODEV; |
||||
} |
||||
|
||||
static int __devexit adm8668net_remove(struct platform_device *pdev) |
||||
{ |
||||
struct net_device *dev = platform_get_drvdata (pdev); |
||||
struct tulip_private *tp; |
||||
|
||||
if (!dev) |
||||
return -ENODEV; |
||||
|
||||
tp = netdev_priv(dev); |
||||
unregister_netdev(dev); |
||||
dma_free_coherent(&pdev->dev, |
||||
sizeof (struct tulip_rx_desc) * RX_RING_SIZE + |
||||
sizeof (struct tulip_tx_desc) * TX_RING_SIZE, |
||||
tp->rx_ring, tp->rx_ring_dma); |
||||
iounmap(tp->base_addr); |
||||
free_netdev(dev); |
||||
platform_set_drvdata(pdev, NULL); |
||||
return 0; |
||||
} |
||||
|
||||
#ifdef CONFIG_NET_POLL_CONTROLLER |
||||
/*
|
||||
* Polling 'interrupt' - used by things like netconsole to send skbs |
||||
* without having to re-enable interrupts. It's not called while |
||||
* the interrupt routine is executing. |
||||
*/ |
||||
|
||||
static void poll_tulip (struct net_device *dev) |
||||
{ |
||||
/* disable_irq here is not very nice, but with the lockless
|
||||
interrupt handler we have no other choice. */ |
||||
disable_irq(dev->irq); |
||||
tulip_interrupt(dev->irq, dev); |
||||
enable_irq(dev->irq); |
||||
} |
||||
#endif |
||||
|
||||
static struct platform_driver adm8668net_platform_driver = { |
||||
.probe = adm8668net_probe, |
||||
.remove = __devexit_p(adm8668net_remove), |
||||
.driver = { |
||||
.owner = THIS_MODULE, |
||||
.name = "adm8668_eth" |
||||
}, |
||||
}; |
||||
|
||||
static int __init adm8668net_init(void) |
||||
{ |
||||
pr_info("%s", version); |
||||
return platform_driver_register(&adm8668net_platform_driver); |
||||
} |
||||
|
||||
static void __exit adm8668net_exit(void) |
||||
{ |
||||
platform_driver_unregister(&adm8668net_platform_driver); |
||||
} |
||||
|
||||
module_init(adm8668net_init); |
||||
module_exit(adm8668net_exit); |
@ -1,446 +0,0 @@ |
||||
/*
|
||||
* originally drivers/net/tulip/interrupt.c |
||||
* Copyright 2000,2001 The Linux Kernel Team |
||||
* Written/copyright 1994-2001 by Donald Becker. |
||||
* |
||||
* This file is subject to the terms and conditions of the GNU General Public |
||||
* License. See the file "COPYING" in the main directory of this archive |
||||
* for more details. |
||||
*/ |
||||
|
||||
#include "net.h" |
||||
|
||||
int tulip_refill_rx(struct net_device *dev) |
||||
{ |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
int entry; |
||||
int refilled = 0; |
||||
|
||||
/* Refill the Rx ring buffers. */ |
||||
for (; tp->cur_rx - tp->dirty_rx > 0; tp->dirty_rx++) { |
||||
entry = tp->dirty_rx % RX_RING_SIZE; |
||||
if (tp->rx_buffers[entry].skb == NULL) { |
||||
struct sk_buff *skb; |
||||
dma_addr_t mapping; |
||||
|
||||
skb = tp->rx_buffers[entry].skb = dev_alloc_skb(PKT_BUF_SZ); |
||||
if (skb == NULL) |
||||
break; |
||||
|
||||
mapping = dma_map_single(&dev->dev, skb->data, |
||||
PKT_BUF_SZ, DMA_FROM_DEVICE); |
||||
tp->rx_buffers[entry].mapping = mapping; |
||||
|
||||
skb->dev = dev; /* Mark as being used by this device. */ |
||||
tp->rx_ring[entry].buffer1 = cpu_to_le32(mapping); |
||||
refilled++; |
||||
} |
||||
tp->rx_ring[entry].status = cpu_to_le32(DescOwned); |
||||
} |
||||
return refilled; |
||||
} |
||||
|
||||
void oom_timer(unsigned long data) |
||||
{ |
||||
struct net_device *dev = (struct net_device *)data; |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
napi_schedule(&tp->napi); |
||||
} |
||||
|
||||
int tulip_poll(struct napi_struct *napi, int budget) |
||||
{ |
||||
struct tulip_private *tp = container_of(napi, struct tulip_private, napi); |
||||
struct net_device *dev = tp->dev; |
||||
int entry = tp->cur_rx % RX_RING_SIZE; |
||||
int work_done = 0; |
||||
|
||||
if (tulip_debug > 4) |
||||
printk(KERN_DEBUG " In tulip_rx(), entry %d %08x\n", |
||||
entry, tp->rx_ring[entry].status); |
||||
|
||||
do { |
||||
if (ioread32(tp->base_addr + CSR5) == 0xffffffff) { |
||||
printk(KERN_DEBUG " In tulip_poll(), hardware disappeared\n"); |
||||
break; |
||||
} |
||||
/* Acknowledge current RX interrupt sources. */ |
||||
iowrite32((RxIntr | RxNoBuf), tp->base_addr + CSR5); |
||||
|
||||
|
||||
/* If we own the next entry, it is a new packet. Send it up. */ |
||||
while ( ! (tp->rx_ring[entry].status & cpu_to_le32(DescOwned))) { |
||||
s32 status = le32_to_cpu(tp->rx_ring[entry].status); |
||||
short pkt_len; |
||||
|
||||
if (tp->dirty_rx + RX_RING_SIZE == tp->cur_rx) |
||||
break; |
||||
|
||||
if (tulip_debug > 5) |
||||
printk(KERN_DEBUG "%s: In tulip_rx(), entry %d %08x\n", |
||||
dev->name, entry, status); |
||||
|
||||
if (++work_done >= budget) |
||||
goto not_done; |
||||
|
||||
/*
|
||||
* Omit the four octet CRC from the length. |
||||
* (May not be considered valid until we have |
||||
* checked status for RxLengthOver2047 bits) |
||||
*/ |
||||
pkt_len = ((status >> 16) & 0x7ff) - 4; |
||||
|
||||
#if 0 |
||||
csr6 = ioread32(tp->base_addr + CSR6); |
||||
if (csr6 & 0x1) |
||||
pkt_len += 2; |
||||
|
||||
#endif |
||||
/*
|
||||
* Maximum pkt_len is 1518 (1514 + vlan header) |
||||
* Anything higher than this is always invalid |
||||
* regardless of RxLengthOver2047 bits |
||||
*/ |
||||
|
||||
if ((status & (RxLengthOver2047 | |
||||
RxDescCRCError | |
||||
RxDescCollisionSeen | |
||||
RxDescRunt | |
||||
RxDescDescErr | |
||||
RxWholePkt)) != RxWholePkt || |
||||
pkt_len > 1518) { |
||||
if ((status & (RxLengthOver2047 | |
||||
RxWholePkt)) != RxWholePkt) { |
||||
/* Ingore earlier buffers. */ |
||||
if ((status & 0xffff) != 0x7fff) { |
||||
if (tulip_debug > 1) |
||||
dev_warn(&dev->dev, |
||||
"Oversized Ethernet frame spanned multiple buffers, status %08x!\n", |
||||
status); |
||||
tp->stats.rx_length_errors++; |
||||
} |
||||
} else { |
||||
/* There was a fatal error. */ |
||||
if (tulip_debug > 2) |
||||
printk(KERN_DEBUG "%s: Receive error, Rx status %08x\n", |
||||
dev->name, status); |
||||
tp->stats.rx_errors++; /* end of a packet.*/ |
||||
if (pkt_len > 1518 || |
||||
(status & RxDescRunt)) |
||||
tp->stats.rx_length_errors++; |
||||
|
||||
if (status & 0x0004) tp->stats.rx_frame_errors++; |
||||
if (status & 0x0002) tp->stats.rx_crc_errors++; |
||||
if (status & 0x0001) tp->stats.rx_fifo_errors++; |
||||
} |
||||
} else { |
||||
struct sk_buff *skb = tp->rx_buffers[entry].skb; |
||||
char *temp = skb_put(skb, pkt_len); |
||||
|
||||
#if 0 |
||||
if (csr6 & 1) |
||||
skb_pull(skb, 2); |
||||
#endif |
||||
#ifndef final_version |
||||
if (tp->rx_buffers[entry].mapping != |
||||
le32_to_cpu(tp->rx_ring[entry].buffer1)) { |
||||
dev_err(&dev->dev, |
||||
"Internal fault: The skbuff addresses do not match in tulip_rx: %08x vs. %08llx %p / %p\n", |
||||
le32_to_cpu(tp->rx_ring[entry].buffer1), |
||||
(unsigned long long)tp->rx_buffers[entry].mapping, |
||||
skb->head, temp); |
||||
} |
||||
#endif |
||||
|
||||
tp->rx_buffers[entry].skb = NULL; |
||||
tp->rx_buffers[entry].mapping = 0; |
||||
skb->protocol = eth_type_trans(skb, dev); |
||||
|
||||
netif_receive_skb(skb); |
||||
|
||||
tp->stats.rx_packets++; |
||||
tp->stats.rx_bytes += pkt_len; |
||||
} |
||||
entry = (++tp->cur_rx) % RX_RING_SIZE; |
||||
if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/4) |
||||
tulip_refill_rx(dev); |
||||
|
||||
} |
||||
|
||||
/* New ack strategy... irq does not ack Rx any longer
|
||||
hopefully this helps */ |
||||
|
||||
/* Really bad things can happen here... If new packet arrives
|
||||
* and an irq arrives (tx or just due to occasionally unset |
||||
* mask), it will be acked by irq handler, but new thread |
||||
* is not scheduled. It is major hole in design. |
||||
* No idea how to fix this if "playing with fire" will fail |
||||
* tomorrow (night 011029). If it will not fail, we won |
||||
* finally: amount of IO did not increase at all. */ |
||||
} while ((ioread32(tp->base_addr + CSR5) & RxIntr)); |
||||
|
||||
tulip_refill_rx(dev); |
||||
|
||||
/* If RX ring is not full we are out of memory. */ |
||||
if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) |
||||
goto oom; |
||||
|
||||
/* Remove us from polling list and enable RX intr. */ |
||||
napi_complete(napi); |
||||
iowrite32(VALID_INTR, tp->base_addr+CSR7); |
||||
|
||||
/* The last op happens after poll completion. Which means the following:
|
||||
* 1. it can race with disabling irqs in irq handler |
||||
* 2. it can race with dise/enabling irqs in other poll threads |
||||
* 3. if an irq raised after beginning loop, it will be immediately |
||||
* triggered here. |
||||
* |
||||
* Summarizing: the logic results in some redundant irqs both |
||||
* due to races in masking and due to too late acking of already |
||||
* processed irqs. But it must not result in losing events. |
||||
*/ |
||||
|
||||
return work_done; |
||||
|
||||
not_done: |
||||
if (tp->cur_rx - tp->dirty_rx > RX_RING_SIZE/2 || |
||||
tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) |
||||
tulip_refill_rx(dev); |
||||
|
||||
if (tp->rx_buffers[tp->dirty_rx % RX_RING_SIZE].skb == NULL) |
||||
goto oom; |
||||
|
||||
return work_done; |
||||
|
||||
oom: /* Executed with RX ints disabled */ |
||||
|
||||
/* Start timer, stop polling, but do not enable rx interrupts. */ |
||||
mod_timer(&tp->oom_timer, jiffies+1); |
||||
|
||||
/* Think: timer_pending() was an explicit signature of bug.
|
||||
* Timer can be pending now but fired and completed |
||||
* before we did napi_complete(). See? We would lose it. */ |
||||
|
||||
/* remove ourselves from the polling list */ |
||||
napi_complete(napi); |
||||
|
||||
return work_done; |
||||
} |
||||
|
||||
/* The interrupt handler does all of the Rx thread work and cleans up
|
||||
after the Tx thread. */ |
||||
irqreturn_t tulip_interrupt(int irq, void *dev_instance) |
||||
{ |
||||
struct net_device *dev = (struct net_device *)dev_instance; |
||||
struct tulip_private *tp = netdev_priv(dev); |
||||
void __iomem *ioaddr = tp->base_addr; |
||||
int csr5; |
||||
int missed; |
||||
int rx = 0; |
||||
int tx = 0; |
||||
int oi = 0; |
||||
int maxrx = RX_RING_SIZE; |
||||
int maxtx = TX_RING_SIZE; |
||||
int maxoi = TX_RING_SIZE; |
||||
int rxd = 0; |
||||
unsigned int work_count = 25; |
||||
unsigned int handled = 0; |
||||
|
||||
/* Let's see whether the interrupt really is for us */ |
||||
csr5 = ioread32(ioaddr + CSR5); |
||||
|
||||
if ((csr5 & (NormalIntr|AbnormalIntr)) == 0) |
||||
return IRQ_RETVAL(handled); |
||||
|
||||
tp->nir++; |
||||
|
||||
do { |
||||
|
||||
if (!rxd && (csr5 & (RxIntr | RxNoBuf))) { |
||||
rxd++; |
||||
/* Mask RX intrs and add the device to poll list. */ |
||||
iowrite32(VALID_INTR&~RxPollInt, ioaddr + CSR7); |
||||
napi_schedule(&tp->napi); |
||||
|
||||
if (!(csr5&~(AbnormalIntr|NormalIntr|RxPollInt|TPLnkPass))) |
||||
break; |
||||
} |
||||
|
||||
/* Acknowledge the interrupt sources we handle here ASAP
|
||||
the poll function does Rx and RxNoBuf acking */ |
||||
|
||||
iowrite32(csr5 & 0x0001ff3f, ioaddr + CSR5); |
||||
|
||||
if (tulip_debug > 4) |
||||
printk(KERN_DEBUG "%s: interrupt csr5=%#8.8x new csr5=%#8.8x\n", |
||||
dev->name, csr5, ioread32(ioaddr + CSR5)); |
||||
|
||||
|
||||
if (csr5 & (TxNoBuf | TxDied | TxIntr | TimerInt)) { |
||||
unsigned int dirty_tx; |
||||
|
||||
spin_lock(&tp->lock); |
||||
|
||||
for (dirty_tx = tp->dirty_tx; tp->cur_tx - dirty_tx > 0; |
||||
dirty_tx++) { |
||||
int entry = dirty_tx % TX_RING_SIZE; |
||||
int status = le32_to_cpu(tp->tx_ring[entry].status); |
||||
|
||||
if (status < 0) |
||||
break; /* It still has not been Txed */ |
||||
|
||||
if (status & 0x8000) { |
||||
/* There was an major error, log it. */ |
||||
#ifndef final_version |
||||
if (tulip_debug > 1) |
||||
printk(KERN_DEBUG "%s: Transmit error, Tx status %08x\n", |
||||
dev->name, status); |
||||
#endif |
||||
tp->stats.tx_errors++; |
||||
if (status & 0x4104) tp->stats.tx_aborted_errors++; |
||||
if (status & 0x0C00) tp->stats.tx_carrier_errors++; |
||||
if (status & 0x0200) tp->stats.tx_window_errors++; |
||||
if (status & 0x0002) tp->stats.tx_fifo_errors++; |
||||
if (status & 0x0080) tp->stats.tx_heartbeat_errors++; |
||||
} else { |
||||
tp->stats.tx_bytes += |
||||
tp->tx_buffers[entry].skb->len; |
||||
tp->stats.collisions += (status >> 3) & 15; |
||||
tp->stats.tx_packets++; |
||||
} |
||||
|
||||
dma_unmap_single(&tp->pdev->dev, tp->tx_buffers[entry].mapping, |
||||
tp->tx_buffers[entry].skb->len, DMA_TO_DEVICE); |
||||
/* Free the original skb. */ |
||||
dev_kfree_skb_irq(tp->tx_buffers[entry].skb); |
||||
tp->tx_buffers[entry].skb = NULL; |
||||
tp->tx_buffers[entry].mapping = 0; |
||||
tx++; |
||||
} |
||||
|
||||
#ifndef final_version |
||||
if (tp->cur_tx - dirty_tx > TX_RING_SIZE) { |
||||
dev_err(&dev->dev, |
||||
"Out-of-sync dirty pointer, %d vs. %d\n", |
||||
dirty_tx, tp->cur_tx); |
||||
dirty_tx += TX_RING_SIZE; |
||||
} |
||||
#endif |
||||
|
||||
if (tp->cur_tx - dirty_tx < TX_RING_SIZE - 2) |
||||
netif_wake_queue(dev); |
||||
|
||||
tp->dirty_tx = dirty_tx; |
||||
if (csr5 & TxDied) { |
||||
if (tulip_debug > 2) |
||||
dev_warn(&dev->dev, |
||||
"The transmitter stopped. CSR5 is %x, CSR6 %x, new CSR6 %x\n", |
||||
csr5, ioread32(ioaddr + CSR6), |
||||
tp->csr6); |
||||
tulip_restart_rxtx(tp); |
||||
} |
||||
spin_unlock(&tp->lock); |
||||
} |
||||
|
||||
/* Log errors. */ |
||||
if (csr5 & AbnormalIntr) { /* Abnormal error summary bit. */ |
||||
if (csr5 == 0xffffffff) |
||||
break; |
||||
if (csr5 & TxJabber) tp->stats.tx_errors++; |
||||
if (csr5 & TxFIFOUnderflow) { |
||||
if ((tp->csr6 & 0xC000) != 0xC000) |
||||
tp->csr6 += 0x4000; /* Bump up the Tx threshold */ |
||||
else |
||||
tp->csr6 |= 0x00200000; /* Store-n-forward. */ |
||||
/* Restart the transmit process. */ |
||||
tulip_restart_rxtx(tp); |
||||
iowrite32(0, ioaddr + CSR1); |
||||
} |
||||
if (csr5 & (RxDied | RxNoBuf)) { |
||||
iowrite32(tp->mc_filter[0], ioaddr + CSR27); |
||||
iowrite32(tp->mc_filter[1], ioaddr + CSR28); |
||||
} |
||||
if (csr5 & RxDied) { /* Missed a Rx frame. */ |
||||
tp->stats.rx_missed_errors += ioread32(ioaddr + CSR8) & 0xffff; |
||||
tp->stats.rx_errors++; |
||||
tulip_start_rxtx(tp); |
||||
} |
||||
/*
|
||||
* NB: t21142_lnk_change() does a del_timer_sync(), so be careful if this |
||||
* call is ever done under the spinlock |
||||
*/ |
||||
if (csr5 & (TPLnkPass | TPLnkFail | 0x08000000)) { |
||||
if (tp->link_change) |
||||
(tp->link_change)(dev, csr5); |
||||
} |
||||
if (csr5 & SystemError) { |
||||
int error = (csr5 >> 23) & 7; |
||||
/* oops, we hit a PCI error. The code produced corresponds
|
||||
* to the reason: |
||||
* 0 - parity error |
||||
* 1 - master abort |
||||
* 2 - target abort |
||||
* Note that on parity error, we should do a software reset |
||||
* of the chip to get it back into a sane state (according |
||||
* to the 21142/3 docs that is). |
||||
* -- rmk |
||||
*/ |
||||
dev_err(&dev->dev, |
||||
"(%lu) System Error occurred (%d)\n", |
||||
tp->nir, error); |
||||
} |
||||
/* Clear all error sources, included undocumented ones! */ |
||||
iowrite32(0x0800f7ba, ioaddr + CSR5); |
||||
oi++; |
||||
} |
||||
if (csr5 & TimerInt) { |
||||
|
||||
if (tulip_debug > 2) |
||||
dev_err(&dev->dev, |
||||
"Re-enabling interrupts, %08x\n", |
||||
csr5); |
||||
iowrite32(VALID_INTR, ioaddr + CSR7); |
||||
oi++; |
||||
} |
||||
if (tx > maxtx || rx > maxrx || oi > maxoi) { |
||||
if (tulip_debug > 1) |
||||
dev_warn(&dev->dev, "Too much work during an interrupt, csr5=0x%08x. (%lu) (%d,%d,%d)\n", |
||||
csr5, tp->nir, tx, rx, oi); |
||||
|
||||
/* Acknowledge all interrupt sources. */ |
||||
iowrite32(0x8001ffff, ioaddr + CSR5); |
||||
/* Mask all interrupting sources, set timer to
|
||||
re-enable. */ |
||||
iowrite32(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7); |
||||
iowrite32(0x0012, ioaddr + CSR11); |
||||
break; |
||||
} |
||||
|
||||
work_count--; |
||||
if (work_count == 0) |
||||
break; |
||||
|
||||
csr5 = ioread32(ioaddr + CSR5); |
||||
|
||||
if (rxd) |
||||
csr5 &= ~RxPollInt; |
||||
} while ((csr5 & (TxNoBuf | |
||||
TxDied | |
||||
TxIntr | |
||||
TimerInt | |
||||
/* Abnormal intr. */ |
||||
RxDied | |
||||
TxFIFOUnderflow | |
||||
TxJabber | |
||||
TPLnkFail | |
||||
SystemError )) != 0); |
||||
|
||||
if ((missed = ioread32(ioaddr + CSR8) & 0x1ffff)) { |
||||
tp->stats.rx_dropped += missed & 0x10000 ? 0x10000 : missed; |
||||
} |
||||
|
||||
if (tulip_debug > 4) |
||||
printk(KERN_DEBUG "%s: exiting interrupt, csr5=%#04x\n", |
||||
dev->name, ioread32(ioaddr + CSR5)); |
||||
|
||||
return IRQ_HANDLED; |
||||
} |
Loading…
Reference in new issue