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@ -1,3 +1,5 @@ |
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#include <dt-bindings/interrupt-controller/mips-gic.h> |
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/ { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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@ -72,12 +74,22 @@ |
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reg = <0x300 0x100>; |
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}; |
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cpc@1fbf0000 { |
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compatible = "mtk,mt7621-cpc"; |
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reg = <0x1fbf0000 0x8000>; |
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}; |
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mc@1fbf8000 { |
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compatible = "mtk,mt7621-mc"; |
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reg = <0x1fbf8000 0x8000>; |
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}; |
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uartlite@c00 { |
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compatible = "ns16550a"; |
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reg = <0xc00 0x100>; |
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interrupt-parent = <&gic>; |
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interrupts = <0 26 4>; |
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interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>; |
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reg-shift = <2>; |
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reg-io-width = <4>; |
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@ -210,7 +222,7 @@ |
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reg = <0x1E130000 4000>; |
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interrupt-parent = <&gic>; |
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interrupts = <0 20 4>; |
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interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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xhci@1E1C0000 { |
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@ -220,7 +232,7 @@ |
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reg = <0x1E1C0000 4000>; |
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interrupt-parent = <&gic>; |
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interrupts = <0 22 4>; |
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interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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gic: interrupt-controller@1fbc0000 { |
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@ -273,7 +285,7 @@ |
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reset-names = "fe", "eth"; |
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interrupt-parent = <&gic>; |
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interrupts = <0 3 4>; |
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interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>; |
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mdio-bus { |
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#address-cells = <1>; |
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@ -290,7 +302,7 @@ |
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compatible = "ralink,mt7620a-gsw"; |
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reg = <0x1e110000 8000>; |
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interrupt-parent = <&gic>; |
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interrupts = <0 23 4>; |
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interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>; |
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}; |
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pcie@1e140000 { |
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@ -313,9 +325,9 @@ |
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>; |
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interrupt-parent = <&gic>; |
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interrupts = <0 4 4 |
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0 24 4 |
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0 25 4>; |
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interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH |
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GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH |
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GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>; |
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status = "okay"; |
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