lantiq: Fixes to athxk EEPROM loading

Use platform data array for storing ath5k EEPROM instead of creating another one.
EEPROM size is 2048 words (2 bytes), so we must read 4096 bytes from flash.
No need to keep the checksum fix now that the EEPROM is loaded completely.
Add a manual eeprom swap for ath9k and keep the endian way.
Use mac-offset property retrieved from the DTS.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>

SVN-Revision: 36901
master
John Crispin 11 years ago
parent 7638caf35d
commit 76c79f50d7
  1. 2
      target/linux/lantiq/dts/ARV4518PWR01.dts
  2. 2
      target/linux/lantiq/dts/ARV4518PWR01A.dts
  3. 2
      target/linux/lantiq/dts/ARV4525PW.dts
  4. 2
      target/linux/lantiq/dts/ARV452CQW.dts
  5. 5
      target/linux/lantiq/dts/ARV7518PW.dts
  6. 43
      target/linux/lantiq/patches-3.7/0302-wifi-eep.patch
  7. 39
      target/linux/lantiq/patches-3.8/0037-owrt-lantiq-wifi-and-ethernet-eeprom-handling.patch

@ -71,7 +71,7 @@
ath5k_eep {
compatible = "ath5k,eeprom";
reg = <0 0x3f0400 0x800
reg = <0 0x3f0400 0x1000
0 0x3f0016 0x6>;
ath,mac-increment = <1>;
ath,eep-swap;

@ -71,7 +71,7 @@
ath5k_eep {
compatible = "ath5k,eeprom";
reg = <0 0x3f0400 0x800
reg = <0 0x3f0400 0x1000
0 0x3f0016 0x6>;
ath,mac-increment = <1>;
ath,eep-swap;

@ -57,7 +57,7 @@
ath5k_eep {
compatible = "ath5k,eeprom";
reg = <0 0x3f0400 0x800>;
reg = <0 0x3f0400 0x1000>;
ath,mac-offset = <0>;
ath,eep-swap;
};

@ -62,7 +62,7 @@
ath5k_eep {
compatible = "ath5k,eeprom";
reg = <0 0x3f0400 0x800>;
reg = <0 0x3f0400 0x1000>;
ath,mac-offset = <0>;
ath,eep-swap;
};

@ -69,12 +69,11 @@
ath9k_eep {
compatible = "ath9k,eeprom";
reg = <0 0x7f0400 0x800
reg = <0 0x7f0400 0x1000
0 0x7f0016 0x6>;
ath,mac-increment = <1>;
ath,pci-slot = <14>;
ath,eep-swap;
ath,eep-csum;
ath,eep-endian;
};
};

@ -9,7 +9,7 @@
obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
--- /dev/null
+++ b/arch/mips/lantiq/xway/ath_eep.c
@@ -0,0 +1,206 @@
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
+ * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
@ -35,7 +35,6 @@
+struct ath9k_platform_data ath9k_pdata = {
+ .led_pin = -1,
+};
+static u16 ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
+static u8 athxk_eeprom_mac[6];
+
+static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
@ -52,7 +51,6 @@
+ int mac_offset;
+ u32 mac_inc = 0, pci_slot = 0;
+ int i;
+ u16 *eepdata, sum, el;
+
+ eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@ -61,34 +59,26 @@
+ dev_err(&pdev->dev, "failed to load eeprom address\n");
+ return -ENODEV;
+ }
+ if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS) {
+ if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
+ dev_err(&pdev->dev, "eeprom has an invalid size\n");
+ return -EINVAL;
+ }
+
+ eep = ioremap(eep_res->start, resource_size(eep_res));
+ memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS);
+ memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS << 1);
+
+ if (of_find_property(np, "ath,eep-swap", NULL)) {
+ if (of_find_property(np, "ath,eep-swap", NULL))
+ for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
+ ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
+
+ if (of_find_property(np, "ath,eep-endian", NULL)) {
+ ath9k_pdata.endian_check = true;
+
+ dev_info(&pdev->dev, "endian check enabled.\n");
+ }
+
+ if (of_find_property(np, "ath,eep-csum", NULL)) {
+ sum = ath9k_pdata.eeprom_data[0x200>>1];
+ el = sum / sizeof(u16) - 2; /* skip length and (old) checksum */
+ eepdata = (u16 *) (&ath9k_pdata.eeprom_data[0x204>>1]); /* after checksum */
+ for (i = 0; i < el; i++)
+ sum ^= *eepdata++;
+ sum ^= 0xffff;
+ ath9k_pdata.eeprom_data[0x202>>1] = sum;
+
+ dev_info(&pdev->dev, "checksum fixed.\n");
+ }
+
+ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data, 6);
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
+ } else if (mac_res) {
+ if (resource_size(mac_res) != 6) {
+ dev_err(&pdev->dev, "mac has an invalid size\n");
@ -135,7 +125,7 @@
+{
+ return platform_driver_probe(&ath9k_eeprom_driver, of_ath9k_eeprom_probe);
+}
+arch_initcall(of_ath9k_eeprom_init);
+late_initcall(of_ath9k_eeprom_init);
+
+
+static int ath5k_pci_plat_dev_init(struct pci_dev *dev)
@ -160,20 +150,20 @@
+ dev_err(&pdev->dev, "failed to load eeprom address\n");
+ return -ENODEV;
+ }
+ if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS) {
+ if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
+ dev_err(&pdev->dev, "eeprom has an invalid size\n");
+ return -EINVAL;
+ }
+
+ eep = ioremap(eep_res->start, resource_size(eep_res));
+ memcpy_fromio(ath5k_eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS);
+ memcpy_fromio(ath5k_pdata.eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS << 1);
+
+ if (of_find_property(np, "ath,eep-swap", NULL))
+ for (i = 0; i < (ATH5K_PLAT_EEP_MAX_WORDS >> 1); i++)
+ ath5k_eeprom_data[i] = swab16(ath5k_eeprom_data[i]);
+ for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
+ ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
+
+ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_eeprom_data, 6);
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
+ } else if (mac_res) {
+ if (resource_size(mac_res) != 6) {
+ dev_err(&pdev->dev, "mac has an invalid size\n");
@ -189,7 +179,6 @@
+ if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
+ athxk_eeprom_mac[5] += mac_inc;
+
+ ath5k_pdata.eeprom_data = ath5k_eeprom_data;
+ ath5k_pdata.macaddr = athxk_eeprom_mac;
+ ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
+
@ -215,7 +204,7 @@
+{
+ return platform_driver_probe(&ath5k_eeprom_driver, of_ath5k_eeprom_probe);
+}
+device_initcall(of_ath5k_eeprom_init);
+late_initcall(of_ath5k_eeprom_init);
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -90,5 +90,8 @@ int xrx200_gphy_boot(struct device *dev,

@ -50,7 +50,7 @@ Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
obj-$(CONFIG_XRX200_PHY_FW) += xrx200_phy_fw.o
--- /dev/null
+++ b/arch/mips/lantiq/xway/ath_eep.c
@@ -0,0 +1,206 @@
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2011 Luca Olivetti <luca@ventoso.org>
+ * Copyright (C) 2011 John Crispin <blogic@openwrt.org>
@ -76,7 +76,6 @@ Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
+struct ath9k_platform_data ath9k_pdata = {
+ .led_pin = -1,
+};
+static u16 ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
+static u8 athxk_eeprom_mac[6];
+
+static int ath9k_pci_plat_dev_init(struct pci_dev *dev)
@ -93,7 +92,6 @@ Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
+ int mac_offset;
+ u32 mac_inc = 0, pci_slot = 0;
+ int i;
+ u16 *eepdata, sum, el;
+
+ eep_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ mac_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
@ -102,34 +100,26 @@ Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
+ dev_err(&pdev->dev, "failed to load eeprom address\n");
+ return -ENODEV;
+ }
+ if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS) {
+ if (resource_size(eep_res) != ATH9K_PLAT_EEP_MAX_WORDS << 1) {
+ dev_err(&pdev->dev, "eeprom has an invalid size\n");
+ return -EINVAL;
+ }
+
+ eep = ioremap(eep_res->start, resource_size(eep_res));
+ memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS);
+ memcpy_fromio(ath9k_pdata.eeprom_data, eep, ATH9K_PLAT_EEP_MAX_WORDS << 1);
+
+ if (of_find_property(np, "ath,eep-swap", NULL)) {
+ if (of_find_property(np, "ath,eep-swap", NULL))
+ for (i = 0; i < ATH9K_PLAT_EEP_MAX_WORDS; i++)
+ ath9k_pdata.eeprom_data[i] = swab16(ath9k_pdata.eeprom_data[i]);
+
+ if (of_find_property(np, "ath,eep-endian", NULL)) {
+ ath9k_pdata.endian_check = true;
+
+ dev_info(&pdev->dev, "endian check enabled.\n");
+ }
+
+ if (of_find_property(np, "ath,eep-csum", NULL)) {
+ sum = ath9k_pdata.eeprom_data[0x200>>1];
+ el = sum / sizeof(u16) - 2; /* skip length and (old) checksum */
+ eepdata = (u16 *) (&ath9k_pdata.eeprom_data[0x204>>1]); /* after checksum */
+ for (i = 0; i < el; i++)
+ sum ^= *eepdata++;
+ sum ^= 0xffff;
+ ath9k_pdata.eeprom_data[0x202>>1] = sum;
+
+ dev_info(&pdev->dev, "checksum fixed.\n");
+ }
+
+ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data, 6);
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath9k_pdata.eeprom_data + mac_offset, 6);
+ } else if (mac_res) {
+ if (resource_size(mac_res) != 6) {
+ dev_err(&pdev->dev, "mac has an invalid size\n");
@ -201,20 +191,20 @@ Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
+ dev_err(&pdev->dev, "failed to load eeprom address\n");
+ return -ENODEV;
+ }
+ if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS) {
+ if (resource_size(eep_res) != ATH5K_PLAT_EEP_MAX_WORDS << 1) {
+ dev_err(&pdev->dev, "eeprom has an invalid size\n");
+ return -EINVAL;
+ }
+
+ eep = ioremap(eep_res->start, resource_size(eep_res));
+ memcpy_fromio(ath5k_eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS);
+ memcpy_fromio(ath5k_pdata.eeprom_data, eep, ATH5K_PLAT_EEP_MAX_WORDS << 1);
+
+ if (of_find_property(np, "ath,eep-swap", NULL))
+ for (i = 0; i < (ATH5K_PLAT_EEP_MAX_WORDS >> 1); i++)
+ ath5k_eeprom_data[i] = swab16(ath5k_eeprom_data[i]);
+ for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS; i++)
+ ath5k_pdata.eeprom_data[i] = swab16(ath5k_pdata.eeprom_data[i]);
+
+ if (!of_property_read_u32(np, "ath,mac-offset", &mac_offset)) {
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_eeprom_data, 6);
+ memcpy_fromio(athxk_eeprom_mac, (void*) ath5k_pdata.eeprom_data + mac_offset, 6);
+ } else if (mac_res) {
+ if (resource_size(mac_res) != 6) {
+ dev_err(&pdev->dev, "mac has an invalid size\n");
@ -230,7 +220,6 @@ Subject: [PATCH 37/40] owrt: lantiq: wifi and ethernet eeprom handling
+ if (!of_property_read_u32(np, "ath,mac-increment", &mac_inc))
+ athxk_eeprom_mac[5] += mac_inc;
+
+ ath5k_pdata.eeprom_data = ath5k_eeprom_data;
+ ath5k_pdata.macaddr = athxk_eeprom_mac;
+ ltq_pci_plat_dev_init = ath5k_pci_plat_dev_init;
+

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