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@ -13,12 +13,14 @@ |
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#include <linux/mtd/mtd.h> |
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#include <linux/mtd/partitions.h> |
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#include <linux/delay.h> |
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#include <asm/io.h> |
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#include <asm/irq.h> |
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#include <asm/bootinfo.h> |
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#include <asm/mach-adm5120/adm5120_info.h> |
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#include <asm/mach-adm5120/adm5120_defs.h> |
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#define SMEM1_BASE 0x10000000 // from ADM5120 documentation
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#define SMEM1(x) (*((volatile unsigned char *) (KSEG1ADDR(SMEM1_BASE) + x))) |
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#define SMEM1(x) (*((volatile unsigned char *) (KSEG1ADDR(ADM5120_SRAM1_BASE) + x))) |
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#define NAND_RW_REG 0x0 //data register
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#define NAND_SET_CEn 0x1 //CE# low
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@ -86,6 +88,10 @@ unsigned get_rbnand_block_size(void) { |
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EXPORT_SYMBOL(get_rbnand_block_size); |
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int __init rbmips_init(void) { |
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if (!adm5120_nand_boot) |
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return -ENODEV; |
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memset(&rmtd, 0, sizeof(rmtd)); |
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memset(&rnand, 0, sizeof(rnand)); |
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printk(KERN_INFO "RB1xx nand\n"); |
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@ -93,11 +99,11 @@ int __init rbmips_init(void) { |
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MEM32(0xB2000008) = 0x1; |
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SMEM1(NAND_SET_SPn) = 0x01; |
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SMEM1(NAND_CLR_WPn) = 0x01; |
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rnand.IO_ADDR_R = (unsigned char *)KSEG1ADDR(SMEM1_BASE); |
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rnand.IO_ADDR_R = (unsigned char *)KSEG1ADDR(ADM5120_SRAM1_BASE); |
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rnand.IO_ADDR_W = rnand.IO_ADDR_R; |
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rnand.cmd_ctrl = rbmips_hwcontrol100; |
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rnand.dev_ready = rb100_dev_ready; |
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p_nand = (void __iomem *)ioremap(( unsigned long)SMEM1_BASE, 0x1000); |
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p_nand = (void __iomem *)ioremap(( unsigned long)ADM5120_SRAM1_BASE, 0x1000); |
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if (!p_nand) { |
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printk(KERN_WARNING "RB1xx nand Unable ioremap buffer\n"); |
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return -ENXIO; |
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