unify gcc 3.4 fixes, move flash chip drivers to generic patches, move diag_led driver to separate patch, update docs
SVN-Revision: 1316master
Imre Kaloz
19 years ago
parent
328d6b8fa2
commit
697c74552a
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,265 @@ |
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diff -Nur linux-2.4.30/drivers/net/diag/Makefile linux-2.4.30.openwrt/drivers/net/diag/Makefile
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--- linux-2.4.30/drivers/net/diag/Makefile 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.4.30.openwrt/drivers/net/diag/Makefile 2005-06-28 11:35:26.000000000 +0200
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@@ -0,0 +1,13 @@
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+#$Id$
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+
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+EXTRA_CFLAGS := -I$(TOPDIR)/arch/mips/bcm947xx/include -DBCMDRIVER
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+
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+O_TARGET := diag.o
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+
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+MAC_OBJS := diag_led.o
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+
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+export-objs :=
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+obj-y := $(MAC_OBJS)
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+obj-m := $(O_TARGET)
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+
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+include $(TOPDIR)/Rules.make
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diff -Nur linux-2.4.30/drivers/net/diag/diag_led.c linux-2.4.30.openwrt/drivers/net/diag/diag_led.c
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--- linux-2.4.30/drivers/net/diag/diag_led.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.4.30.openwrt/drivers/net/diag/diag_led.c 2005-06-28 11:35:26.000000000 +0200
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@@ -0,0 +1,244 @@
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+/*
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+ * diag_led.c - replacement diag module
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+ *
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+ * Copyright (C) 2004 Mike Baker,
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+ * Imre Kaloz <kaloz@dune.hu>
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License
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+ * as published by the Free Software Foundation; either version 2
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+ * of the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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+ *
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+ * $Id: diag_led.c,v 1.5 2005/04/18 09:05:24 mbm Exp $
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+ */
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+
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+/*
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+ * ChangeLog:
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+ * 2004/03/28 initial release
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+ * 2004/08/26 asus & buffalo support added
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+ * 2005/03/14 asus wl-500g deluxe and buffalo v2 support added
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+ * 2005/04/13 added licensing informations
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+ * 2005/04/18 base reset polarity off initial readings
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/init.h>
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+#include <linux/kernel.h>
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+#include <linux/sysctl.h>
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+#include <asm/io.h>
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+#include <typedefs.h>
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+#include <bcmdevs.h>
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+#include <sbutils.h>
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+
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+extern char * nvram_get(const char *name);
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+static void *sbh;
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+
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+// v2.x - - - - -
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+#define DIAG_GPIO (1<<1)
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+#define DMZ_GPIO (1<<7)
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+
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+static void set_gpio(uint32 mask, uint32 value) {
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+ sb_gpiocontrol(sbh,mask,0);
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+ sb_gpioouten(sbh,mask,mask);
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+ sb_gpioout(sbh,mask,value);
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+}
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+
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+static void v2_set_diag(u8 state) {
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+ set_gpio(DIAG_GPIO,state);
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+}
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+static void v2_set_dmz(u8 state) {
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+ set_gpio(DMZ_GPIO,state);
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+}
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+
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+// v1.x - - - - -
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+#define LED_DIAG 0x13
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+#define LED_DMZ 0x12
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+
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+static void v1_set_diag(u8 state) {
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+ if (!state) {
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+ *(volatile u8*)(KSEG1ADDR(BCM4710_EUART)+LED_DIAG)=0xFF;
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+ } else {
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+ *(volatile u8*)(KSEG1ADDR(BCM4710_EUART)+LED_DIAG);
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+ }
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+}
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+static void v1_set_dmz(u8 state) {
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+ if (!state) {
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+ *(volatile u8*)(KSEG1ADDR(BCM4710_EUART)+LED_DMZ)=0xFF;
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+ } else {
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+ *(volatile u8*)(KSEG1ADDR(BCM4710_EUART)+LED_DMZ);
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+ }
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+}
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+
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+// - - - - -
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+static void ignore(u8 ignored) {};
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+
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+// - - - - -
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+#define BIT_DMZ 0x01
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+#define BIT_DIAG 0x04
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+
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+void (*set_diag)(u8 state);
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+void (*set_dmz)(u8 state);
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+
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+static unsigned int diag = 0;
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+
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+static void diag_change()
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+{
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+ set_diag(0xFF); // off
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+ set_dmz(0xFF); // off
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+
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+ if(diag & BIT_DIAG)
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+ set_diag(0x00); // on
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+ if(diag & BIT_DMZ)
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+ set_dmz(0x00); // on
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+}
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+
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+static int proc_diag(ctl_table *table, int write, struct file *filp,
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+ void *buffer, size_t *lenp)
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+{
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+ int r;
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+ r = proc_dointvec(table, write, filp, buffer, lenp);
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+ if (write && !r) {
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+ diag_change();
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+ }
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+ return r;
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+}
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+
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+// - - - - -
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+static unsigned char reset_gpio = 0;
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+static unsigned char reset_polarity = 0;
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+static unsigned int reset = 0;
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+
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+static int proc_reset(ctl_table *table, int write, struct file *filp,
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+ void *buffer, size_t *lenp)
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+{
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+
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+ if (reset_gpio) {
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+ sb_gpiocontrol(sbh,reset_gpio,reset_gpio);
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+ sb_gpioouten(sbh,reset_gpio,0);
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+ reset=!(sb_gpioin(sbh)&reset_gpio);
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+
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+ if (reset_polarity) reset=!reset;
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+ } else {
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+ reset=0;
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+ }
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+
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+ return proc_dointvec(table, write, filp, buffer, lenp);
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+}
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+
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+// - - - - -
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+static struct ctl_table_header *diag_sysctl_header;
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+
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+static ctl_table sys_diag[] = {
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+ {
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+ ctl_name: 2000,
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+ procname: "diag",
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+ data: &diag,
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+ maxlen: sizeof(diag),
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+ mode: 0644,
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+ proc_handler: proc_diag
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+ },
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+ {
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+ ctl_name: 2001,
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+ procname: "reset",
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+ data: &reset,
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+ maxlen: sizeof(reset),
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+ mode: 0444,
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+ proc_handler: proc_reset
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+ },
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+ { 0 }
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+};
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+
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+static int __init diag_init()
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+{
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+ char *buf;
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+ u32 board_type;
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+ sbh = sb_kattach();
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+ sb_gpiosetcore(sbh);
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+
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+ board_type = sb_boardtype(sbh);
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+ printk(KERN_INFO "diag boardtype: %08x\n",board_type);
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+
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+ set_diag=ignore;
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+ set_dmz=ignore;
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+
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+ if ((board_type & 0xf00) == 0x400) {
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+ buf=nvram_get("boardtype")?:"";
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+ if (!strcmp(buf,"bcm94710dev")) {
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+ buf=nvram_get("boardnum")?:"";
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+ if (!strcmp(buf,"42")) {
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+ // wrt54g v1.x
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+ set_diag=v1_set_diag;
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+ set_dmz=v1_set_dmz;
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+ reset_gpio=(1<<6);
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+ }
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+ if (!strcmp(buf,"asusX")) {
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+ //asus wl-500g
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+ reset_gpio=(1<<6);
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+ }
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+ }
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+ if (!strcmp(buf,"bcm94710ap")) {
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+ buf=nvram_get("boardnum")?:"";
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+ if (!strcmp(buf,"42")) {
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+ // buffalo
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+ set_dmz=v2_set_dmz;
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+ reset_gpio=(1<<4);
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+ }
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+ if (!strcmp(buf,"44")) {
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+ //dell truemobile
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+ set_dmz=v2_set_dmz;
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+ reset_gpio=(1<<0);
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+ }
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+ }
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+ } else {
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+ buf=nvram_get("boardnum")?:"";
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+ if (!strcmp(buf,"42")) {
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+ //linksys
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+ set_diag=v2_set_diag;
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+ set_dmz=v2_set_dmz;
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+ reset_gpio=(1<<6);
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+ }
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+ if (!strcmp(buf,"44")) {
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+ //motorola
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+ reset_gpio=(1<<5);
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+ }
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+ if (!strcmp(buf,"00")) {
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+ //buffalo
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+ reset_gpio=(1<<7);
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+ }
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+ if (!strcmp(buf,"45")) {
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+ //wl-500g deluxe
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+ reset_gpio=(1<<6);
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+ }
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+ }
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+
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+
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+ sb_gpiocontrol(sbh,reset_gpio,reset_gpio);
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+ sb_gpioouten(sbh,reset_gpio,0);
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+ reset_polarity=!(sb_gpioin(sbh)&reset_gpio);
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+
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+ diag_sysctl_header = register_sysctl_table(sys_diag, 0);
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+ diag_change();
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+
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+ return 0;
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+}
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+
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+static void __exit diag_exit()
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+{
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+ unregister_sysctl_table(diag_sysctl_header);
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+}
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+
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+EXPORT_NO_SYMBOLS;
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+MODULE_AUTHOR("openwrt.org");
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+MODULE_LICENSE("GPL");
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+
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+module_init(diag_init);
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+module_exit(diag_exit);
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@ -0,0 +1,925 @@ |
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diff -Nur linux-2.4.30/drivers/mtd/chips/Config.in linux-2.4.30.openwrt/drivers/mtd/chips/Config.in
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--- linux-2.4.30/drivers/mtd/chips/Config.in 2003-06-13 16:51:34.000000000 +0200
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+++ linux-2.4.30.openwrt/drivers/mtd/chips/Config.in 2005-06-28 11:26:26.000000000 +0200
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@@ -45,6 +45,7 @@
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dep_tristate ' Support for Intel/Sharp flash chips' CONFIG_MTD_CFI_INTELEXT $CONFIG_MTD_GEN_PROBE
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dep_tristate ' Support for AMD/Fujitsu flash chips' CONFIG_MTD_CFI_AMDSTD $CONFIG_MTD_GEN_PROBE
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dep_tristate ' Support for ST (Advanced Architecture) flash chips' CONFIG_MTD_CFI_STAA $CONFIG_MTD_GEN_PROBE
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+dep_tristate ' Support for SST flash chips' CONFIG_MTD_CFI_SSTSTD $CONFIG_MTD_GEN_PROBE
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dep_tristate ' Support for RAM chips in bus mapping' CONFIG_MTD_RAM $CONFIG_MTD
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dep_tristate ' Support for ROM chips in bus mapping' CONFIG_MTD_ROM $CONFIG_MTD
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diff -Nur linux-2.4.30/drivers/mtd/chips/Makefile linux-2.4.30.openwrt/drivers/mtd/chips/Makefile
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--- linux-2.4.30/drivers/mtd/chips/Makefile 2003-06-13 16:51:34.000000000 +0200
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+++ linux-2.4.30.openwrt/drivers/mtd/chips/Makefile 2005-06-28 11:26:26.000000000 +0200
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@@ -18,6 +18,7 @@
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obj-$(CONFIG_MTD_AMDSTD) += amd_flash.o
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obj-$(CONFIG_MTD_CFI) += cfi_probe.o
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obj-$(CONFIG_MTD_CFI_STAA) += cfi_cmdset_0020.o
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+obj-$(CONFIG_MTD_CFI_SSTSTD) += cfi_cmdset_0701.o
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obj-$(CONFIG_MTD_CFI_AMDSTD) += cfi_cmdset_0002.o
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obj-$(CONFIG_MTD_CFI_INTELEXT) += cfi_cmdset_0001.o
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obj-$(CONFIG_MTD_GEN_PROBE) += gen_probe.o
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diff -Nur linux-2.4.30/drivers/mtd/chips/cfi_cmdset_0701.c linux-2.4.30.openwrt/drivers/mtd/chips/cfi_cmdset_0701.c
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--- linux-2.4.30/drivers/mtd/chips/cfi_cmdset_0701.c 1970-01-01 01:00:00.000000000 +0100
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+++ linux-2.4.30.openwrt/drivers/mtd/chips/cfi_cmdset_0701.c 2005-06-28 11:26:26.000000000 +0200
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@@ -0,0 +1,855 @@
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+/*
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+ * Common Flash Interface support:
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+ * SST Standard Vendor Command Set (ID 0x0701)
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+ *
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+ * Copyright (C) 2000 Crossnet Co. <info@crossnet.co.jp>
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+ *
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+ * 2_by_8 routines added by Simon Munton
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+ *
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+ * This code is GPL
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+ *
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+ * $Id: cfi_cmdset_0701.c,v 1.1 2005/03/16 13:50:00 wbx Exp $
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+ *
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+ */
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+
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+#include <linux/module.h>
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+#include <linux/types.h>
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+#include <linux/kernel.h>
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+#include <linux/sched.h>
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+#include <asm/io.h>
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+#include <asm/byteorder.h>
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+
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+#include <linux/errno.h>
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+#include <linux/slab.h>
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+#include <linux/delay.h>
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+#include <linux/interrupt.h>
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+#include <linux/mtd/map.h>
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+#include <linux/mtd/cfi.h>
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+
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+static int cfi_sststd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
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+static int cfi_sststd_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
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+static int cfi_sststd_erase_onesize(struct mtd_info *, struct erase_info *);
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+static int cfi_sststd_erase_varsize(struct mtd_info *, struct erase_info *);
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+static void cfi_sststd_sync (struct mtd_info *);
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+static int cfi_sststd_suspend (struct mtd_info *);
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+static void cfi_sststd_resume (struct mtd_info *);
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+
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+static void cfi_sststd_destroy(struct mtd_info *);
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+
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+struct mtd_info *cfi_cmdset_0701(struct map_info *, int);
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+static struct mtd_info *cfi_sststd_setup (struct map_info *);
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+
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+
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+static struct mtd_chip_driver cfi_sststd_chipdrv = {
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+ probe: NULL, /* Not usable directly */
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+ destroy: cfi_sststd_destroy,
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+ name: "cfi_cmdset_0701",
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+ module: THIS_MODULE
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+};
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+
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+struct mtd_info *cfi_cmdset_0701(struct map_info *map, int primary)
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+{
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+ struct cfi_private *cfi = map->fldrv_priv;
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+ int ofs_factor = cfi->interleave * cfi->device_type;
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+ int i;
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+ __u8 major, minor;
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+ __u32 base = cfi->chips[0].start;
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+
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+ if (cfi->cfi_mode==1){
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+ __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
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+
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+ cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
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+ cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
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+ cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
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+
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+ major = cfi_read_query(map, base + (adr+3)*ofs_factor);
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+ minor = cfi_read_query(map, base + (adr+4)*ofs_factor);
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+
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+ printk(" SST Query Table v%c.%c at 0x%4.4X\n",
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+ major, minor, adr);
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+ cfi_send_gen_cmd(0xf0, 0x5555, base, map, cfi, cfi->device_type, NULL);
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+
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+ cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
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+ cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
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+ cfi_send_gen_cmd(0x90, 0x5555, base, map, cfi, cfi->device_type, NULL);
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+ cfi->mfr = cfi_read_query(map, base);
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+ cfi->id = cfi_read_query(map, base + ofs_factor);
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+
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+ cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
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+ cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
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+ cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
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+
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+ switch (cfi->device_type) {
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+ case CFI_DEVICETYPE_X16:
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+ cfi->addr_unlock1 = 0x5555;
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+ cfi->addr_unlock2 = 0x2AAA;
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+ break;
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+ default:
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+ printk(KERN_NOTICE "Eep. Unknown cfi_cmdset_0701 device type %d\n", cfi->device_type);
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+ return NULL;
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+ }
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+ } /* CFI mode */
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+
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+ for (i=0; i< cfi->numchips; i++) {
|
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+ cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;
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+ cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
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+ cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;
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+ }
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+
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+ map->fldrv = &cfi_sststd_chipdrv;
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+ MOD_INC_USE_COUNT;
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||||
+
|
||||
+ cfi_send_gen_cmd(0xf0, 0x5555, base, map, cfi, cfi->device_type, NULL);
|
||||
+ return cfi_sststd_setup(map);
|
||||
+}
|
||||
+
|
||||
+static struct mtd_info *cfi_sststd_setup(struct map_info *map)
|
||||
+{
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ struct mtd_info *mtd;
|
||||
+ unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
|
||||
+
|
||||
+ mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);
|
||||
+ printk("number of %s chips: %d\n", (cfi->cfi_mode)?"JEDEC":"CFI",cfi->numchips);
|
||||
+
|
||||
+ if (!mtd) {
|
||||
+ printk("Failed to allocate memory for MTD device\n");
|
||||
+ kfree(cfi->cmdset_priv);
|
||||
+ return NULL;
|
||||
+ }
|
||||
+
|
||||
+ memset(mtd, 0, sizeof(*mtd));
|
||||
+ mtd->priv = map;
|
||||
+ mtd->type = MTD_NORFLASH;
|
||||
+ /* Also select the correct geometry setup too */
|
||||
+ mtd->size = devsize * cfi->numchips;
|
||||
+
|
||||
+ if (cfi->cfiq->NumEraseRegions == 1) {
|
||||
+ /* No need to muck about with multiple erase sizes */
|
||||
+ mtd->erasesize = ((cfi->cfiq->EraseRegionInfo[0] >> 8) & ~0xff) * cfi->interleave;
|
||||
+ } else {
|
||||
+ unsigned long offset = 0;
|
||||
+ int i,j;
|
||||
+
|
||||
+ mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
|
||||
+ mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info) * mtd->numeraseregions, GFP_KERNEL);
|
||||
+ if (!mtd->eraseregions) {
|
||||
+ printk("Failed to allocate memory for MTD erase region info\n");
|
||||
+ kfree(cfi->cmdset_priv);
|
||||
+ return NULL;
|
||||
+ }
|
||||
+
|
||||
+ for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
|
||||
+ unsigned long ernum, ersize;
|
||||
+ ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
|
||||
+ ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
|
||||
+
|
||||
+ if (mtd->erasesize < ersize) {
|
||||
+ mtd->erasesize = ersize;
|
||||
+ }
|
||||
+ for (j=0; j<cfi->numchips; j++) {
|
||||
+ mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
|
||||
+ mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
|
||||
+ mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
|
||||
+ }
|
||||
+ offset += (ersize * ernum);
|
||||
+ }
|
||||
+
|
||||
+ // debug
|
||||
+ for (i=0; i<mtd->numeraseregions;i++){
|
||||
+ printk("%d: offset=0x%x,size=0x%x,blocks=%d\n",
|
||||
+ i,mtd->eraseregions[i].offset,
|
||||
+ mtd->eraseregions[i].erasesize,
|
||||
+ mtd->eraseregions[i].numblocks);
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ switch (CFIDEV_BUSWIDTH)
|
||||
+ {
|
||||
+ case 1:
|
||||
+ case 2:
|
||||
+ case 4:
|
||||
+ if (mtd->numeraseregions > 1)
|
||||
+ mtd->erase = cfi_sststd_erase_varsize;
|
||||
+ else
|
||||
+ mtd->erase = cfi_sststd_erase_onesize;
|
||||
+ mtd->read = cfi_sststd_read;
|
||||
+ mtd->write = cfi_sststd_write;
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ printk("Unsupported buswidth\n");
|
||||
+ kfree(mtd);
|
||||
+ kfree(cfi->cmdset_priv);
|
||||
+ return NULL;
|
||||
+ break;
|
||||
+ }
|
||||
+ mtd->sync = cfi_sststd_sync;
|
||||
+ mtd->suspend = cfi_sststd_suspend;
|
||||
+ mtd->resume = cfi_sststd_resume;
|
||||
+ mtd->flags = MTD_CAP_NORFLASH;
|
||||
+ map->fldrv = &cfi_sststd_chipdrv;
|
||||
+ mtd->name = map->name;
|
||||
+ MOD_INC_USE_COUNT;
|
||||
+ return mtd;
|
||||
+}
|
||||
+
|
||||
+static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
|
||||
+{
|
||||
+ DECLARE_WAITQUEUE(wait, current);
|
||||
+ unsigned long timeo = jiffies + HZ;
|
||||
+
|
||||
+ retry:
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ if (chip->state != FL_READY){
|
||||
+ printk("Waiting for chip to read, status = %d\n", chip->state);
|
||||
+ set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
+ add_wait_queue(&chip->wq, &wait);
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+
|
||||
+ schedule();
|
||||
+ remove_wait_queue(&chip->wq, &wait);
|
||||
+ timeo = jiffies + HZ;
|
||||
+
|
||||
+ goto retry;
|
||||
+ }
|
||||
+
|
||||
+ adr += chip->start;
|
||||
+
|
||||
+ chip->state = FL_READY;
|
||||
+
|
||||
+ map->copy_from(map, buf, adr, len);
|
||||
+
|
||||
+ wake_up(&chip->wq);
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int cfi_sststd_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ unsigned long ofs;
|
||||
+ int chipnum;
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ /* ofs: offset within the first chip that the first read should start */
|
||||
+
|
||||
+ chipnum = (from >> cfi->chipshift);
|
||||
+ ofs = from - (chipnum << cfi->chipshift);
|
||||
+
|
||||
+
|
||||
+ *retlen = 0;
|
||||
+
|
||||
+ while (len) {
|
||||
+ unsigned long thislen;
|
||||
+
|
||||
+ if (chipnum >= cfi->numchips)
|
||||
+ break;
|
||||
+
|
||||
+ if ((len + ofs -1) >> cfi->chipshift)
|
||||
+ thislen = (1<<cfi->chipshift) - ofs;
|
||||
+ else
|
||||
+ thislen = len;
|
||||
+
|
||||
+ ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
|
||||
+ if (ret)
|
||||
+ break;
|
||||
+
|
||||
+ *retlen += thislen;
|
||||
+ len -= thislen;
|
||||
+ buf += thislen;
|
||||
+
|
||||
+ ofs = 0;
|
||||
+ chipnum++;
|
||||
+ }
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, __u32 datum, int fast)
|
||||
+{
|
||||
+ unsigned long timeo = jiffies + HZ;
|
||||
+ unsigned int Last[4];
|
||||
+ unsigned long Count = 0;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ DECLARE_WAITQUEUE(wait, current);
|
||||
+ int ret = 0;
|
||||
+
|
||||
+ retry:
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ if (chip->state != FL_READY){
|
||||
+ printk("Waiting for chip to write, status = %d\n", chip->state);
|
||||
+ set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
+ add_wait_queue(&chip->wq, &wait);
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+
|
||||
+ schedule();
|
||||
+ remove_wait_queue(&chip->wq, &wait);
|
||||
+ printk("Wake up to write:\n");
|
||||
+ timeo = jiffies + HZ;
|
||||
+
|
||||
+ goto retry;
|
||||
+ }
|
||||
+
|
||||
+ chip->state = FL_WRITING;
|
||||
+
|
||||
+ adr += chip->start;
|
||||
+ ENABLE_VPP(map);
|
||||
+ cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+ cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+ cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+
|
||||
+ cfi_write(map, datum, adr);
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ cfi_udelay(chip->word_write_time);
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ Last[0] = cfi_read(map, adr);
|
||||
+ // printk("Last[0] is %x\n", Last[0]);
|
||||
+ Last[1] = cfi_read(map, adr);
|
||||
+ // printk("Last[1] is %x\n", Last[1]);
|
||||
+ Last[2] = cfi_read(map, adr);
|
||||
+ // printk("Last[2] is %x\n", Last[2]);
|
||||
+
|
||||
+ for (Count = 3; Last[(Count - 1) % 4] != Last[(Count - 2) % 4] && Count < 10000; Count++){
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ cfi_udelay(10);
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ Last[Count % 4] = cfi_read(map, adr);
|
||||
+ // printk("Last[%d%%4] is %x\n", Count, Last[Count%4]);
|
||||
+ }
|
||||
+
|
||||
+ if (Last[(Count - 1) % 4] != datum){
|
||||
+ printk("Last[%ld] is %x, datum is %x\n",(Count - 1) % 4,Last[(Count - 1) % 4],datum);
|
||||
+ cfi_send_gen_cmd(0xF0, 0, chip->start, map, cfi, cfi->device_type, NULL);
|
||||
+ DISABLE_VPP(map);
|
||||
+ ret = -EIO;
|
||||
+ }
|
||||
+ DISABLE_VPP(map);
|
||||
+ chip->state = FL_READY;
|
||||
+ wake_up(&chip->wq);
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static int cfi_sststd_write (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ int ret = 0;
|
||||
+ int chipnum;
|
||||
+ unsigned long ofs, chipstart;
|
||||
+
|
||||
+ *retlen = 0;
|
||||
+ if (!len)
|
||||
+ return 0;
|
||||
+
|
||||
+ chipnum = to >> cfi->chipshift;
|
||||
+ ofs = to - (chipnum << cfi->chipshift);
|
||||
+ chipstart = cfi->chips[chipnum].start;
|
||||
+
|
||||
+ /* If it's not bus-aligned, do the first byte write */
|
||||
+ if (ofs & (CFIDEV_BUSWIDTH-1)) {
|
||||
+ unsigned long bus_ofs = ofs & ~(CFIDEV_BUSWIDTH-1);
|
||||
+ int i = ofs - bus_ofs;
|
||||
+ int n = 0;
|
||||
+ u_char tmp_buf[4];
|
||||
+ __u32 datum;
|
||||
+
|
||||
+ map->copy_from(map, tmp_buf, bus_ofs + cfi->chips[chipnum].start, CFIDEV_BUSWIDTH);
|
||||
+ while (len && i < CFIDEV_BUSWIDTH)
|
||||
+ tmp_buf[i++] = buf[n++], len--;
|
||||
+
|
||||
+ if (cfi_buswidth_is_2()) {
|
||||
+ datum = *(__u16*)tmp_buf;
|
||||
+ } else if (cfi_buswidth_is_4()) {
|
||||
+ datum = *(__u32*)tmp_buf;
|
||||
+ } else {
|
||||
+ return -EINVAL; /* should never happen, but be safe */
|
||||
+ }
|
||||
+
|
||||
+ ret = do_write_oneword(map, &cfi->chips[chipnum],
|
||||
+ bus_ofs, datum, 0);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ ofs += n;
|
||||
+ buf += n;
|
||||
+ (*retlen) += n;
|
||||
+
|
||||
+ if (ofs >> cfi->chipshift) {
|
||||
+ chipnum ++;
|
||||
+ ofs = 0;
|
||||
+ if (chipnum == cfi->numchips)
|
||||
+ return 0;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ /* We are now aligned, write as much as possible */
|
||||
+ while(len >= CFIDEV_BUSWIDTH) {
|
||||
+ __u32 datum;
|
||||
+
|
||||
+ if (cfi_buswidth_is_1()) {
|
||||
+ datum = *(__u8*)buf;
|
||||
+ } else if (cfi_buswidth_is_2()) {
|
||||
+ datum = *(__u16*)buf;
|
||||
+ } else if (cfi_buswidth_is_4()) {
|
||||
+ datum = *(__u32*)buf;
|
||||
+ } else {
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+ ret = do_write_oneword(map, &cfi->chips[chipnum],
|
||||
+ ofs, datum, cfi->fast_prog);
|
||||
+ if (ret) {
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ ofs += CFIDEV_BUSWIDTH;
|
||||
+ buf += CFIDEV_BUSWIDTH;
|
||||
+ (*retlen) += CFIDEV_BUSWIDTH;
|
||||
+ len -= CFIDEV_BUSWIDTH;
|
||||
+
|
||||
+ if (ofs >> cfi->chipshift) {
|
||||
+ chipnum ++;
|
||||
+ ofs = 0;
|
||||
+ if (chipnum == cfi->numchips)
|
||||
+ return 0;
|
||||
+ chipstart = cfi->chips[chipnum].start;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ if (len & (CFIDEV_BUSWIDTH-1)) {
|
||||
+ int i = 0, n = 0;
|
||||
+ u_char tmp_buf[4];
|
||||
+ __u32 datum;
|
||||
+
|
||||
+ map->copy_from(map, tmp_buf, ofs + cfi->chips[chipnum].start, CFIDEV_BUSWIDTH);
|
||||
+ while (len--)
|
||||
+ tmp_buf[i++] = buf[n++];
|
||||
+
|
||||
+ if (cfi_buswidth_is_2()) {
|
||||
+ datum = *(__u16*)tmp_buf;
|
||||
+ } else if (cfi_buswidth_is_4()) {
|
||||
+ datum = *(__u32*)tmp_buf;
|
||||
+ } else {
|
||||
+ return -EINVAL; /* should never happen, but be safe */
|
||||
+ }
|
||||
+
|
||||
+ ret = do_write_oneword(map, &cfi->chips[chipnum],
|
||||
+ ofs, datum, 0);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ (*retlen) += n;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
|
||||
+{
|
||||
+ unsigned int status;
|
||||
+ unsigned long timeo = jiffies + HZ;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ unsigned int rdy_mask;
|
||||
+ DECLARE_WAITQUEUE(wait, current);
|
||||
+
|
||||
+ retry:
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ if (chip->state != FL_READY){
|
||||
+ set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
+ add_wait_queue(&chip->wq, &wait);
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+
|
||||
+ schedule();
|
||||
+ remove_wait_queue(&chip->wq, &wait);
|
||||
+ timeo = jiffies + HZ;
|
||||
+
|
||||
+ goto retry;
|
||||
+ }
|
||||
+
|
||||
+ chip->state = FL_ERASING;
|
||||
+
|
||||
+ adr += chip->start;
|
||||
+ ENABLE_VPP(map);
|
||||
+ cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+ cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+ cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+ cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+ cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X16, NULL);
|
||||
+ cfi_write(map, CMD(0x30), adr);
|
||||
+
|
||||
+ timeo = jiffies + (HZ*20);
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ schedule_timeout(HZ);
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ rdy_mask = CMD(0x80);
|
||||
+
|
||||
+ /* Once the state machine's known to be working I'll do that */
|
||||
+
|
||||
+ while ( ( (status = cfi_read(map,adr)) & rdy_mask ) != rdy_mask ) {
|
||||
+ static int z=0;
|
||||
+
|
||||
+ if (chip->state != FL_ERASING) {
|
||||
+ /* Someone's suspended the erase. Sleep */
|
||||
+ set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
+ add_wait_queue(&chip->wq, &wait);
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ printk("erase suspended. Sleeping\n");
|
||||
+
|
||||
+ schedule();
|
||||
+ remove_wait_queue(&chip->wq, &wait);
|
||||
+ timeo = jiffies + (HZ*2);
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+ continue;
|
||||
+ }
|
||||
+
|
||||
+ /* OK Still waiting */
|
||||
+ if (time_after(jiffies, timeo)) {
|
||||
+ chip->state = FL_READY;
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ printk("waiting for erase to complete timed out.");
|
||||
+ DISABLE_VPP(map);
|
||||
+ return -EIO;
|
||||
+ }
|
||||
+
|
||||
+ /* Latency issues. Drop the lock, wait a while and retry */
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+
|
||||
+ z++;
|
||||
+ if ( 0 && !(z % 100 ))
|
||||
+ printk("chip not ready yet after erase. looping\n");
|
||||
+
|
||||
+ cfi_udelay(1);
|
||||
+
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+ continue;
|
||||
+ }
|
||||
+
|
||||
+ /* Done and happy. */
|
||||
+ DISABLE_VPP(map);
|
||||
+ chip->state = FL_READY;
|
||||
+ wake_up(&chip->wq);
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int cfi_sststd_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ unsigned long adr, len;
|
||||
+ int chipnum, ret = 0;
|
||||
+ int i, first;
|
||||
+ struct mtd_erase_region_info *regions = mtd->eraseregions;
|
||||
+
|
||||
+ if (instr->addr > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if ((instr->len + instr->addr) > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ /* Check that both start and end of the requested erase are
|
||||
+ * aligned with the erasesize at the appropriate addresses.
|
||||
+ */
|
||||
+
|
||||
+ i = 0;
|
||||
+
|
||||
+ /* Skip all erase regions which are ended before the start of
|
||||
+ the requested erase. Actually, to save on the calculations,
|
||||
+ we skip to the first erase region which starts after the
|
||||
+ start of the requested erase, and then go back one.
|
||||
+ */
|
||||
+
|
||||
+ while (i < mtd->numeraseregions && instr->addr >= regions[i].offset)
|
||||
+ i++;
|
||||
+ i--;
|
||||
+
|
||||
+ /* OK, now i is pointing at the erase region in which this
|
||||
+ erase request starts. Check the start of the requested
|
||||
+ erase range is aligned with the erase size which is in
|
||||
+ effect here.
|
||||
+ */
|
||||
+
|
||||
+ if (instr->addr & (regions[i].erasesize-1))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ /* Remember the erase region we start on */
|
||||
+ first = i;
|
||||
+
|
||||
+ /* Next, check that the end of the requested erase is aligned
|
||||
+ * with the erase region at that address.
|
||||
+ */
|
||||
+
|
||||
+ while (i<mtd->numeraseregions && (instr->addr + instr->len) >= regions[i].offset)
|
||||
+ i++;
|
||||
+
|
||||
+ /* As before, drop back one to point at the region in which
|
||||
+ the address actually falls
|
||||
+ */
|
||||
+ i--;
|
||||
+
|
||||
+ if ((instr->addr + instr->len) & (regions[i].erasesize-1))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ chipnum = instr->addr >> cfi->chipshift;
|
||||
+ adr = instr->addr - (chipnum << cfi->chipshift);
|
||||
+ len = instr->len;
|
||||
+
|
||||
+ i=first;
|
||||
+
|
||||
+ while(len) {
|
||||
+ ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);
|
||||
+
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ adr += regions[i].erasesize;
|
||||
+ len -= regions[i].erasesize;
|
||||
+
|
||||
+ if (adr % (1<< cfi->chipshift) == ((regions[i].offset + (regions[i].erasesize * regions[i].numblocks)) %( 1<< cfi->chipshift)))
|
||||
+ i++;
|
||||
+
|
||||
+ if (adr >> cfi->chipshift) {
|
||||
+ adr = 0;
|
||||
+ chipnum++;
|
||||
+
|
||||
+ if (chipnum >= cfi->numchips)
|
||||
+ break;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ instr->state = MTD_ERASE_DONE;
|
||||
+ if (instr->callback)
|
||||
+ instr->callback(instr);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int cfi_sststd_erase_onesize(struct mtd_info *mtd, struct erase_info *instr)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ unsigned long adr, len;
|
||||
+ int chipnum, ret = 0;
|
||||
+
|
||||
+ if (instr->addr & (mtd->erasesize - 1))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if (instr->len & (mtd->erasesize -1))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ if ((instr->len + instr->addr) > mtd->size)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ chipnum = instr->addr >> cfi->chipshift;
|
||||
+ adr = instr->addr - (chipnum << cfi->chipshift);
|
||||
+ len = instr->len;
|
||||
+
|
||||
+ while(len) {
|
||||
+ ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);
|
||||
+
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ adr += mtd->erasesize;
|
||||
+ len -= mtd->erasesize;
|
||||
+
|
||||
+ if (adr >> cfi->chipshift) {
|
||||
+ adr = 0;
|
||||
+ chipnum++;
|
||||
+
|
||||
+ if (chipnum >= cfi->numchips)
|
||||
+ break;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ instr->state = MTD_ERASE_DONE;
|
||||
+ if (instr->callback)
|
||||
+ instr->callback(instr);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void cfi_sststd_sync (struct mtd_info *mtd)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ int i;
|
||||
+ struct flchip *chip;
|
||||
+ int ret = 0;
|
||||
+ DECLARE_WAITQUEUE(wait, current);
|
||||
+
|
||||
+ for (i=0; !ret && i<cfi->numchips; i++) {
|
||||
+ chip = &cfi->chips[i];
|
||||
+
|
||||
+ retry:
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ switch(chip->state) {
|
||||
+ case FL_READY:
|
||||
+ case FL_STATUS:
|
||||
+ case FL_CFI_QUERY:
|
||||
+ case FL_JEDEC_QUERY:
|
||||
+ chip->oldstate = chip->state;
|
||||
+ chip->state = FL_SYNCING;
|
||||
+ /* No need to wake_up() on this state change -
|
||||
+ * as the whole point is that nobody can do anything
|
||||
+ * with the chip now anyway.
|
||||
+ */
|
||||
+ case FL_SYNCING:
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ /* Not an idle state */
|
||||
+ add_wait_queue(&chip->wq, &wait);
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+
|
||||
+ schedule();
|
||||
+
|
||||
+ remove_wait_queue(&chip->wq, &wait);
|
||||
+
|
||||
+ goto retry;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ /* Unlock the chips again */
|
||||
+
|
||||
+ for (i--; i >=0; i--) {
|
||||
+ chip = &cfi->chips[i];
|
||||
+
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ if (chip->state == FL_SYNCING) {
|
||||
+ chip->state = chip->oldstate;
|
||||
+ wake_up(&chip->wq);
|
||||
+ }
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static int cfi_sststd_suspend(struct mtd_info *mtd)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ int i;
|
||||
+ struct flchip *chip;
|
||||
+ int ret = 0;
|
||||
+//printk("suspend\n");
|
||||
+
|
||||
+ for (i=0; !ret && i<cfi->numchips; i++) {
|
||||
+ chip = &cfi->chips[i];
|
||||
+
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ switch(chip->state) {
|
||||
+ case FL_READY:
|
||||
+ case FL_STATUS:
|
||||
+ case FL_CFI_QUERY:
|
||||
+ case FL_JEDEC_QUERY:
|
||||
+ chip->oldstate = chip->state;
|
||||
+ chip->state = FL_PM_SUSPENDED;
|
||||
+ /* No need to wake_up() on this state change -
|
||||
+ * as the whole point is that nobody can do anything
|
||||
+ * with the chip now anyway.
|
||||
+ */
|
||||
+ case FL_PM_SUSPENDED:
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ ret = -EAGAIN;
|
||||
+ break;
|
||||
+ }
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ }
|
||||
+
|
||||
+ /* Unlock the chips again */
|
||||
+
|
||||
+ if (ret) {
|
||||
+ for (i--; i >=0; i--) {
|
||||
+ chip = &cfi->chips[i];
|
||||
+
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ if (chip->state == FL_PM_SUSPENDED) {
|
||||
+ chip->state = chip->oldstate;
|
||||
+ wake_up(&chip->wq);
|
||||
+ }
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
+static void cfi_sststd_resume(struct mtd_info *mtd)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ int i;
|
||||
+ struct flchip *chip;
|
||||
+//printk("resume\n");
|
||||
+
|
||||
+ for (i=0; i<cfi->numchips; i++) {
|
||||
+
|
||||
+ chip = &cfi->chips[i];
|
||||
+
|
||||
+ cfi_spin_lock(chip->mutex);
|
||||
+
|
||||
+ if (chip->state == FL_PM_SUSPENDED) {
|
||||
+ chip->state = FL_READY;
|
||||
+ cfi_write(map, CMD(0xF0), chip->start);
|
||||
+ wake_up(&chip->wq);
|
||||
+ }
|
||||
+ else
|
||||
+ printk("Argh. Chip not in PM_SUSPENDED state upon resume()\n");
|
||||
+
|
||||
+ cfi_spin_unlock(chip->mutex);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void cfi_sststd_destroy(struct mtd_info *mtd)
|
||||
+{
|
||||
+ struct map_info *map = mtd->priv;
|
||||
+ struct cfi_private *cfi = map->fldrv_priv;
|
||||
+ kfree(cfi->cmdset_priv);
|
||||
+ kfree(cfi);
|
||||
+}
|
||||
+
|
||||
+#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
|
||||
+#define cfi_sststd_init init_module
|
||||
+#define cfi_sststd_exit cleanup_module
|
||||
+#endif
|
||||
+
|
||||
+static char im_name[]="cfi_cmdset_0701";
|
||||
+
|
||||
+mod_init_t cfi_sststd_init(void)
|
||||
+{
|
||||
+ inter_module_register(im_name, THIS_MODULE, &cfi_cmdset_0701);
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+mod_exit_t cfi_sststd_exit(void)
|
||||
+{
|
||||
+ inter_module_unregister(im_name);
|
||||
+}
|
||||
+
|
||||
+module_init(cfi_sststd_init);
|
||||
+module_exit(cfi_sststd_exit);
|
||||
+
|
||||
diff -Nur linux-2.4.30/drivers/mtd/chips/cfi_probe.c linux-2.4.30.openwrt/drivers/mtd/chips/cfi_probe.c
|
||||
--- linux-2.4.30/drivers/mtd/chips/cfi_probe.c 2003-06-13 16:51:34.000000000 +0200
|
||||
+++ linux-2.4.30.openwrt/drivers/mtd/chips/cfi_probe.c 2005-06-28 11:26:26.000000000 +0200
|
||||
@@ -67,8 +67,15 @@
|
||||
cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
|
||||
cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL);
|
||||
|
||||
- if (!qry_present(map,base,cfi))
|
||||
- return 0;
|
||||
+ if (!qry_present(map,base,cfi)) {
|
||||
+ /* rather broken SST cfi probe (requires SST unlock) */
|
||||
+ cfi_send_gen_cmd(0xF0, 0, base, map, cfi, cfi->device_type, NULL);
|
||||
+ cfi_send_gen_cmd(0xAA, 0x5555, base, map, cfi, cfi->device_type, NULL);
|
||||
+ cfi_send_gen_cmd(0x55, 0x2AAA, base, map, cfi, cfi->device_type, NULL);
|
||||
+ cfi_send_gen_cmd(0x98, 0x5555, base, map, cfi, cfi->device_type, NULL);
|
||||
+ if (!qry_present(map,base,cfi))
|
||||
+ return 0;
|
||||
+ }
|
||||
|
||||
if (!cfi->numchips) {
|
||||
/* This is the first time we're called. Set up the CFI
|
||||
diff -Nur linux-2.4.30/drivers/mtd/chips/gen_probe.c linux-2.4.30.openwrt/drivers/mtd/chips/gen_probe.c
|
||||
--- linux-2.4.30/drivers/mtd/chips/gen_probe.c 2003-08-25 13:44:42.000000000 +0200
|
||||
+++ linux-2.4.30.openwrt/drivers/mtd/chips/gen_probe.c 2005-06-28 11:29:23.000000000 +0200
|
||||
@@ -328,13 +328,18 @@
|
||||
return cfi_cmdset_0001(map, primary);
|
||||
#endif
|
||||
#ifdef CONFIG_MTD_CFI_AMDSTD
|
||||
+ case 0x0006:
|
||||
case 0x0002:
|
||||
return cfi_cmdset_0002(map, primary);
|
||||
#endif
|
||||
#ifdef CONFIG_MTD_CFI_STAA
|
||||
- case 0x0020:
|
||||
+ case 0x0020:
|
||||
return cfi_cmdset_0020(map, primary);
|
||||
#endif
|
||||
+#ifdef CONFIG_MTD_CFI_SSTSTD
|
||||
+ case 0x0701:
|
||||
+ return cfi_cmdset_0701(map, primary);
|
||||
+#endif
|
||||
}
|
||||
|
||||
return cfi_cmdset_unknown(map, primary);
|
||||
@ -1,10 +0,0 @@ |
||||
--- linux-2.4.30.old/arch/mips/ld.script.in 2005-04-28 23:22:23.513764016 +0400
|
||||
+++ linux-2.4.30/arch/mips/ld.script.in 2005-04-28 23:22:36.329673152 +0400
|
||||
@@ -9,6 +9,7 @@
|
||||
{
|
||||
_ftext = . ;
|
||||
*(.text)
|
||||
+ *(.fixup)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.rodata1)
|
||||
Loading…
Reference in new issue