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rtc-rv5c386a: add support for kernel 3.0

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remove BKL and adds support for changes in bcm47xx code

SVN-Revision: 27903
master
Hauke Mehrtens 14 years ago
parent 8428ebd8e8
commit 695cef4f45
2 changed files with 30 additions and 178 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
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  1. 157
      package/rtc-rv5c386a/src/gpio.h
  2. 51
      package/rtc-rv5c386a/src/rtc.c

157
package/rtc-rv5c386a/src/gpio.h
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@ -1,157 +0,0 @@
#ifndef __DIAG_GPIO_H
#define __DIAG_GPIO_H
#include <linux/interrupt.h>
#ifndef BCMDRIVER
#include <linux/ssb/ssb_embedded.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
#include <linux/gpio.h>
#define ssb ssb_bcm47xx
#endif
extern struct ssb_bus ssb;
static inline u32 gpio_in(void)
{
return ssb_gpio_in(&ssb, ~0);
}
static inline u32 gpio_out(u32 mask, u32 value)
{
return ssb_gpio_out(&ssb, mask, value);
}
static inline u32 gpio_outen(u32 mask, u32 value)
{
return ssb_gpio_outen(&ssb, mask, value);
}
static inline u32 gpio_control(u32 mask, u32 value)
{
return ssb_gpio_control(&ssb, mask, value);
}
static inline u32 gpio_setintmask(u32 mask, u32 value)
{
return ssb_gpio_intmask(&ssb, mask, value);
}
static inline u32 gpio_intpolarity(u32 mask, u32 value)
{
return ssb_gpio_polarity(&ssb, mask, value);
}
static inline u32 __ssb_write32_masked(struct ssb_device *dev, u16 offset,
u32 mask, u32 value)
{
value &= mask;
value |= ssb_read32(dev, offset) & ~mask;
ssb_write32(dev, offset, value);
return value;
}
static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *))
{
int irq;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
irq = gpio_to_irq(0);
if (irq == -EINVAL) return;
#else
if (ssb.chipco.dev)
irq = ssb_mips_irq(ssb.chipco.dev) + 2;
else if (ssb.extif.dev)
irq = ssb_mips_irq(ssb.extif.dev) + 2;
else return;
#endif
if (enabled) {
if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler))
return;
} else {
free_irq(irq, handler);
}
if (ssb.chipco.dev)
__ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
}
#else
#include <typedefs.h>
#include <osl.h>
#include <bcmdevs.h>
#include <sbutils.h>
#include <sbconfig.h>
#include <sbchipc.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
#include <sbmips.h>
#else
#include <hndcpu.h>
#endif
#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
#define sbh bcm947xx_sbh
#define sbh_lock bcm947xx_sbh_lock
#endif
extern void *sbh;
extern spinlock_t sbh_lock;
#define gpio_in() sb_gpioin(sbh)
#define gpio_out(mask, value) sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY)
#define gpio_outen(mask, value) sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY)
#define gpio_control(mask, value) sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY)
#define gpio_setintmask(mask, value) sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY)
#define gpio_intpolarity(mask, value) sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY)
static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
{
unsigned int coreidx;
unsigned long flags;
chipcregs_t *cc;
int irq;
spin_lock_irqsave(sbh_lock, flags);
coreidx = sb_coreidx(sbh);
irq = sb_irq(sbh) + 2;
if (enabled)
request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
else
free_irq(irq, handler);
if ((cc = sb_setcore(sbh, SB_CC, 0))) {
int intmask;
intmask = readl(&cc->intmask);
if (enabled)
intmask |= CI_GPIO;
else
intmask &= ~CI_GPIO;
writel(intmask, &cc->intmask);
}
sb_setcoreidx(sbh, coreidx);
spin_unlock_irqrestore(sbh_lock, flags);
}
#endif /* BCMDRIVER */
#define EXTIF_ADDR 0x1f000000
#define EXTIF_UART (EXTIF_ADDR + 0x00800000)
#define GPIO_TYPE_NORMAL (0x0 << 24)
#define GPIO_TYPE_EXTIF (0x1 << 24)
#define GPIO_TYPE_MASK (0xf << 24)
static inline void gpio_set_extif(int gpio, int value)
{
volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
if (value)
*addr = 0xFF;
else
*addr;
}
#endif /* __DIAG_GPIO_H */

51
package/rtc-rv5c386a/src/rtc.c
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@ -47,17 +47,20 @@
#include <linux/miscdevice.h>
#include <linux/ioport.h>
#include <linux/fcntl.h>
#include <linux/mc146818rtc.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/rtc.h>
#include <linux/delay.h>
#include <linux/version.h>
#include <linux/smp_lock.h>
#include <linux/gpio.h>
#include <linux/uaccess.h>
#include <asm/uaccess.h>
#include <asm/current.h>
#include <asm/system.h>
#include "gpio.h"
#include <bcm47xx.h>
#include <nvram.h>
#define RTC_IS_OPEN 0x01 /* Means /dev/rtc is in use. */
@ -66,8 +69,6 @@ static int rtc_debug = 0;
static unsigned long rtc_status = 0; /* Bitmapped status byte. */
static spinlock_t rtc_lock = SPIN_LOCK_UNLOCKED;
/* These settings are platform dependents. */
unsigned int sda_index = 0;
unsigned int scl_index = 0;
@ -98,11 +99,7 @@ MODULE_AUTHOR("Andreas Engel");
MODULE_LICENSE("GPL");
/* Test stolen from switch-adm.c. */
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,52)
module_param(rtc_debug, int, 0);
#else
MODULE_PARM(rtc_debug, "i");
#endif
static inline void sdalo(void)
{
@ -237,7 +234,7 @@ static int i2c_inb(int ack)
static void i2c_init(void)
{
/* no gpio_control for EXTIF */
// gpio_control(sda_mask | scl_mask, 0);
// ssb_gpio_control(&ssb, sda_mask | scl_mask, 0);
gpio_set_value(sda_index, 0);
gpio_set_value(scl_index, 0);
@ -308,6 +305,7 @@ static void get_rtc_time(struct rtc_time *rtc_tm)
* Read date and time from the RTC. We use read method (3).
*/
spin_lock_irq(&rtc_lock);
i2c_start();
i2c_outb(RTC_I2C_ADDRESS | I2C_READ_MASK);
cr2 = i2c_inb(I2C_ACK);
@ -319,6 +317,7 @@ static void get_rtc_time(struct rtc_time *rtc_tm)
rtc_tm->tm_mon = i2c_inb(I2C_ACK);
rtc_tm->tm_year = i2c_inb(I2C_NAK);
i2c_stop();
spin_unlock_irq(&rtc_lock);
if (cr2 & RTC_VDET_MASK) {
printk(KERN_WARNING "***RTC BATTERY FAILURE***\n");
@ -354,6 +353,7 @@ static void set_rtc_time(struct rtc_time *rtc_tm)
rtc_tm->tm_mon |= RTC_Y2K_MASK;
}
spin_lock_irq(&rtc_lock);
i2c_start();
i2c_outb(RTC_I2C_ADDRESS | I2C_WRITE_MASK);
i2c_outb(0x00); /* set starting register to 0 (=seconds) */
@ -365,6 +365,7 @@ static void set_rtc_time(struct rtc_time *rtc_tm)
i2c_outb(rtc_tm->tm_mon);
i2c_outb(rtc_tm->tm_year);
i2c_stop();
spin_unlock_irq(&rtc_lock);
}
static ssize_t rtc_write(UNUSED struct file *filp, const char *buf,
@ -495,9 +496,7 @@ static int rtc_do_ioctl(unsigned int cmd, unsigned long arg)
static long rtc_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
{
long ret;
lock_kernel();
ret = rtc_do_ioctl(cmd, arg);
unlock_kernel();
return ret;
}
@ -518,27 +517,33 @@ static struct miscdevice rtc_dev = {
};
/* Savagely ripped from diag.c. */
extern char *nvram_get(char *str);
#define getvar(str) (nvram_get(str)?:"")
static inline int startswith (char *source, char *cmp)
{ return !strncmp(source,cmp,strlen(cmp)); }
{
return !strncmp(source, cmp, strlen(cmp));
}
static void platform_detect(void)
{
char *buf;
char buf[20];
int et0phyaddr, et1phyaddr;
/* Based on "model_no". */
if ((buf = nvram_get("model_no"))) {
if (startswith(buf,"WL700")) { /* WL700* */
if (nvram_getenv("model_no", buf, sizeof(buf)) >= 0) {
if (startswith(buf, "WL700")) { /* WL700* */
sda_index = 2;
scl_index = 5;
return;
}
}
if (startswith(getvar("hardware_version"), "WL300-")) {
if (nvram_getenv("et0phyaddr", buf, sizeof(buf)) >= 0 )
et0phyaddr = simple_strtoul(buf, NULL, 0);
if (nvram_getenv("et1phyaddr", buf, sizeof(buf)) >= 0 )
et1phyaddr = simple_strtoul(buf, NULL, 0);
if (nvram_getenv("hardware_version", buf, sizeof(buf)) >= 0) {
/* Either WL-300g or WL-HDD, do more extensive checks */
if ((simple_strtoul(getvar("et0phyaddr"), NULL, 0) == 0) &&
(simple_strtoul(getvar("et1phyaddr"), NULL, 0) == 1)) {
if (startswith(buf, "WL300-") && et0phyaddr == 0 && et1phyaddr == 1) {
sda_index = 4;
scl_index = 5;
return;
@ -563,19 +568,23 @@ static int __init rtc_init(void)
/*
* Switch RTC to 24h mode
*/
spin_lock_irq(&rtc_lock);
i2c_start();
i2c_outb(RTC_I2C_ADDRESS | I2C_WRITE_MASK);
i2c_outb(0xE4); /* start at address 0xE, transmission mode 4 */
cr1 = i2c_inb(I2C_NAK);
i2c_stop();
spin_unlock_irq(&rtc_lock);
if ((cr1 & RTC_24HOUR_MODE_MASK) == 0) {
/* RTC is running in 12h mode */
printk(KERN_INFO "rtc.o: switching to 24h mode\n");
spin_lock_irq(&rtc_lock);
i2c_start();
i2c_outb(RTC_I2C_ADDRESS | I2C_WRITE_MASK);
i2c_outb(0xE0);
i2c_outb(cr1 | RTC_24HOUR_MODE_MASK);
i2c_stop();
spin_unlock_irq(&rtc_lock);
}
misc_register(&rtc_dev);

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