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@ -184,12 +184,10 @@ |
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#define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
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#define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
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#define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
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@@ -502,6 +553,46 @@
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#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
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#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
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@@ -464,6 +515,46 @@
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+/* Values for boardflags_lo read from SPROM */
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+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
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/* Values for boardflags_lo read from SPROM */
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#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
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+#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
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+#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
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+#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
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@ -228,6 +226,8 @@ |
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+#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
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+#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
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+
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/* Values for SSB_SPROM1_BINF_CCODE */
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enum {
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SSB_SPROM1CCODE_WORLD = 0,
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+/* Values for boardflags_lo read from SPROM */
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+#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
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#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
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#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
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#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
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