parent
3365e2caf0
commit
6716ba9aad
@ -1,19 +0,0 @@ |
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--- a/include/linux/compat-3.5.h
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+++ b/include/linux/compat-3.5.h
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@@ -8,6 +8,8 @@
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#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0))
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+#ifndef TCA_CODEL_MAX
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+
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/*
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* This backports:
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*
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@@ -135,6 +137,7 @@ static inline int compat_vga_switcheroo_
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#define SIZE_MAX (~(size_t)0)
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+#endif /* TCA_CODEL_MAX */
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#include <linux/pkt_sched.h>
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File diff suppressed because it is too large
Load Diff
@ -1,11 +1,11 @@ |
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--- a/net/mac80211/cfg.c
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+++ b/net/mac80211/cfg.c
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@@ -1796,8 +1796,6 @@ static int ieee80211_scan(struct wiphy *
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* beaconing hasn't been configured yet
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@@ -1916,7 +1916,7 @@ static int ieee80211_scan(struct wiphy *
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* the frames sent while scanning on other channel will be
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* lost)
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*/
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case NL80211_IFTYPE_AP:
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- if (sdata->u.ap.beacon)
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- return -EOPNOTSUPP;
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break;
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default:
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return -EOPNOTSUPP;
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- if (sdata->u.ap.beacon &&
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+ if (0 && sdata->u.ap.beacon &&
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(!(wiphy->features & NL80211_FEATURE_AP_SCAN) ||
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!(req->flags & NL80211_SCAN_FLAG_AP)))
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return -EOPNOTSUPP;
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@ -1,10 +1,10 @@ |
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--- a/drivers/net/wireless/ath/ath9k/init.c
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+++ b/drivers/net/wireless/ath/ath9k/init.c
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@@ -667,6 +667,7 @@ static const struct ieee80211_iface_limi
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#ifdef CONFIG_MAC80211_MESH
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BIT(NL80211_IFTYPE_MESH_POINT) |
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@@ -678,6 +678,7 @@ static const struct ieee80211_iface_limi
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#endif
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+ BIT(NL80211_IFTYPE_ADHOC) |
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BIT(NL80211_IFTYPE_AP) |
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BIT(NL80211_IFTYPE_P2P_GO) },
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+ { .max = 1, .types = BIT(NL80211_IFTYPE_ADHOC) },
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};
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static const struct ieee80211_iface_combination if_comb = {
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@ -1,20 +0,0 @@ |
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--- a/net/mac80211/main.c
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+++ b/net/mac80211/main.c
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@@ -792,17 +792,11 @@ int ieee80211_register_hw(struct ieee802
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*/
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for (i = 0; i < hw->wiphy->n_iface_combinations; i++) {
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const struct ieee80211_iface_combination *c;
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- int j;
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c = &hw->wiphy->iface_combinations[i];
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if (c->num_different_channels > 1)
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return -EINVAL;
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-
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- for (j = 0; j < c->n_limits; j++)
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- if ((c->limits[j].types & BIT(NL80211_IFTYPE_ADHOC)) &&
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- c->limits[j].max > 1)
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- return -EINVAL;
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}
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#ifndef CONFIG_MAC80211_MESH
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@ -1,12 +0,0 @@ |
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--- a/net/wireless/reg.c
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+++ b/net/wireless/reg.c
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@@ -908,8 +908,7 @@ static void handle_channel(struct wiphy
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chan->beacon_found = false;
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chan->flags = flags | bw_flags | map_regdom_flags(reg_rule->flags);
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- chan->max_antenna_gain = min(chan->orig_mag,
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- (int) MBI_TO_DBI(power_rule->max_antenna_gain));
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+ chan->max_antenna_gain = (int) MBI_TO_DBI(power_rule->max_antenna_gain);
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chan->max_reg_power = (int) MBM_TO_DBM(power_rule->max_eirp);
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if (chan->orig_mpwr) {
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/*
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@ -1,21 +0,0 @@ |
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--- a/net/wireless/reg.c
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+++ b/net/wireless/reg.c
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@@ -901,7 +901,7 @@ static void handle_channel(struct wiphy
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map_regdom_flags(reg_rule->flags) | bw_flags;
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chan->max_antenna_gain = chan->orig_mag =
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(int) MBI_TO_DBI(power_rule->max_antenna_gain);
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- chan->max_power = chan->orig_mpwr =
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+ chan->max_reg_power = chan->max_power = chan->orig_mpwr =
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(int) MBM_TO_DBM(power_rule->max_eirp);
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return;
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}
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@@ -1323,7 +1323,8 @@ static void handle_channel_custom(struct
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chan->flags |= map_regdom_flags(reg_rule->flags) | bw_flags;
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chan->max_antenna_gain = (int) MBI_TO_DBI(power_rule->max_antenna_gain);
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- chan->max_power = (int) MBM_TO_DBM(power_rule->max_eirp);
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+ chan->max_reg_power = chan->max_power =
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+ (int) MBM_TO_DBM(power_rule->max_eirp);
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}
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static void handle_band_custom(struct wiphy *wiphy, enum ieee80211_band band,
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@ -1,208 +0,0 @@ |
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--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
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@@ -534,108 +534,108 @@ static const u32 ar9300_2p2_baseband_cor
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static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
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/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
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- {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
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- {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
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- {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
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+ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
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+ {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
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+ {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
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{0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
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- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
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- {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
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- {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
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- {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
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- {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
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- {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
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- {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
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- {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
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- {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
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- {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
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- {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
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- {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
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- {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
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- {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
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- {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
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- {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
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- {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
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- {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
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- {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
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- {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
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- {0x0000a54c, 0x5a08442e, 0x5a08442e, 0x47001a83, 0x47001a83},
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- {0x0000a550, 0x5e0a4431, 0x5e0a4431, 0x4a001c84, 0x4a001c84},
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- {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
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- {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
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- {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
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- {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
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- {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
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- {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
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- {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
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- {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
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- {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
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- {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
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- {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
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- {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
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- {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
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- {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
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- {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
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- {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
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- {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
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- {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
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- {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
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- {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
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- {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
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- {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
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- {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
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- {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
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- {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
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- {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
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- {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
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- {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
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- {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
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- {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
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- {0x0000a5cc, 0x5a88442e, 0x5a88442e, 0x47801a83, 0x47801a83},
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- {0x0000a5d0, 0x5e8a4431, 0x5e8a4431, 0x4a801c84, 0x4a801c84},
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- {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
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- {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
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- {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
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- {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
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- {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
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- {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
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- {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
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- {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
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- {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
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- {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
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- {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
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+ {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
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+ {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
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+ {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
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+ {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
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+ {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
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+ {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
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+ {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
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+ {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
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+ {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
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+ {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
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+ {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
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+ {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04},
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+ {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20},
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+ {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20},
|
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+ {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22},
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+ {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24},
|
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+ {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640},
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||||
+ {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660},
|
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+ {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861},
|
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+ {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81},
|
||||
+ {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
|
||||
+ {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84},
|
||||
+ {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3},
|
||||
+ {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5},
|
||||
+ {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9},
|
||||
+ {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb},
|
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+ {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
|
||||
+ {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
|
||||
+ {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
|
||||
+ {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
|
||||
+ {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
|
||||
+ {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
|
||||
+ {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
|
||||
+ {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000},
|
||||
+ {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002},
|
||||
+ {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004},
|
||||
+ {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200},
|
||||
+ {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202},
|
||||
+ {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400},
|
||||
+ {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402},
|
||||
+ {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404},
|
||||
+ {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603},
|
||||
+ {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02},
|
||||
+ {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04},
|
||||
+ {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20},
|
||||
+ {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20},
|
||||
+ {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22},
|
||||
+ {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24},
|
||||
+ {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640},
|
||||
+ {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660},
|
||||
+ {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861},
|
||||
+ {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81},
|
||||
+ {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83},
|
||||
+ {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84},
|
||||
+ {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3},
|
||||
+ {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5},
|
||||
+ {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9},
|
||||
+ {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb},
|
||||
+ {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
|
||||
+ {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
|
||||
+ {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
|
||||
+ {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
|
||||
+ {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
|
||||
+ {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
|
||||
+ {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
|
||||
{0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
|
||||
{0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
|
||||
- {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
|
||||
- {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
|
||||
- {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
|
||||
- {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
|
||||
- {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
|
||||
- {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
|
||||
- {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
|
||||
- {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
|
||||
- {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
|
||||
- {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
|
||||
- {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
|
||||
- {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
|
||||
- {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
|
||||
- {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
|
||||
- {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
|
||||
- {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
|
||||
- {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
|
||||
+ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
|
||||
+ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
|
||||
+ {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
|
||||
+ {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
|
||||
+ {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
|
||||
+ {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
|
||||
+ {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
|
||||
+ {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
|
||||
+ {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
|
||||
+ {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
|
||||
+ {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
|
||||
+ {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
|
||||
+ {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
|
||||
+ {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
|
||||
+ {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
|
||||
+ {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
|
||||
+ {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
|
||||
{0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
|
||||
- {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
|
||||
- {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
|
||||
- {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
|
||||
+ {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
|
||||
+ {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
|
||||
+ {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
|
||||
{0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
|
||||
- {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
- {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
|
||||
- {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
- {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
- {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
|
||||
- {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
- {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
|
||||
- {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
|
||||
- {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
|
||||
+ {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
|
||||
+ {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
|
||||
+ {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
|
||||
+ {0x00016444, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
|
||||
+ {0x00016448, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
|
||||
+ {0x00016468, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
|
||||
+ {0x00016844, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6},
|
||||
+ {0x00016848, 0xae480001, 0xae480001, 0xae480001, 0xae480001},
|
||||
+ {0x00016868, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c},
|
||||
};
|
||||
|
||||
static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = {
|
@ -1,6 +1,6 @@ |
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
|
||||
@@ -240,21 +240,19 @@ static bool ar9003_hw_get_isr(struct ath
|
||||
@@ -241,21 +241,19 @@ static bool ar9003_hw_get_isr(struct ath
|
||||
|
||||
*masked = isr & ATH9K_INT_COMMON;
|
||||
|
@ -1,6 +1,6 @@ |
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
@@ -1035,6 +1035,10 @@ static bool ar9003_hw_ani_control(struct
|
||||
@@ -1085,6 +1085,10 @@ static bool ar9003_hw_ani_control(struct
|
||||
* is_on == 0 means MRC CCK is OFF (more noise imm)
|
||||
*/
|
||||
bool is_on = param ? 1 : 0;
|
@ -1,20 +0,0 @@ |
||||
--- a/drivers/net/wireless/ath/ath9k/main.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/main.c
|
||||
@@ -1087,6 +1087,7 @@ static void ath9k_remove_interface(struc
|
||||
ath9k_calculate_summary_state(hw, NULL);
|
||||
|
||||
mutex_unlock(&sc->mutex);
|
||||
+ ath9k_config(hw, IEEE80211_CONF_CHANGE_IDLE);
|
||||
ath9k_ps_restore(sc);
|
||||
}
|
||||
|
||||
@@ -1139,7 +1140,8 @@ int ath9k_config(struct ieee80211_hw *hw
|
||||
mutex_lock(&sc->mutex);
|
||||
|
||||
if (changed & IEEE80211_CONF_CHANGE_IDLE) {
|
||||
- sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
|
||||
+ sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE) &&
|
||||
+ !sc->nvifs;
|
||||
if (sc->ps_idle) {
|
||||
ath_cancel_work(sc);
|
||||
ath9k_stop_btcoex(sc);
|
@ -1,72 +0,0 @@ |
||||
--- a/drivers/net/wireless/ath/ath9k/debug.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/debug.c
|
||||
@@ -1767,6 +1767,8 @@ int ath9k_init_debug(struct ath_hw *ah)
|
||||
sc->debug.debugfs_phy, sc, &fops_tx_chainmask);
|
||||
debugfs_create_file("disable_ani", S_IRUSR | S_IWUSR,
|
||||
sc->debug.debugfs_phy, sc, &fops_disable_ani);
|
||||
+ debugfs_create_bool("paprd", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
|
||||
+ &sc->sc_ah->config.enable_paprd);
|
||||
debugfs_create_file("regidx", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
|
||||
sc, &fops_regidx);
|
||||
debugfs_create_file("regval", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy,
|
||||
--- a/drivers/net/wireless/ath/ath9k/hw.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/hw.c
|
||||
@@ -2521,10 +2521,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw
|
||||
pCap->rx_status_len = sizeof(struct ar9003_rxs);
|
||||
pCap->tx_desc_len = sizeof(struct ar9003_txc);
|
||||
pCap->txs_len = sizeof(struct ar9003_txs);
|
||||
- if (!ah->config.paprd_disable &&
|
||||
- ah->eep_ops->get_eeprom(ah, EEP_PAPRD) &&
|
||||
- !AR_SREV_9462(ah))
|
||||
- pCap->hw_caps |= ATH9K_HW_CAP_PAPRD;
|
||||
} else {
|
||||
pCap->tx_desc_len = sizeof(struct ath_desc);
|
||||
if (AR_SREV_9280_20(ah))
|
||||
--- a/drivers/net/wireless/ath/ath9k/hw.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/hw.h
|
||||
@@ -236,7 +236,6 @@ enum ath9k_hw_caps {
|
||||
ATH9K_HW_CAP_LDPC = BIT(6),
|
||||
ATH9K_HW_CAP_FASTCLOCK = BIT(7),
|
||||
ATH9K_HW_CAP_SGI_20 = BIT(8),
|
||||
- ATH9K_HW_CAP_PAPRD = BIT(9),
|
||||
ATH9K_HW_CAP_ANT_DIV_COMB = BIT(10),
|
||||
ATH9K_HW_CAP_2GHZ = BIT(11),
|
||||
ATH9K_HW_CAP_5GHZ = BIT(12),
|
||||
@@ -287,12 +286,12 @@ struct ath9k_ops_config {
|
||||
u8 pcie_clock_req;
|
||||
u32 pcie_waen;
|
||||
u8 analog_shiftreg;
|
||||
- u8 paprd_disable;
|
||||
u32 ofdm_trig_low;
|
||||
u32 ofdm_trig_high;
|
||||
u32 cck_trig_high;
|
||||
u32 cck_trig_low;
|
||||
u32 enable_ani;
|
||||
+ u32 enable_paprd;
|
||||
int serialize_regmode;
|
||||
bool rx_intr_mitigation;
|
||||
bool tx_intr_mitigation;
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -2982,6 +2982,10 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
|
||||
case EEP_RX_MASK:
|
||||
return pBase->txrxMask & 0xf;
|
||||
case EEP_PAPRD:
|
||||
+ if (AR_SREV_9462(ah))
|
||||
+ return false;
|
||||
+ if (!ah->config.enable_paprd);
|
||||
+ return false;
|
||||
return !!(pBase->featureEnable & BIT(5));
|
||||
case EEP_CHAIN_MASK_REDUCE:
|
||||
return (pBase->miscConfiguration >> 0x3) & 0x1;
|
||||
--- a/drivers/net/wireless/ath/ath9k/link.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/link.c
|
||||
@@ -423,7 +423,7 @@ set_timer:
|
||||
cal_interval = min(cal_interval, (u32)short_cal_interval);
|
||||
|
||||
mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
|
||||
- if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
|
||||
+ if (ah->eep_ops->get_eeprom(ah, EEP_PAPRD) && ah->caldata) {
|
||||
if (!ah->caldata->paprd_done)
|
||||
ieee80211_queue_work(sc->hw, &sc->paprd_work);
|
||||
else if (!ah->paprd_table_write_done)
|
@ -1,149 +0,0 @@ |
||||
--- a/drivers/net/wireless/ath/ath9k/xmit.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
|
||||
@@ -66,8 +66,7 @@ static void ath_tx_update_baw(struct ath
|
||||
static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
|
||||
struct ath_txq *txq,
|
||||
struct ath_atx_tid *tid,
|
||||
- struct sk_buff *skb,
|
||||
- bool dequeue);
|
||||
+ struct sk_buff *skb);
|
||||
|
||||
enum {
|
||||
MCS_HT20,
|
||||
@@ -176,7 +175,15 @@ static void ath_tx_flush_tid(struct ath_
|
||||
fi = get_frame_info(skb);
|
||||
bf = fi->bf;
|
||||
|
||||
- if (bf && fi->retries) {
|
||||
+ if (!bf) {
|
||||
+ bf = ath_tx_setup_buffer(sc, txq, tid, skb);
|
||||
+ if (!bf) {
|
||||
+ ieee80211_free_txskb(sc->hw, skb);
|
||||
+ continue;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ if (fi->retries) {
|
||||
list_add_tail(&bf->list, &bf_head);
|
||||
ath_tx_update_baw(sc, tid, bf->bf_state.seqno);
|
||||
ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
|
||||
@@ -789,10 +796,13 @@ static enum ATH_AGGR_STATUS ath_tx_form_
|
||||
fi = get_frame_info(skb);
|
||||
bf = fi->bf;
|
||||
if (!fi->bf)
|
||||
- bf = ath_tx_setup_buffer(sc, txq, tid, skb, true);
|
||||
+ bf = ath_tx_setup_buffer(sc, txq, tid, skb);
|
||||
|
||||
- if (!bf)
|
||||
+ if (!bf) {
|
||||
+ __skb_unlink(skb, &tid->buf_q);
|
||||
+ ieee80211_free_txskb(sc->hw, skb);
|
||||
continue;
|
||||
+ }
|
||||
|
||||
bf->bf_state.bf_type = BUF_AMPDU | BUF_AGGR;
|
||||
seqno = bf->bf_state.seqno;
|
||||
@@ -1735,9 +1745,11 @@ static void ath_tx_send_ampdu(struct ath
|
||||
return;
|
||||
}
|
||||
|
||||
- bf = ath_tx_setup_buffer(sc, txctl->txq, tid, skb, false);
|
||||
- if (!bf)
|
||||
+ bf = ath_tx_setup_buffer(sc, txctl->txq, tid, skb);
|
||||
+ if (!bf) {
|
||||
+ ieee80211_free_txskb(sc->hw, skb);
|
||||
return;
|
||||
+ }
|
||||
|
||||
bf->bf_state.bf_type = BUF_AMPDU;
|
||||
INIT_LIST_HEAD(&bf_head);
|
||||
@@ -1761,11 +1773,6 @@ static void ath_tx_send_normal(struct at
|
||||
struct ath_buf *bf;
|
||||
|
||||
bf = fi->bf;
|
||||
- if (!bf)
|
||||
- bf = ath_tx_setup_buffer(sc, txq, tid, skb, false);
|
||||
-
|
||||
- if (!bf)
|
||||
- return;
|
||||
|
||||
INIT_LIST_HEAD(&bf_head);
|
||||
list_add_tail(&bf->list, &bf_head);
|
||||
@@ -1839,8 +1846,7 @@ u8 ath_txchainmask_reduction(struct ath_
|
||||
static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
|
||||
struct ath_txq *txq,
|
||||
struct ath_atx_tid *tid,
|
||||
- struct sk_buff *skb,
|
||||
- bool dequeue)
|
||||
+ struct sk_buff *skb)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||
struct ath_frame_info *fi = get_frame_info(skb);
|
||||
@@ -1852,7 +1858,7 @@ static struct ath_buf *ath_tx_setup_buff
|
||||
bf = ath_tx_get_buffer(sc);
|
||||
if (!bf) {
|
||||
ath_dbg(common, XMIT, "TX buffers are full\n");
|
||||
- goto error;
|
||||
+ return NULL;
|
||||
}
|
||||
|
||||
ATH_TXBUF_RESET(bf);
|
||||
@@ -1881,18 +1887,12 @@ static struct ath_buf *ath_tx_setup_buff
|
||||
ath_err(ath9k_hw_common(sc->sc_ah),
|
||||
"dma_mapping_error() on TX\n");
|
||||
ath_tx_return_buffer(sc, bf);
|
||||
- goto error;
|
||||
+ return NULL;
|
||||
}
|
||||
|
||||
fi->bf = bf;
|
||||
|
||||
return bf;
|
||||
-
|
||||
-error:
|
||||
- if (dequeue)
|
||||
- __skb_unlink(skb, &tid->buf_q);
|
||||
- dev_kfree_skb_any(skb);
|
||||
- return NULL;
|
||||
}
|
||||
|
||||
/* FIXME: tx power */
|
||||
@@ -1921,9 +1921,14 @@ static void ath_tx_start_dma(struct ath_
|
||||
*/
|
||||
ath_tx_send_ampdu(sc, tid, skb, txctl);
|
||||
} else {
|
||||
- bf = ath_tx_setup_buffer(sc, txctl->txq, tid, skb, false);
|
||||
- if (!bf)
|
||||
+ bf = ath_tx_setup_buffer(sc, txctl->txq, tid, skb);
|
||||
+ if (!bf) {
|
||||
+ if (txctl->paprd)
|
||||
+ dev_kfree_skb_any(skb);
|
||||
+ else
|
||||
+ ieee80211_free_txskb(sc->hw, skb);
|
||||
return;
|
||||
+ }
|
||||
|
||||
bf->bf_state.bfs_paprd = txctl->paprd;
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/main.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/main.c
|
||||
@@ -775,7 +775,7 @@ static void ath9k_tx(struct ieee80211_hw
|
||||
|
||||
return;
|
||||
exit:
|
||||
- dev_kfree_skb_any(skb);
|
||||
+ ieee80211_free_txskb(hw, skb);
|
||||
}
|
||||
|
||||
static void ath9k_stop(struct ieee80211_hw *hw)
|
||||
--- a/drivers/net/wireless/ath/ath9k/beacon.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
|
||||
@@ -120,7 +120,7 @@ static void ath9k_tx_cabq(struct ieee802
|
||||
|
||||
if (ath_tx_start(hw, skb, &txctl) != 0) {
|
||||
ath_dbg(common, XMIT, "CABQ TX failed\n");
|
||||
- dev_kfree_skb_any(skb);
|
||||
+ ieee80211_free_txskb(hw, skb);
|
||||
}
|
||||
}
|
||||
|
@ -1,18 +0,0 @@ |
||||
--- a/drivers/net/wireless/ath/ath9k/xmit.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
|
||||
@@ -312,6 +312,7 @@ static struct ath_buf *ath_tx_get_buffer
|
||||
}
|
||||
|
||||
bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list);
|
||||
+ bf->bf_next = NULL;
|
||||
list_del(&bf->list);
|
||||
|
||||
spin_unlock_bh(&sc->tx.txbuflock);
|
||||
@@ -1778,6 +1779,7 @@ static void ath_tx_send_normal(struct at
|
||||
list_add_tail(&bf->list, &bf_head);
|
||||
bf->bf_state.bf_type = 0;
|
||||
|
||||
+ bf->bf_next = NULL;
|
||||
bf->bf_lastbf = bf;
|
||||
ath_tx_fill_desc(sc, bf, txq, fi->framelen);
|
||||
ath_tx_txqaddbuf(sc, txq, &bf_head, false);
|
@ -1,455 +0,0 @@ |
||||
From 03839951515b0ea2b21d649b1fe7b63f9817d0c8 Mon Sep 17 00:00:00 2001
|
||||
From: Daniel Golle <dgolle@allnet.de>
|
||||
Date: Sun, 9 Sep 2012 14:24:39 +0300
|
||||
Subject: [PATCH] rt2x00: add MediaTek/RaLink Rt3352 WiSoC
|
||||
|
||||
Support for the RT3352 WiSoC was developed for and tested with the ALL5002
|
||||
devboard running OpenWrt. For now, this supports only devices with internal
|
||||
TXALC. Corrections were made according to the remarks of Stanislaw Gruszka and
|
||||
Gertjan van Wingerde, thank you guys for reviewing!
|
||||
|
||||
Signed-off-by: Daniel Golle <dgolle@allnet.de>
|
||||
Signed-off-by: John W. Linville <linville@tuxdriver.com>
|
||||
---
|
||||
drivers/net/wireless/rt2x00/rt2800.h | 5 +
|
||||
drivers/net/wireless/rt2x00/rt2800lib.c | 211 +++++++++++++++++++++++++++++++-
|
||||
drivers/net/wireless/rt2x00/rt2x00.h | 1 +
|
||||
3 files changed, 212 insertions(+), 5 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/rt2x00/rt2800.h
|
||||
+++ b/drivers/net/wireless/rt2x00/rt2800.h
|
||||
@@ -1943,6 +1943,11 @@ struct mac_iveiv_entry {
|
||||
#define BBP47_TSSI_ADC6 FIELD8(0x80)
|
||||
|
||||
/*
|
||||
+ * BBP 49
|
||||
+ */
|
||||
+#define BBP49_UPDATE_FLAG FIELD8(0x01)
|
||||
+
|
||||
+/*
|
||||
* BBP 109
|
||||
*/
|
||||
#define BBP109_TX0_POWER FIELD8(0x0f)
|
||||
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
|
||||
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
|
||||
@@ -1615,6 +1615,7 @@ void rt2800_config_ant(struct rt2x00_dev
|
||||
case 1:
|
||||
if (rt2x00_rt(rt2x00dev, RT3070) ||
|
||||
rt2x00_rt(rt2x00dev, RT3090) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT3390)) {
|
||||
rt2x00_eeprom_read(rt2x00dev,
|
||||
EEPROM_NIC_CONF1, &eeprom);
|
||||
@@ -2053,6 +2054,60 @@ static void rt2800_config_channel_rf3290
|
||||
}
|
||||
}
|
||||
|
||||
+static void rt2800_config_channel_rf3322(struct rt2x00_dev *rt2x00dev,
|
||||
+ struct ieee80211_conf *conf,
|
||||
+ struct rf_channel *rf,
|
||||
+ struct channel_info *info)
|
||||
+{
|
||||
+ u8 rfcsr;
|
||||
+
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 8, rf->rf1);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 9, rf->rf3);
|
||||
+
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 11, 0x42);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 12, 0x1c);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
|
||||
+
|
||||
+ if (info->default_power1 > POWER_BOUND)
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 47, POWER_BOUND);
|
||||
+ else
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 47, info->default_power1);
|
||||
+
|
||||
+ if (info->default_power2 > POWER_BOUND)
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 48, POWER_BOUND);
|
||||
+ else
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 48, info->default_power2);
|
||||
+
|
||||
+ rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
|
||||
+ if (rt2x00dev->freq_offset > FREQ_OFFSET_BOUND)
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR17_CODE, FREQ_OFFSET_BOUND);
|
||||
+ else
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR17_CODE, rt2x00dev->freq_offset);
|
||||
+
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
|
||||
+
|
||||
+ rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1);
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1);
|
||||
+
|
||||
+ if ( rt2x00dev->default_ant.tx_chain_num == 2 )
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1);
|
||||
+ else
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0);
|
||||
+
|
||||
+ if ( rt2x00dev->default_ant.rx_chain_num == 2 )
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1);
|
||||
+ else
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0);
|
||||
+
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
|
||||
+ rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0);
|
||||
+
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
|
||||
+
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 31, 80);
|
||||
+}
|
||||
+
|
||||
static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev,
|
||||
struct ieee80211_conf *conf,
|
||||
struct rf_channel *rf,
|
||||
@@ -2182,6 +2237,9 @@ static void rt2800_config_channel(struct
|
||||
case RF3290:
|
||||
rt2800_config_channel_rf3290(rt2x00dev, conf, rf, info);
|
||||
break;
|
||||
+ case RF3322:
|
||||
+ rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info);
|
||||
+ break;
|
||||
case RF5360:
|
||||
case RF5370:
|
||||
case RF5372:
|
||||
@@ -2194,6 +2252,7 @@ static void rt2800_config_channel(struct
|
||||
}
|
||||
|
||||
if (rt2x00_rf(rt2x00dev, RF3290) ||
|
||||
+ rt2x00_rf(rt2x00dev, RF3322) ||
|
||||
rt2x00_rf(rt2x00dev, RF5360) ||
|
||||
rt2x00_rf(rt2x00dev, RF5370) ||
|
||||
rt2x00_rf(rt2x00dev, RF5372) ||
|
||||
@@ -2212,10 +2271,17 @@ static void rt2800_config_channel(struct
|
||||
/*
|
||||
* Change BBP settings
|
||||
*/
|
||||
- rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
|
||||
- rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
|
||||
- rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
|
||||
- rt2800_bbp_write(rt2x00dev, 86, 0);
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
+ rt2800_bbp_write(rt2x00dev, 27, 0x0);
|
||||
+ rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
|
||||
+ rt2800_bbp_write(rt2x00dev, 27, 0x20);
|
||||
+ rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
|
||||
+ } else {
|
||||
+ rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
|
||||
+ rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
|
||||
+ rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
|
||||
+ rt2800_bbp_write(rt2x00dev, 86, 0);
|
||||
+ }
|
||||
|
||||
if (rf->channel <= 14) {
|
||||
if (!rt2x00_rt(rt2x00dev, RT5390) &&
|
||||
@@ -2310,6 +2376,15 @@ static void rt2800_config_channel(struct
|
||||
rt2800_register_read(rt2x00dev, CH_IDLE_STA, ®);
|
||||
rt2800_register_read(rt2x00dev, CH_BUSY_STA, ®);
|
||||
rt2800_register_read(rt2x00dev, CH_BUSY_STA_SEC, ®);
|
||||
+
|
||||
+ /*
|
||||
+ * Clear update flag
|
||||
+ */
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
+ rt2800_bbp_read(rt2x00dev, 49, &bbp);
|
||||
+ rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0);
|
||||
+ rt2800_bbp_write(rt2x00dev, 49, bbp);
|
||||
+ }
|
||||
}
|
||||
|
||||
static int rt2800_get_gain_calibration_delta(struct rt2x00_dev *rt2x00dev)
|
||||
@@ -2998,6 +3073,10 @@ static int rt2800_init_registers(struct
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000030);
|
||||
+ } else if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000402);
|
||||
+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
|
||||
+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
|
||||
} else if (rt2x00_rt(rt2x00dev, RT3572)) {
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
|
||||
rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
|
||||
@@ -3378,6 +3457,11 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2800_wait_bbp_ready(rt2x00dev)))
|
||||
return -EACCES;
|
||||
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
+ rt2800_bbp_write(rt2x00dev, 3, 0x00);
|
||||
+ rt2800_bbp_write(rt2x00dev, 4, 0x50);
|
||||
+ }
|
||||
+
|
||||
if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392)) {
|
||||
@@ -3388,15 +3472,20 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
|
||||
if (rt2800_is_305x_soc(rt2x00dev) ||
|
||||
rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT3572) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 31, 0x08);
|
||||
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352))
|
||||
+ rt2800_bbp_write(rt2x00dev, 47, 0x48);
|
||||
+
|
||||
rt2800_bbp_write(rt2x00dev, 65, 0x2c);
|
||||
rt2800_bbp_write(rt2x00dev, 66, 0x38);
|
||||
|
||||
if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 68, 0x0b);
|
||||
@@ -3405,6 +3494,7 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2800_bbp_write(rt2x00dev, 69, 0x16);
|
||||
rt2800_bbp_write(rt2x00dev, 73, 0x12);
|
||||
} else if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392)) {
|
||||
rt2800_bbp_write(rt2x00dev, 69, 0x12);
|
||||
@@ -3436,6 +3526,10 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
} else if (rt2800_is_305x_soc(rt2x00dev)) {
|
||||
rt2800_bbp_write(rt2x00dev, 78, 0x0e);
|
||||
rt2800_bbp_write(rt2x00dev, 80, 0x08);
|
||||
+ } else if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
+ rt2800_bbp_write(rt2x00dev, 78, 0x0e);
|
||||
+ rt2800_bbp_write(rt2x00dev, 80, 0x08);
|
||||
+ rt2800_bbp_write(rt2x00dev, 81, 0x37);
|
||||
} else {
|
||||
rt2800_bbp_write(rt2x00dev, 81, 0x37);
|
||||
}
|
||||
@@ -3465,18 +3559,21 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2800_bbp_write(rt2x00dev, 84, 0x99);
|
||||
|
||||
if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 86, 0x38);
|
||||
else
|
||||
rt2800_bbp_write(rt2x00dev, 86, 0x00);
|
||||
|
||||
- if (rt2x00_rt(rt2x00dev, RT5392))
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 88, 0x90);
|
||||
|
||||
rt2800_bbp_write(rt2x00dev, 91, 0x04);
|
||||
|
||||
if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 92, 0x02);
|
||||
@@ -3493,6 +3590,7 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||
|
||||
rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||
|
||||
rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT3572) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392) ||
|
||||
@@ -3502,6 +3600,7 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2800_bbp_write(rt2x00dev, 103, 0x00);
|
||||
|
||||
if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 104, 0x92);
|
||||
@@ -3510,6 +3609,8 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2800_bbp_write(rt2x00dev, 105, 0x01);
|
||||
else if (rt2x00_rt(rt2x00dev, RT3290))
|
||||
rt2800_bbp_write(rt2x00dev, 105, 0x1c);
|
||||
+ else if (rt2x00_rt(rt2x00dev, RT3352))
|
||||
+ rt2800_bbp_write(rt2x00dev, 105, 0x34);
|
||||
else if (rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 105, 0x3c);
|
||||
@@ -3519,11 +3620,16 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390))
|
||||
rt2800_bbp_write(rt2x00dev, 106, 0x03);
|
||||
+ else if (rt2x00_rt(rt2x00dev, RT3352))
|
||||
+ rt2800_bbp_write(rt2x00dev, 106, 0x05);
|
||||
else if (rt2x00_rt(rt2x00dev, RT5392))
|
||||
rt2800_bbp_write(rt2x00dev, 106, 0x12);
|
||||
else
|
||||
rt2800_bbp_write(rt2x00dev, 106, 0x35);
|
||||
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352))
|
||||
+ rt2800_bbp_write(rt2x00dev, 120, 0x50);
|
||||
+
|
||||
if (rt2x00_rt(rt2x00dev, RT3290) ||
|
||||
rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392))
|
||||
@@ -3534,6 +3640,9 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2800_bbp_write(rt2x00dev, 135, 0xf6);
|
||||
}
|
||||
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352))
|
||||
+ rt2800_bbp_write(rt2x00dev, 137, 0x0f);
|
||||
+
|
||||
if (rt2x00_rt(rt2x00dev, RT3071) ||
|
||||
rt2x00_rt(rt2x00dev, RT3090) ||
|
||||
rt2x00_rt(rt2x00dev, RT3390) ||
|
||||
@@ -3574,6 +3683,28 @@ static int rt2800_init_bbp(struct rt2x00
|
||||
rt2800_bbp_write(rt2x00dev, 3, value);
|
||||
}
|
||||
|
||||
+ if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
+ rt2800_bbp_write(rt2x00dev, 163, 0xbd);
|
||||
+ /* Set ITxBF timeout to 0x9c40=1000msec */
|
||||
+ rt2800_bbp_write(rt2x00dev, 179, 0x02);
|
||||
+ rt2800_bbp_write(rt2x00dev, 180, 0x00);
|
||||
+ rt2800_bbp_write(rt2x00dev, 182, 0x40);
|
||||
+ rt2800_bbp_write(rt2x00dev, 180, 0x01);
|
||||
+ rt2800_bbp_write(rt2x00dev, 182, 0x9c);
|
||||
+ rt2800_bbp_write(rt2x00dev, 179, 0x00);
|
||||
+ /* Reprogram the inband interface to put right values in RXWI */
|
||||
+ rt2800_bbp_write(rt2x00dev, 142, 0x04);
|
||||
+ rt2800_bbp_write(rt2x00dev, 143, 0x3b);
|
||||
+ rt2800_bbp_write(rt2x00dev, 142, 0x06);
|
||||
+ rt2800_bbp_write(rt2x00dev, 143, 0xa0);
|
||||
+ rt2800_bbp_write(rt2x00dev, 142, 0x07);
|
||||
+ rt2800_bbp_write(rt2x00dev, 143, 0xa1);
|
||||
+ rt2800_bbp_write(rt2x00dev, 142, 0x08);
|
||||
+ rt2800_bbp_write(rt2x00dev, 143, 0xa2);
|
||||
+
|
||||
+ rt2800_bbp_write(rt2x00dev, 148, 0xc8);
|
||||
+ }
|
||||
+
|
||||
if (rt2x00_rt(rt2x00dev, RT5390) ||
|
||||
rt2x00_rt(rt2x00dev, RT5392)) {
|
||||
int ant, div_mode;
|
||||
@@ -3707,6 +3838,7 @@ static int rt2800_init_rfcsr(struct rt2x
|
||||
!rt2x00_rt(rt2x00dev, RT3071) &&
|
||||
!rt2x00_rt(rt2x00dev, RT3090) &&
|
||||
!rt2x00_rt(rt2x00dev, RT3290) &&
|
||||
+ !rt2x00_rt(rt2x00dev, RT3352) &&
|
||||
!rt2x00_rt(rt2x00dev, RT3390) &&
|
||||
!rt2x00_rt(rt2x00dev, RT3572) &&
|
||||
!rt2x00_rt(rt2x00dev, RT5390) &&
|
||||
@@ -3903,6 +4035,70 @@ static int rt2800_init_rfcsr(struct rt2x
|
||||
rt2800_rfcsr_write(rt2x00dev, 30, 0x00);
|
||||
rt2800_rfcsr_write(rt2x00dev, 31, 0x00);
|
||||
return 0;
|
||||
+ } else if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 1, 0x23);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 3, 0x18);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 4, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 5, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 6, 0x33);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 8, 0xf1);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 9, 0x02);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 10, 0xd2);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 11, 0x42);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 12, 0x1c);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 14, 0x5a);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 16, 0x01);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 18, 0x45);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 23, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 28, 0x03);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 29, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 34, 0x01);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 35, 0x03);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 36, 0xbd);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 37, 0x3c);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 38, 0x5f);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 39, 0xc5);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 40, 0x33);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 41, 0x5b);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 43, 0xdb);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 44, 0xdb);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 45, 0xdb);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 46, 0xdd);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 47, 0x0d);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 48, 0x14);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 49, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 50, 0x2d);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 51, 0x7f);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 52, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 53, 0x52);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 54, 0x1b);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 55, 0x7f);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 56, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 57, 0x52);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 58, 0x1b);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 59, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 60, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 61, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
|
||||
+ rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
|
||||
} else if (rt2x00_rt(rt2x00dev, RT5390)) {
|
||||
rt2800_rfcsr_write(rt2x00dev, 1, 0x0f);
|
||||
rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
|
||||
@@ -4104,6 +4300,7 @@ static int rt2800_init_rfcsr(struct rt2x
|
||||
rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
|
||||
} else if (rt2x00_rt(rt2x00dev, RT3071) ||
|
||||
rt2x00_rt(rt2x00dev, RT3090) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT3390) ||
|
||||
rt2x00_rt(rt2x00dev, RT3572)) {
|
||||
drv_data->calibration_bw20 =
|
||||
@@ -4566,6 +4763,7 @@ static int rt2800_init_eeprom(struct rt2
|
||||
case RT3071:
|
||||
case RT3090:
|
||||
case RT3290:
|
||||
+ case RT3352:
|
||||
case RT3390:
|
||||
case RT3572:
|
||||
case RT5390:
|
||||
@@ -4588,6 +4786,7 @@ static int rt2800_init_eeprom(struct rt2
|
||||
case RF3052:
|
||||
case RF3290:
|
||||
case RF3320:
|
||||
+ case RF3322:
|
||||
case RF5360:
|
||||
case RF5370:
|
||||
case RF5372:
|
||||
@@ -4612,6 +4811,7 @@ static int rt2800_init_eeprom(struct rt2
|
||||
|
||||
if (rt2x00_rt(rt2x00dev, RT3070) ||
|
||||
rt2x00_rt(rt2x00dev, RT3090) ||
|
||||
+ rt2x00_rt(rt2x00dev, RT3352) ||
|
||||
rt2x00_rt(rt2x00dev, RT3390)) {
|
||||
value = rt2x00_get_field16(eeprom,
|
||||
EEPROM_NIC_CONF1_ANT_DIVERSITY);
|
||||
@@ -4904,6 +5104,7 @@ static int rt2800_probe_hw_mode(struct r
|
||||
rt2x00_rf(rt2x00dev, RF3022) ||
|
||||
rt2x00_rf(rt2x00dev, RF3290) ||
|
||||
rt2x00_rf(rt2x00dev, RF3320) ||
|
||||
+ rt2x00_rf(rt2x00dev, RF3322) ||
|
||||
rt2x00_rf(rt2x00dev, RF5360) ||
|
||||
rt2x00_rf(rt2x00dev, RF5370) ||
|
||||
rt2x00_rf(rt2x00dev, RF5372) ||
|
||||
--- a/drivers/net/wireless/rt2x00/rt2x00.h
|
||||
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
|
||||
@@ -189,6 +189,7 @@ struct rt2x00_chip {
|
||||
#define RT3071 0x3071
|
||||
#define RT3090 0x3090 /* 2.4GHz PCIe */
|
||||
#define RT3290 0x3290
|
||||
+#define RT3352 0x3352 /* WSOC */
|
||||
#define RT3390 0x3390
|
||||
#define RT3572 0x3572
|
||||
#define RT3593 0x3593
|
@ -1,25 +0,0 @@ |
||||
From d0ae5f33c0221339a50bd1005c569934417003a5 Mon Sep 17 00:00:00 2001
|
||||
From: Daniel Golle <dgolle@allnet.de>
|
||||
Date: Thu, 4 Oct 2012 00:34:01 +0200
|
||||
Subject: [PATCH] rt2x00/rt3352: Fix lnagain assignment to use register 66.
|
||||
To: users@rt2x00.serialmonkey.com
|
||||
Cc: gwingerde@gmail.com
|
||||
|
||||
---
|
||||
drivers/net/wireless/rt2x00/rt2800lib.c | 4 ++--
|
||||
1 file changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
|
||||
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
|
||||
@@ -2273,9 +2273,9 @@ static void rt2800_config_channel(struct
|
||||
*/
|
||||
if (rt2x00_rt(rt2x00dev, RT3352)) {
|
||||
rt2800_bbp_write(rt2x00dev, 27, 0x0);
|
||||
- rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
|
||||
+ rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
|
||||
rt2800_bbp_write(rt2x00dev, 27, 0x20);
|
||||
- rt2800_bbp_write(rt2x00dev, 62, 0x26 + rt2x00dev->lna_gain);
|
||||
+ rt2800_bbp_write(rt2x00dev, 66, 0x26 + rt2x00dev->lna_gain);
|
||||
} else {
|
||||
rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
|
||||
rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
|
@ -1,42 +0,0 @@ |
||||
--- a/drivers/net/wireless/b43/main.c
|
||||
+++ b/drivers/net/wireless/b43/main.c
|
||||
@@ -4645,7 +4645,7 @@ static int b43_wireless_core_init(struct
|
||||
switch (dev->dev->bus_type) {
|
||||
#ifdef CONFIG_B43_BCMA
|
||||
case B43_BUS_BCMA:
|
||||
- bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci,
|
||||
+ bcma_core_pci_irq_ctl(&dev->dev->bdev->bus->drv_pci[0],
|
||||
dev->dev->bdev, true);
|
||||
break;
|
||||
#endif
|
||||
--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
|
||||
+++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c
|
||||
@@ -697,7 +697,7 @@ void ai_pci_up(struct si_pub *sih)
|
||||
sii = container_of(sih, struct si_info, pub);
|
||||
|
||||
if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
|
||||
- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, true);
|
||||
+ bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true);
|
||||
}
|
||||
|
||||
/* Unconfigure and/or apply various WARs when going down */
|
||||
@@ -708,7 +708,7 @@ void ai_pci_down(struct si_pub *sih)
|
||||
sii = container_of(sih, struct si_info, pub);
|
||||
|
||||
if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI)
|
||||
- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci, false);
|
||||
+ bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false);
|
||||
}
|
||||
|
||||
/* Enable BT-COEX & Ex-PA for 4313 */
|
||||
--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c
|
||||
+++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c
|
||||
@@ -5079,7 +5079,7 @@ static int brcms_b_up_prep(struct brcms_
|
||||
* Configure pci/pcmcia here instead of in brcms_c_attach()
|
||||
* to allow mfg hotswap: down, hotswap (chip power cycle), up.
|
||||
*/
|
||||
- bcma_core_pci_irq_ctl(&wlc_hw->d11core->bus->drv_pci, wlc_hw->d11core,
|
||||
+ bcma_core_pci_irq_ctl(&wlc_hw->d11core->bus->drv_pci[0], wlc_hw->d11core,
|
||||
true);
|
||||
|
||||
/*
|
Loading…
Reference in new issue