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@ -6,28 +6,28 @@ Subject: [PATCH 32/57] PCI: MIPS: adds mt7620a pcie driver |
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/pci/Makefile | 1 +
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arch/mips/pci/pci-mt7620a.c | 363 +++++++++++++++++++++++++++++++++++++++++++
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arch/mips/pci/pci-mt7620.c | 363 +++++++++++++++++++++++++++++++++++++++++++
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arch/mips/ralink/Kconfig | 1 +
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3 files changed, 365 insertions(+)
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create mode 100644 arch/mips/pci/pci-mt7620a.c
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create mode 100644 arch/mips/pci/pci-mt7620.c
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Index: linux-3.14.18/arch/mips/pci/Makefile
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===================================================================
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--- linux-3.14.18.orig/arch/mips/pci/Makefile 2014-11-12 15:57:29.098559332 +0100
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+++ linux-3.14.18/arch/mips/pci/Makefile 2014-11-12 15:57:29.118560067 +0100
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--- linux-3.14.18.orig/arch/mips/pci/Makefile 2014-11-13 15:45:37.323344081 +0100
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+++ linux-3.14.18/arch/mips/pci/Makefile 2014-11-13 15:45:37.331344390 +0100
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@@ -42,6 +42,7 @@
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obj-$(CONFIG_LANTIQ) += fixup-lantiq.o
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obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o
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obj-$(CONFIG_SOC_MT7621) += pci-mt7621.o
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+obj-$(CONFIG_SOC_MT7620) += pci-mt7620a.o
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+obj-$(CONFIG_SOC_MT7620) += pci-mt7620.o
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obj-$(CONFIG_SOC_RT2880) += pci-rt2880.o
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obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o
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obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o
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Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c
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Index: linux-3.14.18/arch/mips/pci/pci-mt7620.c
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===================================================================
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--- /dev/null 1970-01-01 00:00:00.000000000 +0000
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+++ linux-3.14.18/arch/mips/pci/pci-mt7620a.c 2014-11-12 17:24:58.339670670 +0100
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@@ -0,0 +1,405 @@
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+++ linux-3.14.18/arch/mips/pci/pci-mt7620.c 2014-11-13 18:20:27.961225097 +0100
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@@ -0,0 +1,395 @@
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+/*
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+ * Ralink MT7620A SoC PCI support
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+ *
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@ -228,19 +228,8 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c |
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+ .write = pci_config_write,
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+};
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+
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+static struct resource mt7620_res_pci_mem1 = {
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+ .name = "pci memory",
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+ .start = RALINK_PCI_MM_MAP_BASE,
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+ .end = (u32) ((RALINK_PCI_MM_MAP_BASE + (unsigned char *)0x0fffffff)),
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+ .flags = IORESOURCE_MEM,
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+};
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+static struct resource mt7620_res_pci_io1 = {
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+ .name = "pci io",
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+ .start = RALINK_PCI_IO_MAP_BASE,
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+ .end = (u32) ((RALINK_PCI_IO_MAP_BASE + (unsigned char *)0x0ffff)),
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+ .flags = IORESOURCE_IO,
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+};
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+
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+static struct resource mt7620_res_pci_mem1;
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+static struct resource mt7620_res_pci_io1;
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+struct pci_controller mt7620_controller = {
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+ .pci_ops = &mt7620_pci_ops,
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+ .mem_resource = &mt7620_res_pci_mem1,
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@ -325,7 +314,7 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c |
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+ ioport_resource.end = ~0;
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+
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+ /* bring up the pci core */
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+ switch (mt762x_soc) {
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+ switch (ralink_soc) {
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+ case MT762X_SOC_MT7620A:
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+ if (mt7620_pci_hw_init(pdev))
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+ return -1;
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@ -350,7 +339,7 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c |
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+ if ((pcie_r32(RALINK_PCI0_STATUS) & 0x1) == 0) {
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+ reset_control_assert(rstpcie0);
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+ rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1);
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+ if (mt762x_soc == MT762X_SOC_MT7620A)
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+ if (ralink_soc == MT762X_SOC_MT7620A)
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+ rt_sysc_m32(LC_CKDRVPD_, PDRV_SW_SET, PPLL_DRV);
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+ dev_err(&pdev->dev, "PCIE0 no card, disable it(RST&CLK)\n");
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+ return -1;
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@ -393,6 +382,7 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c |
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+ dev_err(&dev->dev, "no irq found - bus=0x%x, slot = 0x%x\n", dev->bus->number, slot);
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+ return 0;
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+ }
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+ dev_err(&dev->dev, "card - bus=0x%x, slot = 0x%x irq=%d\n", dev->bus->number, slot, irq);
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+
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+ pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0x14); //configure cache line size 0x14
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+ pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xFF); //configure latency timer 0x10
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@ -435,8 +425,8 @@ Index: linux-3.14.18/arch/mips/pci/pci-mt7620a.c |
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+arch_initcall(mt7620_pci_init);
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Index: linux-3.14.18/arch/mips/ralink/Kconfig
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===================================================================
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--- linux-3.14.18.orig/arch/mips/ralink/Kconfig 2014-11-12 15:57:29.098559332 +0100
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+++ linux-3.14.18/arch/mips/ralink/Kconfig 2014-11-12 15:57:29.118560067 +0100
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--- linux-3.14.18.orig/arch/mips/ralink/Kconfig 2014-11-13 15:45:37.323344081 +0100
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+++ linux-3.14.18/arch/mips/ralink/Kconfig 2014-11-13 15:45:37.331344390 +0100
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@@ -39,6 +39,7 @@
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bool "MT7620/8"
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select USB_ARCH_HAS_OHCI
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@ -447,8 +437,8 @@ Index: linux-3.14.18/arch/mips/ralink/Kconfig |
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bool "MT7621"
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Index: linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h
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===================================================================
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--- linux-3.14.18.orig/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-12 15:57:29.082558746 +0100
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+++ linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-12 15:57:29.118560067 +0100
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--- linux-3.14.18.orig/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-13 15:45:37.311343619 +0100
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+++ linux-3.14.18/arch/mips/include/asm/mach-ralink/mt7620.h 2014-11-13 18:20:31.721370073 +0100
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@@ -19,6 +19,7 @@
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MT762X_SOC_MT7620N,
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MT762X_SOC_MT7628AN,
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