Hauke Mehrtens
11 years ago
parent
ed6d759f39
commit
614e8f44bd
@ -1,73 +0,0 @@ |
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bcma: add some more core names
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These cores were found on a BCM4708 (chipid 53010), this is a ARM SoC
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with two Cortex A9 cores.
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bcma: bus0: Found chip with id 0xCF12, rev 0x00 and package 0x02
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bcma: bus0: Core 0 found: ChipCommon (manuf 0x4BF, id 0x800, rev 0x2A, class 0x0)
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bcma: bus0: Core 1 found: DMA (manuf 0x4BF, id 0x502, rev 0x01, class 0x0)
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bcma: bus0: Core 2 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
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bcma: bus0: Core 3 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
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bcma: bus0: Core 4 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
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bcma: bus0: Core 5 found: GBit MAC (manuf 0x4BF, id 0x82D, rev 0x04, class 0x0)
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bcma: bus0: Core 6 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x01, class 0x0)
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bcma: bus0: Core 7 found: PCIe Gen 2 (manuf 0x4BF, id 0x501, rev 0x01, class 0x0)
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bcma: bus0: Core 8 found: ARM Cortex A9 core (ihost) (manuf 0x4BF, id 0x510, rev 0x01, class 0x0)
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bcma: bus0: Core 9 found: USB 2.0 (manuf 0x4BF, id 0x504, rev 0x01, class 0x0)
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bcma: bus0: Core 10 found: USB 3.0 (manuf 0x4BF, id 0x505, rev 0x01, class 0x0)
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bcma: bus0: Core 11 found: SDIO3 (manuf 0x4BF, id 0x503, rev 0x01, class 0x0)
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bcma: bus0: Core 12 found: ARM Cortex A9 JTAG (manuf 0x4BF, id 0x506, rev 0x01, class 0x0)
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bcma: bus0: Core 13 found: Denali DDR2/DDR3 memory controller (manuf 0x4BF, id 0x507, rev 0x01, class 0x0)
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bcma: bus0: Core 14 found: ROM (manuf 0x4BF, id 0x508, rev 0x01, class 0x0)
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bcma: bus0: Core 15 found: NAND flash controller (manuf 0x4BF, id 0x509, rev 0x01, class 0x0)
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bcma: bus0: Core 16 found: SPI flash controller (manuf 0x4BF, id 0x50A, rev 0x01, class 0x0)
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/scan.c | 12 ++++++++++++
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include/linux/bcma/bcma.h | 12 ++++++++++++
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2 files changed, 24 insertions(+)
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--- a/drivers/bcma/scan.c
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+++ b/drivers/bcma/scan.c
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@@ -32,6 +32,18 @@ static const struct bcma_device_id_name
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{ BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
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{ BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
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{ BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
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+ { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
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+ { BCMA_CORE_DMA, "DMA" },
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+ { BCMA_CORE_SDIO3, "SDIO3" },
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+ { BCMA_CORE_USB20, "USB 2.0" },
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+ { BCMA_CORE_USB30, "USB 3.0" },
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+ { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
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+ { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
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+ { BCMA_CORE_ROM, "ROM" },
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+ { BCMA_CORE_NAND, "NAND flash controller" },
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+ { BCMA_CORE_QSPI, "SPI flash controller" },
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+ { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
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+ { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
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{ BCMA_CORE_AMEMC, "AMEMC (DDR)" },
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{ BCMA_CORE_ALTA, "ALTA (I2S)" },
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{ BCMA_CORE_INVALID, "Invalid" },
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--- a/include/linux/bcma/bcma.h
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+++ b/include/linux/bcma/bcma.h
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@@ -72,7 +72,19 @@ struct bcma_host_ops {
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/* Core-ID values. */
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#define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
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#define BCMA_CORE_4706_CHIPCOMMON 0x500
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+#define BCMA_CORE_PCIEG2 0x501
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+#define BCMA_CORE_DMA 0x502
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+#define BCMA_CORE_SDIO3 0x503
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+#define BCMA_CORE_USB20 0x504
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+#define BCMA_CORE_USB30 0x505
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+#define BCMA_CORE_A9JTAG 0x506
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+#define BCMA_CORE_DDR23 0x507
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+#define BCMA_CORE_ROM 0x508
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+#define BCMA_CORE_NAND 0x509
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+#define BCMA_CORE_QSPI 0x50A
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+#define BCMA_CORE_CHIPCOMMON_B 0x50B /* ChipcommonB core */
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#define BCMA_CORE_4706_SOC_RAM 0x50E
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+#define BCMA_CORE_ARMCA9 0x510
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#define BCMA_CORE_4706_MAC_GBIT 0x52D
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#define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */
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#define BCMA_CORE_ALTA 0x534 /* I2S core */
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@ -1,29 +0,0 @@ |
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bcma: make it possible to select SoC support without mips
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To make it possible to use the SoC host interface with ARM SoCs do not
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depend on the MIPS driver any more.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/Kconfig | 10 ++++++++--
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1 file changed, 8 insertions(+), 2 deletions(-)
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--- a/drivers/bcma/Kconfig
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+++ b/drivers/bcma/Kconfig
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@@ -36,8 +36,14 @@ config BCMA_DRIVER_PCI_HOSTMODE
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PCI core hostmode operation (external PCI bus).
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config BCMA_HOST_SOC
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- bool
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- depends on BCMA_DRIVER_MIPS
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+ bool "Support for BCMA in a SoC"
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+ depends on BCMA
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+ help
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+ Host interface for a Broadcom AIX bus directly mapped into
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+ the memory. This only works with the Broadcom SoCs from the
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+ BCM47XX line.
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+
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+ If unsure, say N
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config BCMA_DRIVER_MIPS
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bool "BCMA Broadcom MIPS core driver"
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@ -1,23 +0,0 @@ |
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bcma: add constants for new ARM based SoCs
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These are the chipIDs of some ARM based SoCs from the BCM47xx line.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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include/linux/bcma/bcma.h | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/include/linux/bcma/bcma.h
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+++ b/include/linux/bcma/bcma.h
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@@ -189,6 +189,11 @@ struct bcma_host_ops {
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#define BCMA_PKG_ID_BCM5357 11
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#define BCMA_CHIP_ID_BCM53572 53572
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#define BCMA_PKG_ID_BCM47188 9
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+#define BCMA_CHIP_ID_BCM4707 53010
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+#define BCMA_PKG_ID_BCM4707 1
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+#define BCMA_PKG_ID_BCM4708 2
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+#define BCMA_PKG_ID_BCM4709 0
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+#define BCMA_CHIP_ID_BCM53018 53018
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/* Board types (on PCI usually equals to the subsystem dev id) */
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/* BCM4313 */
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@ -1,20 +0,0 @@ |
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bcma: return correct error code when bus scan failed
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It is better to return the actual error code than just -1.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/main.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/bcma/main.c
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+++ b/drivers/bcma/main.c
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@@ -237,7 +237,7 @@ int bcma_bus_register(struct bcma_bus *b
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err = bcma_bus_scan(bus);
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if (err) {
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bcma_err(bus, "Failed to scan: %d\n", err);
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- return -1;
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+ return err;
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}
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/* Early init CC core */
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@ -1,81 +0,0 @@ |
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bcma: fix handling of big addrl
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The return value of bcma_erom_get_addr_desc() is a unsigned value and it
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could wrap around in the two complement writing. This happens for one
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core in the BCM4708 SoC.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/bcma/scan.c | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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--- a/drivers/bcma/scan.c
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+++ b/drivers/bcma/scan.c
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@@ -213,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct
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return ent;
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}
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-static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
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+static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr,
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u32 type, u8 port)
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{
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u32 addrl, addrh, sizel, sizeh = 0;
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@@ -225,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc
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((ent & SCAN_ADDR_TYPE) != type) ||
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(((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
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bcma_erom_push_ent(eromptr);
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- return -EINVAL;
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+ return (u32)-EINVAL;
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}
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addrl = ent & SCAN_ADDR_ADDR;
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@@ -273,7 +273,7 @@ static int bcma_get_next_core(struct bcm
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struct bcma_device_id *match, int core_num,
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struct bcma_device *core)
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{
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- s32 tmp;
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+ u32 tmp;
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u8 i, j;
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s32 cia, cib;
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u8 ports[2], wrappers[2];
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@@ -351,11 +351,11 @@ static int bcma_get_next_core(struct bcm
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* the main register space for the core
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*/
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tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0);
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- if (tmp <= 0) {
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+ if (tmp == 0 || IS_ERR_VALUE(tmp)) {
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/* Try again to see if it is a bridge */
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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SCAN_ADDR_TYPE_BRIDGE, 0);
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- if (tmp <= 0) {
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+ if (tmp == 0 || IS_ERR_VALUE(tmp)) {
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return -EILSEQ;
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} else {
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bcma_info(bus, "Bridge found\n");
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@@ -369,7 +369,7 @@ static int bcma_get_next_core(struct bcm
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for (j = 0; ; j++) {
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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SCAN_ADDR_TYPE_SLAVE, i);
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- if (tmp < 0) {
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+ if (IS_ERR_VALUE(tmp)) {
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/* no more entries for port _i_ */
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/* pr_debug("erom: slave port %d "
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* "has %d descriptors\n", i, j); */
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@@ -386,7 +386,7 @@ static int bcma_get_next_core(struct bcm
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for (j = 0; ; j++) {
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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SCAN_ADDR_TYPE_MWRAP, i);
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- if (tmp < 0) {
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+ if (IS_ERR_VALUE(tmp)) {
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/* no more entries for port _i_ */
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/* pr_debug("erom: master wrapper %d "
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* "has %d descriptors\n", i, j); */
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@@ -404,7 +404,7 @@ static int bcma_get_next_core(struct bcm
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for (j = 0; ; j++) {
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tmp = bcma_erom_get_addr_desc(bus, eromptr,
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SCAN_ADDR_TYPE_SWRAP, i + hack);
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- if (tmp < 0) {
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+ if (IS_ERR_VALUE(tmp)) {
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/* no more entries for port _i_ */
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/* pr_debug("erom: master wrapper %d "
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* has %d descriptors\n", i, j); */
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@ -1,167 +0,0 @@ |
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bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
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called by b43 and brcmsmac
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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--- a/drivers/bcma/driver_pci.c
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+++ b/drivers/bcma/driver_pci.c
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@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
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pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
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}
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-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
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+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
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{
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u32 v;
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int i;
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@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
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}
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}
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-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
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+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
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{
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int max_retries = 10;
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u16 ret = 0;
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@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
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return ret;
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}
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-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
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+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
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u8 address, u16 data)
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{
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int max_retries = 10;
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@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
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pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
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}
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+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
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+ u8 address, u16 data)
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+{
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+ bcma_pcie_mdio_write(pc, device, address, data);
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+ return bcma_pcie_mdio_read(pc, device, address);
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+}
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+
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/**************************************************
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* Workarounds.
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**************************************************/
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@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
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}
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}
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+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
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+{
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+ u16 data;
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+
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+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
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+ data = up ? 0x74 : 0x7C;
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
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+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
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+ data = up ? 0x75 : 0x7D;
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
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+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
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+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
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+ }
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+}
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+
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/**************************************************
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* Init.
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**************************************************/
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@@ -262,7 +288,7 @@ out:
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}
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EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
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-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
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+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
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{
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u32 w;
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@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
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bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
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bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
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}
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-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
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+
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+void bcma_core_pci_up(struct bcma_bus *bus)
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+{
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+ struct bcma_drv_pci *pc;
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+
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+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
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+ return;
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+
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+ pc = &bus->drv_pci[0];
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+
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+ bcma_core_pci_power_save(pc, true);
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+
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+ bcma_core_pci_extend_L1timer(pc, true);
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+
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+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
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+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
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+ pcie_set_readrq(bus->host_pci, 128);
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+ }
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+}
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+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
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+
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+void bcma_core_pci_down(struct bcma_bus *bus)
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+{
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+ struct bcma_drv_pci *pc;
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+
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+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
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+ return;
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+
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+ pc = &bus->drv_pci[0];
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+
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+ bcma_core_pci_extend_L1timer(pc, false);
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+
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+ bcma_core_pci_power_save(pc, false);
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+}
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+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
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--- a/include/linux/bcma/bcma_driver_pci.h
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+++ b/include/linux/bcma/bcma_driver_pci.h
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@@ -181,10 +181,31 @@ struct pci_dev;
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#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
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+#define BCMA_CORE_PCI_
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+
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+/* MDIO devices (SERDES modules) */
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+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
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+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
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+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
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+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
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+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
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+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
||||
@ -1,167 +0,0 @@ |
||||
bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
|
||||
called by b43 and brcmsmac
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
--- a/drivers/bcma/driver_pci.c
|
||||
+++ b/drivers/bcma/driver_pci.c
|
||||
@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
|
||||
{
|
||||
u32 v;
|
||||
int i;
|
||||
@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
{
|
||||
int max_retries = 10;
|
||||
u16 ret = 0;
|
||||
@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
|
||||
return ret;
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
|
||||
+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
u8 address, u16 data)
|
||||
{
|
||||
int max_retries = 10;
|
||||
@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
|
||||
}
|
||||
|
||||
+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
|
||||
+ u8 address, u16 data)
|
||||
+{
|
||||
+ bcma_pcie_mdio_write(pc, device, address, data);
|
||||
+ return bcma_pcie_mdio_read(pc, device, address);
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Workarounds.
|
||||
**************************************************/
|
||||
@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
|
||||
}
|
||||
}
|
||||
|
||||
+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
|
||||
+{
|
||||
+ u16 data;
|
||||
+
|
||||
+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
|
||||
+ data = up ? 0x74 : 0x7C;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
|
||||
+ data = up ? 0x75 : 0x7D;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Init.
|
||||
**************************************************/
|
||||
@@ -262,7 +288,7 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
|
||||
-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
{
|
||||
u32 w;
|
||||
|
||||
@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
|
||||
bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
}
|
||||
-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void __devinit bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
||||
@ -1,167 +0,0 @@ |
||||
bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
|
||||
called by b43 and brcmsmac
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
--- a/drivers/bcma/driver_pci.c
|
||||
+++ b/drivers/bcma/driver_pci.c
|
||||
@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
|
||||
{
|
||||
u32 v;
|
||||
int i;
|
||||
@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
{
|
||||
int max_retries = 10;
|
||||
u16 ret = 0;
|
||||
@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
|
||||
return ret;
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
|
||||
+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
u8 address, u16 data)
|
||||
{
|
||||
int max_retries = 10;
|
||||
@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
|
||||
}
|
||||
|
||||
+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
|
||||
+ u8 address, u16 data)
|
||||
+{
|
||||
+ bcma_pcie_mdio_write(pc, device, address, data);
|
||||
+ return bcma_pcie_mdio_read(pc, device, address);
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Workarounds.
|
||||
**************************************************/
|
||||
@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
|
||||
}
|
||||
}
|
||||
|
||||
+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
|
||||
+{
|
||||
+ u16 data;
|
||||
+
|
||||
+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
|
||||
+ data = up ? 0x74 : 0x7C;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
|
||||
+ data = up ? 0x75 : 0x7D;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Init.
|
||||
**************************************************/
|
||||
@@ -262,7 +288,7 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
|
||||
-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
{
|
||||
u32 w;
|
||||
|
||||
@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
|
||||
bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
}
|
||||
-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
||||
@ -1,167 +0,0 @@ |
||||
bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
|
||||
called by b43 and brcmsmac
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
--- a/drivers/bcma/driver_pci.c
|
||||
+++ b/drivers/bcma/driver_pci.c
|
||||
@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
|
||||
{
|
||||
u32 v;
|
||||
int i;
|
||||
@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
{
|
||||
int max_retries = 10;
|
||||
u16 ret = 0;
|
||||
@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
|
||||
return ret;
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
|
||||
+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
u8 address, u16 data)
|
||||
{
|
||||
int max_retries = 10;
|
||||
@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
|
||||
}
|
||||
|
||||
+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
|
||||
+ u8 address, u16 data)
|
||||
+{
|
||||
+ bcma_pcie_mdio_write(pc, device, address, data);
|
||||
+ return bcma_pcie_mdio_read(pc, device, address);
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Workarounds.
|
||||
**************************************************/
|
||||
@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
|
||||
}
|
||||
}
|
||||
|
||||
+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
|
||||
+{
|
||||
+ u16 data;
|
||||
+
|
||||
+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
|
||||
+ data = up ? 0x74 : 0x7C;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
|
||||
+ data = up ? 0x75 : 0x7D;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Init.
|
||||
**************************************************/
|
||||
@@ -262,7 +288,7 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
|
||||
-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
{
|
||||
u32 w;
|
||||
|
||||
@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
|
||||
bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
}
|
||||
-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
||||
@ -1,167 +0,0 @@ |
||||
bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets
|
||||
called by b43 and brcmsmac
|
||||
|
||||
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
--- a/drivers/bcma/driver_pci.c
|
||||
+++ b/drivers/bcma/driver_pci.c
|
||||
@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data);
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
|
||||
+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy)
|
||||
{
|
||||
u32 v;
|
||||
int i;
|
||||
@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc
|
||||
}
|
||||
}
|
||||
|
||||
-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
|
||||
+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address)
|
||||
{
|
||||
int max_retries = 10;
|
||||
u16 ret = 0;
|
||||
@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc
|
||||
return ret;
|
||||
}
|
||||
|
||||
-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
|
||||
+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device,
|
||||
u8 address, u16 data)
|
||||
{
|
||||
int max_retries = 10;
|
||||
@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct
|
||||
pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);
|
||||
}
|
||||
|
||||
+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device,
|
||||
+ u8 address, u16 data)
|
||||
+{
|
||||
+ bcma_pcie_mdio_write(pc, device, address, data);
|
||||
+ return bcma_pcie_mdio_read(pc, device, address);
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Workarounds.
|
||||
**************************************************/
|
||||
@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s
|
||||
}
|
||||
}
|
||||
|
||||
+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up)
|
||||
+{
|
||||
+ u16 data;
|
||||
+
|
||||
+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) {
|
||||
+ data = up ? 0x74 : 0x7C;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) {
|
||||
+ data = up ? 0x75 : 0x7D;
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65);
|
||||
+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1,
|
||||
+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
/**************************************************
|
||||
* Init.
|
||||
**************************************************/
|
||||
@@ -262,7 +288,7 @@ out:
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl);
|
||||
|
||||
-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend)
|
||||
{
|
||||
u32 w;
|
||||
|
||||
@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct
|
||||
bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w);
|
||||
bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG);
|
||||
}
|
||||
-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer);
|
||||
+
|
||||
+void bcma_core_pci_up(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, true);
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, true);
|
||||
+
|
||||
+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) &&
|
||||
+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) {
|
||||
+ pcie_set_readrq(bus->host_pci, 128);
|
||||
+ }
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_up);
|
||||
+
|
||||
+void bcma_core_pci_down(struct bcma_bus *bus)
|
||||
+{
|
||||
+ struct bcma_drv_pci *pc;
|
||||
+
|
||||
+ if (bus->hosttype != BCMA_HOSTTYPE_PCI)
|
||||
+ return;
|
||||
+
|
||||
+ pc = &bus->drv_pci[0];
|
||||
+
|
||||
+ bcma_core_pci_extend_L1timer(pc, false);
|
||||
+
|
||||
+ bcma_core_pci_power_save(pc, false);
|
||||
+}
|
||||
+EXPORT_SYMBOL_GPL(bcma_core_pci_down);
|
||||
--- a/include/linux/bcma/bcma_driver_pci.h
|
||||
+++ b/include/linux/bcma/bcma_driver_pci.h
|
||||
@@ -181,10 +181,31 @@ struct pci_dev;
|
||||
|
||||
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
|
||||
|
||||
+#define BCMA_CORE_PCI_
|
||||
+
|
||||
+/* MDIO devices (SERDES modules) */
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
|
||||
+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK0 0x800
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1 0x801
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK2 0x802
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK3 0x803
|
||||
+#define BCMA_CORE_PCI_MDIO_BLK4 0x804
|
||||
+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
|
||||
+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
|
||||
+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
|
||||
+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
|
||||
+
|
||||
/* PCIE Root Capability Register bits (Host mode only) */
|
||||
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
|
||||
|
||||
struct bcma_drv_pci;
|
||||
+struct bcma_bus;
|
||||
|
||||
#ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE
|
||||
struct bcma_drv_pci_host {
|
||||
@@ -219,7 +240,8 @@ struct bcma_drv_pci {
|
||||
extern void bcma_core_pci_init(struct bcma_drv_pci *pc);
|
||||
extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc,
|
||||
struct bcma_device *core, bool enable);
|
||||
-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend);
|
||||
+extern void bcma_core_pci_up(struct bcma_bus *bus);
|
||||
+extern void bcma_core_pci_down(struct bcma_bus *bus);
|
||||
|
||||
extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev);
|
||||
extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev);
|
||||
Loading…
Reference in new issue