Netgear DM200 is an inexpensive VDSL modem: CPU: VRX220 MIPS 34Kc 5.6 @ 500Mhz RAM: 64MiB Flash: 8MiB Ethernet: 1x100M DSL: VDSL2+, ADSL2+ reset button, 3x bi-color LEDs Serial port is 115200 baud, on the 4 pin header; pins from the bottom to top are GND, RX, TX. To upgrade from the vendor firmware, upload factory.img The DM200 bootloader supports flashing over TFTP; hold the reset button while powering on the device, and wait for the power light to start flashing green before releasing. The device is now listening on 192.168.0.1/24, and can be sent a factory.img or a netgear image with a TFTP put. Once the image is loaded, it will be written to the flash, and the device will reboot; this will take a few minutes. Thanks to Edward O'Callaghan and Baptiste Jonglez, who implemented their own ports for this device and provided valuable feedback. Signed-off-by: Thomas Nixon <tom@tomn.co.uk>master
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/dts-v1/; |
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#include "vr9.dtsi" |
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#include <dt-bindings/input/input.h> |
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/ { |
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model = "DM200 - Netgear DM200"; |
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chosen { |
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bootargs = "console=ttyLTQ0,115200"; |
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}; |
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aliases { |
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led-boot = &power_green; |
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led-failsafe = &power_amber; |
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led-running = &power_green; |
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led-dsl = &dsl_green; |
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}; |
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memory@0 { |
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reg = <0x0 0x4000000>; |
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}; |
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fpi@10000000 { |
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gpio: pinmux@E100B10 { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&state_default>; |
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state_default: pinmux { |
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mdio { |
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lantiq,groups = "mdio"; |
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lantiq,function = "mdio"; |
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}; |
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}; |
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pins_spi_default: pins_spi_default { |
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spi_in { |
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lantiq,groups = "spi_di"; |
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lantiq,function = "spi"; |
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}; |
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spi_out { |
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lantiq,groups = "spi_do", "spi_clk", "spi_cs4"; |
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lantiq,function = "spi"; |
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lantiq,output = <1>; |
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}; |
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}; |
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}; |
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pcie@d900000 { |
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status = "disabled"; |
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}; |
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}; |
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gphy-xrx200 { |
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compatible = "lantiq,phy-xrx200"; |
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firmware = "lantiq/vr9_phy22f_a2x.bin"; |
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phys = [ 01 ]; |
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}; |
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gpio-keys-polled { |
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compatible = "gpio-keys-polled"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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poll-interval = <100>; |
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reset { |
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label = "reset"; |
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>; |
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linux,code = <KEY_RESTART>; |
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}; |
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}; |
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gpio_export { |
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compatible = "gpio-export"; |
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#size-cells = <0>; |
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annexa { |
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gpio-export,name = "annexa"; |
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gpio-export,output = <0>; |
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gpios = <&gpio 12 GPIO_ACTIVE_HIGH>; |
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}; |
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annexb { |
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gpio-export,name = "annexb"; |
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gpio-export,output = <0>; |
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gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; |
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}; |
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}; |
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gpio-leds { |
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compatible = "gpio-leds"; |
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power_amber: power_amber { |
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label = "dm200:amber:power"; |
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; |
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}; |
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power_green: power_green { |
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label = "dm200:green:power"; |
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gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; |
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}; |
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lan_amber { |
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label = "dm200:amber:lan"; |
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gpios = <&gpio 33 GPIO_ACTIVE_HIGH>; |
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}; |
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lan_green { |
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label = "dm200:green:lan"; |
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gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; |
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}; |
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dsl_amber { |
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label = "dm200:amber:dsl"; |
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gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; |
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}; |
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dsl_green: dsl_green { |
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label = "dm200:green:dsl"; |
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gpios = <&gpio 36 GPIO_ACTIVE_HIGH>; |
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}; |
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}; |
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}; |
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&spi { |
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pinctrl-names = "default"; |
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pinctrl-0 = <&pins_spi_default>; |
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status = "ok"; |
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m25p80@4 { |
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#address-cells = <1>; |
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#size-cells = <1>; |
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compatible = "jedec,spi-nor"; |
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reg = <4 0>; |
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spi-max-frequency = <10000000>; |
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partitions { |
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compatible = "fixed-partitions"; |
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#address-cells = <1>; |
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#size-cells = <1>; |
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partition@0 { |
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reg = <0x0 0x20000>; |
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label = "uboot"; |
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read-only; |
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}; |
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partition@20000 { |
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reg = <0x20000 0x10000>; |
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label = "gphyfirmware"; |
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read-only; |
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}; |
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partition@30000 { |
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reg = <0x30000 0x7b0000>; |
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label = "firmware"; |
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}; |
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partition@7e0000 { |
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reg = <0x7e0000 0x10000>; |
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label = "sysconfig"; |
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read-only; |
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}; |
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partition@7f0000 { |
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reg = <0x7f0000 0x2000>; |
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label = "ubootconfig"; |
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read-only; |
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}; |
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partition@7f2000 { |
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reg = <0x7f2000 0x1000>; |
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label = "ART"; |
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read-only; |
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}; |
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partition@7f3000 { |
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reg = <0x7f3000 0x1000>; |
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label = "pot"; |
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read-only; |
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}; |
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partition@7f4000 { |
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reg = <0x7f4000 0xc000>; |
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label = "ret"; |
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read-only; |
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}; |
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}; |
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}; |
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}; |
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ð0 { |
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lan: interface@0 { |
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compatible = "lantiq,xrx200-pdi"; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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reg = <0>; |
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ethernet@4 { |
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compatible = "lantiq,xrx200-pdi-port"; |
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reg = <4>; |
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phy-mode = "mii"; |
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phy-handle = <&phy13>; |
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}; |
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}; |
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mdio@0 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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compatible = "lantiq,xrx200-mdio"; |
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phy13: ethernet-phy@13 { |
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reg = <0x13>; |
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compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22"; |
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}; |
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}; |
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}; |
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