This adds the following patches to the x86 target: sp5100_tco: Add AMD Mullins platform support sp5100_tco: Add AMD Carrizo platform support sp5100_tco: fix the device check for SB800 and later chipsets watchdog: sp5100_tco: properly check for new register layouts With these added, the sp5100_tco driver can then be used on newer AMD platforms, such as the PCEngines APU2/APU3 boards. Signed-off-by: Chris Blake <chrisrblake93@gmail.com>master
parent
371b382a40
commit
4fab08183b
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From 190aa4304de6fe2185d96392ddf56580fa133e99 Mon Sep 17 00:00:00 2001
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From: Denis Turischev <denis.turischev@compulab.co.il>
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Date: Tue, 24 Nov 2015 10:46:12 +0200
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Subject: [PATCH] sp5100_tco: Add AMD Mullins platform support
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AMD Mullins watchdog is fully compatible to the previous Hudson chipset,
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reuse the existent sp5100_tco driver.
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Signed-off-by: Denis Turischev <denis.turischev@compulab.co.il>
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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drivers/watchdog/sp5100_tco.c | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
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index eb8044e..ef039f8 100644
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--- a/drivers/watchdog/sp5100_tco.c
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+++ b/drivers/watchdog/sp5100_tco.c
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@@ -306,6 +306,8 @@ static struct miscdevice sp5100_tco_miscdev = {
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static const struct pci_device_id sp5100_tco_pci_tbl[] = {
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{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID,
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PCI_ANY_ID, },
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+ { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, PCI_ANY_ID,
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+ PCI_ANY_ID, },
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
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--
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2.7.4
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From cca118fa2a0a94e0f0b3c8dd1dda922cdee45089 Mon Sep 17 00:00:00 2001
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From: Huang Rui <ray.huang@amd.com>
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Date: Mon, 23 Nov 2015 18:07:36 +0800
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Subject: [PATCH] sp5100_tco: Add AMD Carrizo platform support
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sp5100_tco watchdog is also supported on AMD KernCZ chipset of Carrizo
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platform.
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Signed-off-by: Huang Rui <ray.huang@amd.com>
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Cc: Denis Turischev <denis.turischev@compulab.co.il>
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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drivers/watchdog/sp5100_tco.c | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
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index ef039f8..0ccadb4 100644
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--- a/drivers/watchdog/sp5100_tco.c
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+++ b/drivers/watchdog/sp5100_tco.c
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@@ -308,6 +308,8 @@ static const struct pci_device_id sp5100_tco_pci_tbl[] = {
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PCI_ANY_ID, },
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{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, PCI_ANY_ID,
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PCI_ANY_ID, },
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+ { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, PCI_ANY_ID,
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+ PCI_ANY_ID, },
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
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--
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2.7.4
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From bdecfcdb5461834aab24002bb18d3cbdd907b7fb Mon Sep 17 00:00:00 2001
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From: Huang Rui <ray.huang@amd.com>
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Date: Mon, 23 Nov 2015 18:07:35 +0800
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Subject: [PATCH] sp5100_tco: fix the device check for SB800 and later chipsets
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For SB800 and later chipsets, the register definitions are the same
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with SB800. And for SB700 and older chipsets, the definitions should
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be same with SP5100/SB7x0.
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Signed-off-by: Huang Rui <ray.huang@amd.com>
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Cc: Denis Turischev <denis.turischev@compulab.co.il>
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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drivers/watchdog/sp5100_tco.c | 28 ++++++++++++++++------------
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1 file changed, 16 insertions(+), 12 deletions(-)
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diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
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index 0ccadb4..6467b91 100644
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--- a/drivers/watchdog/sp5100_tco.c
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+++ b/drivers/watchdog/sp5100_tco.c
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@@ -335,21 +335,24 @@ static unsigned char sp5100_tco_setupdevice(void)
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if (!sp5100_tco_pci)
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return 0;
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- pr_info("PCI Revision ID: 0x%x\n", sp5100_tco_pci->revision);
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+ pr_info("PCI Vendor ID: 0x%x, Device ID: 0x%x, Revision ID: 0x%x\n",
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+ sp5100_tco_pci->vendor, sp5100_tco_pci->device,
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+ sp5100_tco_pci->revision);
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/*
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* Determine type of southbridge chipset.
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*/
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- if (sp5100_tco_pci->revision >= 0x40) {
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- dev_name = SB800_DEVNAME;
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- index_reg = SB800_IO_PM_INDEX_REG;
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- data_reg = SB800_IO_PM_DATA_REG;
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- base_addr = SB800_PM_WATCHDOG_BASE;
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- } else {
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+ if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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+ sp5100_tco_pci->revision < 0x40) {
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dev_name = SP5100_DEVNAME;
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index_reg = SP5100_IO_PM_INDEX_REG;
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data_reg = SP5100_IO_PM_DATA_REG;
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base_addr = SP5100_PM_WATCHDOG_BASE;
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+ } else {
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+ dev_name = SB800_DEVNAME;
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+ index_reg = SB800_IO_PM_INDEX_REG;
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+ data_reg = SB800_IO_PM_DATA_REG;
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+ base_addr = SB800_PM_WATCHDOG_BASE;
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}
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/* Request the IO ports used by this driver */
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@@ -385,7 +388,12 @@ static unsigned char sp5100_tco_setupdevice(void)
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* Secondly, Find the watchdog timer MMIO address
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* from SBResource_MMIO register.
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*/
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- if (sp5100_tco_pci->revision >= 0x40) {
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+ if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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+ sp5100_tco_pci->revision < 0x40) {
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+ /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
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+ pci_read_config_dword(sp5100_tco_pci,
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+ SP5100_SB_RESOURCE_MMIO_BASE, &val);
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+ } else {
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/* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */
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outb(SB800_PM_ACPI_MMIO_EN+3, SB800_IO_PM_INDEX_REG);
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val = inb(SB800_IO_PM_DATA_REG);
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@@ -395,10 +403,6 @@ static unsigned char sp5100_tco_setupdevice(void)
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val = val << 8 | inb(SB800_IO_PM_DATA_REG);
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outb(SB800_PM_ACPI_MMIO_EN+0, SB800_IO_PM_INDEX_REG);
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val = val << 8 | inb(SB800_IO_PM_DATA_REG);
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- } else {
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- /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
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- pci_read_config_dword(sp5100_tco_pci,
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- SP5100_SB_RESOURCE_MMIO_BASE, &val);
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}
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/* The SBResource_MMIO is enabled and mapped memory space? */
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--
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2.7.4
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From 46856fabe40cc80f92134683cdec7dc0fc8f4000 Mon Sep 17 00:00:00 2001
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From: Lucas Stach <dev@lynxeye.de>
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Date: Tue, 3 May 2016 19:15:58 +0200
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Subject: [PATCH] watchdog: sp5100_tco: properly check for new register layouts
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Commits 190aa4304de6 (Add AMD Mullins platform support) and
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cca118fa2a0a94 (Add AMD Carrizo platform support) enabled the
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driver on a lot more devices, but the following commit missed
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a single location in the code when checking if the SB800 register
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offsets should be used. This leads to the wrong register being
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written which in turn causes ACPI to go haywire.
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Fix this by introducing a helper function to check for the new
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register layout and use this consistently.
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https://bugzilla.kernel.org/show_bug.cgi?id=114201
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https://bugzilla.redhat.com/show_bug.cgi?id=1329910
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Fixes: bdecfcdb5461 (sp5100_tco: fix the device check for SB800
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and later chipsets)
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Cc: stable@vger.kernel.org (4.5+)
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
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Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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---
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drivers/watchdog/sp5100_tco.c | 15 ++++++++++-----
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1 file changed, 10 insertions(+), 5 deletions(-)
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diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
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index 6467b91..028618c 100644
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--- a/drivers/watchdog/sp5100_tco.c
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+++ b/drivers/watchdog/sp5100_tco.c
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@@ -73,6 +73,13 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started."
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/*
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* Some TCO specific functions
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*/
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+
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+static bool tco_has_sp5100_reg_layout(struct pci_dev *dev)
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+{
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+ return dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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+ dev->revision < 0x40;
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+}
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+
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static void tco_timer_start(void)
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{
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u32 val;
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@@ -129,7 +136,7 @@ static void tco_timer_enable(void)
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{
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int val;
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- if (sp5100_tco_pci->revision >= 0x40) {
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+ if (!tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
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/* For SB800 or later */
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/* Set the Watchdog timer resolution to 1 sec */
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outb(SB800_PM_WATCHDOG_CONFIG, SB800_IO_PM_INDEX_REG);
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@@ -342,8 +349,7 @@ static unsigned char sp5100_tco_setupdevice(void)
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/*
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* Determine type of southbridge chipset.
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*/
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- if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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- sp5100_tco_pci->revision < 0x40) {
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+ if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
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dev_name = SP5100_DEVNAME;
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index_reg = SP5100_IO_PM_INDEX_REG;
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data_reg = SP5100_IO_PM_DATA_REG;
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@@ -388,8 +394,7 @@ static unsigned char sp5100_tco_setupdevice(void)
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* Secondly, Find the watchdog timer MMIO address
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* from SBResource_MMIO register.
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*/
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- if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
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- sp5100_tco_pci->revision < 0x40) {
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+ if (tco_has_sp5100_reg_layout(sp5100_tco_pci)) {
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/* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
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pci_read_config_dword(sp5100_tco_pci,
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SP5100_SB_RESOURCE_MMIO_BASE, &val);
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--
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2.7.4
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Reference in new issue