parent
b8430e7427
commit
4ef09dc5f8
@ -1,21 +0,0 @@ |
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--- a/arch/mips/pci/pci-octeon.c
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+++ b/arch/mips/pci/pci-octeon.c
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@@ -217,6 +217,8 @@ const char *octeon_get_pci_interrupts(vo
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return "AAAAAAAAAAAAAABAAAAAAAAAAAAAAABA";
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case CVMX_BOARD_TYPE_BBGW_REF:
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return "AABCD";
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+ case CVMX_BOARD_TYPE_CUST_NB5:
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+ return "ABDABAAAAAAAAAAAAAAAAAAAAAAAAAAA";
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case CVMX_BOARD_TYPE_THUNDER:
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case CVMX_BOARD_TYPE_EBH3000:
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default:
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--- a/drivers/staging/octeon/cvmx-helper-board.c
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+++ b/drivers/staging/octeon/cvmx-helper-board.c
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@@ -707,6 +707,7 @@ cvmx_helper_board_usb_clock_types_t __cv
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{
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switch (cvmx_sysinfo_get()->board_type) {
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case CVMX_BOARD_TYPE_BBGW_REF:
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+ case CVMX_BOARD_TYPE_CUST_NB5:
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return USB_CLOCK_TYPE_CRYSTAL_12;
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}
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return USB_CLOCK_TYPE_REF_48;
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@ -1,40 +0,0 @@ |
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When building with a toolchain that is configured to produce 32-bits executable
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by default, we will produce __lshrti3 in sched_clock() which is never resolved
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so the kernel fails to link. Unconditionally use the inline assemble version
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as suggested by David Daney, which works around the issue.
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CC: David Daney <ddaney@caviumnetworks.com>
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Signed-off-by: Florian Fainelli <florian@openwrt.org>
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---
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arch/mips/cavium-octeon/csrc-octeon.c | 8 --------
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1 files changed, 0 insertions(+), 8 deletions(-)
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diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
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index 0bf4bbe..36400d2 100644
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--- a/arch/mips/cavium-octeon/csrc-octeon.c
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+++ b/arch/mips/cavium-octeon/csrc-octeon.c
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@@ -53,7 +53,6 @@ static struct clocksource clocksource_mips = {
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unsigned long long notrace sched_clock(void)
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{
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/* 64-bit arithmatic can overflow, so use 128-bit. */
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-#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3))
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u64 t1, t2, t3;
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unsigned long long rv;
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u64 mult = clocksource_mips.mult;
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@@ -73,13 +72,6 @@ unsigned long long notrace sched_clock(void)
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: [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift)
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: "hi", "lo");
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return rv;
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-#else
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- /* GCC > 4.3 do it the easy way. */
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- unsigned int __attribute__((mode(TI))) t;
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- t = read_c0_cvmcount();
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- t = t * clocksource_mips.mult;
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- return (unsigned long long)(t >> clocksource_mips.shift);
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-#endif
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}
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void __init plat_time_init(void)
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--
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1.7.1
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@ -0,0 +1,11 @@ |
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--- a/arch/mips/pci/pci-octeon.c
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+++ b/arch/mips/pci/pci-octeon.c
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@@ -224,6 +224,8 @@ const char *octeon_get_pci_interrupts(vo
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return "AAAAAAAAAAAAAABAAAAAAAAAAAAAAABA";
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case CVMX_BOARD_TYPE_BBGW_REF:
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return "AABCD";
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+ case CVMX_BOARD_TYPE_CUST_NB5:
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+ return "ABDABAAAAAAAAAAAAAAAAAAAAAAAAAAA";
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case CVMX_BOARD_TYPE_THUNDER:
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case CVMX_BOARD_TYPE_EBH3000:
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default:
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Reference in new issue