kernel: bump to 4.4.45

Refreshed patches for all supported targets.

Compiled & tested on cns3xxx & imx6

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
master
Koen Vandeputte 8 years ago committed by Hauke Mehrtens
parent 893962bcf8
commit 4d1515070b
  1. 4
      include/kernel-version.mk
  2. 4
      target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch
  3. 2
      target/linux/cns3xxx/patches-4.4/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch
  4. 4
      target/linux/cns3xxx/patches-4.4/200-broadcom_phy_reinit.patch

@ -3,10 +3,10 @@
LINUX_RELEASE?=1
LINUX_VERSION-3.18 = .43
LINUX_VERSION-4.4 = .44
LINUX_VERSION-4.4 = .45
LINUX_KERNEL_HASH-3.18.43 = 1236e8123a6ce537d5029232560966feed054ae31776fe8481dd7d18cdd5492c
LINUX_KERNEL_HASH-4.4.44 = fabdcf2703f22a5b8aa3a3407909f18fdeea610c3d0f418fdc29123ed04de748
LINUX_KERNEL_HASH-4.4.45 = 22fb59247746a3dd109df6d1485a9972382507a3c0040ac33371b3fd2a021741
ifdef KERNEL_PATCHVER
LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))

@ -1,6 +1,6 @@
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -644,6 +644,7 @@
@@ -649,6 +649,7 @@
#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
#define AR933X_BOOTSTRAP_EEPBUSY BIT(4)
@ -8,7 +8,7 @@
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
@@ -673,6 +674,8 @@
@@ -678,6 +679,8 @@
#define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2)

@ -1,6 +1,6 @@
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -1964,7 +1964,8 @@ static void pcie_write_mrrs(struct pci_d
@@ -1966,7 +1966,8 @@ static void pcie_write_mrrs(struct pci_d
/* In the "safe" case, do not configure the MRRS. There appear to be
* issues with setting MRRS to 0 on a number of devices.
*/

@ -1,6 +1,6 @@
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -332,6 +332,11 @@ static int bcm5481_config_aneg(struct ph
@@ -362,6 +362,11 @@ static int bcm5481_config_aneg(struct ph
/* Write bits 14:0. */
reg |= (1 << 15);
phy_write(phydev, 0x18, reg);
@ -11,4 +11,4 @@
+ phy_write(phydev, 0x1c, 0xa41f);
}
return ret;
if (of_property_read_bool(np, "enet-phy-lane-swap")) {

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