ath79: ag71xx: remove PHY reset

Bit 8/12 of reset controller which is marked as PHY_RESET/SWITCH_RESET
in datasheets will trigger either a reset for builtin switch or assert
an external ETH0_RESET_L/ETH1_RESET_L pin, which are usually connected
to external PHY/switch. None of them should be triggered every time an
interface is brought up in ethernet driver.

Remove PHY reset support from ag71xx and definition for them in dtsi.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>

target/linux/ath79/dts/ar7100.dtsi

@@ -180,8 +180,8 @@
 	pll-handle = <&pll>;
 	phy-mode = "rgmii";
 
-	resets = <&rst 8>, <&rst 9>;
-	reset-names = "phy", "mac";
+	resets = <&rst 9>;
+	reset-names = "mac";
 };
 
 &mdio1 {
@@ -199,6 +199,6 @@
 
 	phy-mode = "rgmii";
 
-	resets = <&rst 12>, <&rst 13>;
-	reset-names = "phy", "mac";
+	resets = <&rst 13>;
+	reset-names = "mac";
 };

target/linux/ath79/dts/ar7161_netgear_wndr3800.dts

@@ -207,8 +207,5 @@
 
 	mtd-mac-address = <&art 0x06>;
 
-	resets = <&rst 13>;
-	reset-names = "mac";
-
 	phy-handle = <&phy4>;
 };

target/linux/ath79/dts/ar9132.dtsi

@@ -191,6 +191,6 @@
 	pll-data = <0x1a000000 0x13000a44 0x00441099>;
 	pll-reg = <0x4 0x10 17>;
 	pll-handle = <&pll>;
-	resets = <&rst 8>, <&rst 9>;
-	reset-names = "phy", "mac";
+	resets = <&rst 9>;
+	reset-names = "mac";
 };

target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts

@@ -140,9 +140,6 @@
 	phy-mode = "rgmii";
 	mtd-mac-address = <&uboot 0x1fc00>;
 
-	resets = <&rst 9>;
-	reset-names = "mac";
-
 	fixed-link {
 		speed = <1000>;
 		full-duplex;

target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h

@@ -186,7 +186,6 @@ struct ag71xx {
 	struct timer_list	oom_timer;
 
 	struct reset_control *mac_reset;
-	struct reset_control *phy_reset;
 
 	u32			fifodata[3];
 	u32			plldata[3];

target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c

@@ -423,13 +423,6 @@ static void ag71xx_hw_init(struct ag71xx *ag)
 {
 	ag71xx_hw_stop(ag);
 
-	if (ag->phy_reset) {
-		reset_control_assert(ag->phy_reset);
-		msleep(50);
-		reset_control_deassert(ag->phy_reset);
-		msleep(200);
-	}
-
 	ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
 	udelay(20);
 
@@ -1313,8 +1306,6 @@ static int ag71xx_probe(struct platform_device *pdev)
 		goto err_free;
 	}
 
-	ag->phy_reset = devm_reset_control_get_optional(&pdev->dev, "phy");
-
 	if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) {
 		if (of_device_is_compatible(np, "qca,ar9130-eth") ||
 		    of_device_is_compatible(np, "qca,ar7100-eth")) {