The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip. Its 32, 128 and 256 Mbits siblings are supported upstream but this particular size wasn't. This commit includes patches for kernels 4.14 and 4.19. Tested on a COMFAST CF-E120A v3 (ath79). Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>master
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99956528df
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -956,6 +956,7 @@ static const struct flash_info spi_nor_i
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{ "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
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{ "en25q128", INFO(0x1c3018, 0, 64 * 1024, 256, SECT_4K) },
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{ "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64, 0) },
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+ { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128, 0) },
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{ "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, 0) },
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{ "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
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{ "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128, SECT_4K) },
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--- a/drivers/mtd/spi-nor/spi-nor.c
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+++ b/drivers/mtd/spi-nor/spi-nor.c
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@@ -996,6 +996,7 @@ static const struct flash_info spi_nor_i
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{ "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
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{ "en25q128", INFO(0x1c3018, 0, 64 * 1024, 256, SECT_4K) },
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{ "en25qh32", INFO(0x1c7016, 0, 64 * 1024, 64, 0) },
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+ { "en25qh64", INFO(0x1c7017, 0, 64 * 1024, 128, 0) },
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{ "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, 0) },
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{ "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
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{ "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128, SECT_4K) },
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