SVN-Revision: 26761master
parent
f2ccc3ada5
commit
359e667fd5
@ -0,0 +1,567 @@ |
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--- a/net/wireless/reg.c
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+++ b/net/wireless/reg.c
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@@ -1456,7 +1456,8 @@ static void reg_process_hint(struct regu
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* We only time out user hints, given that they should be the only
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* source of bogus requests.
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*/
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- if (reg_request->initiator == NL80211_REGDOM_SET_BY_USER)
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+ if (r != -EALREADY &&
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+ reg_request->initiator == NL80211_REGDOM_SET_BY_USER)
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schedule_delayed_work(®_timeout, msecs_to_jiffies(3142));
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}
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--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
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@@ -18,13 +18,13 @@
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#include "hw-ops.h"
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#include "ar9003_phy.h"
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-#define MPASS 3
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#define MAX_MEASUREMENT 8
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-#define MAX_DIFFERENCE 10
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+#define MAX_MAG_DELTA 11
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+#define MAX_PHS_DELTA 10
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struct coeff {
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- int mag_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT][MPASS];
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- int phs_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT][MPASS];
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+ int mag_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
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+ int phs_coeff[AR9300_MAX_CHAINS][MAX_MEASUREMENT];
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int iqc_coeff[2];
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};
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@@ -608,36 +608,48 @@ static bool ar9003_hw_calc_iq_corr(struc
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return true;
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}
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-static bool ar9003_hw_compute_closest_pass_and_avg(int *mp_coeff, int *mp_avg)
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+static void ar9003_hw_detect_outlier(int *mp_coeff, int nmeasurement,
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+ int max_delta)
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{
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- int diff[MPASS];
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-
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- diff[0] = abs(mp_coeff[0] - mp_coeff[1]);
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- diff[1] = abs(mp_coeff[1] - mp_coeff[2]);
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- diff[2] = abs(mp_coeff[2] - mp_coeff[0]);
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-
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- if (diff[0] > MAX_DIFFERENCE &&
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- diff[1] > MAX_DIFFERENCE &&
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- diff[2] > MAX_DIFFERENCE)
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- return false;
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-
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- if (diff[0] <= diff[1] && diff[0] <= diff[2])
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- *mp_avg = (mp_coeff[0] + mp_coeff[1]) / 2;
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- else if (diff[1] <= diff[2])
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- *mp_avg = (mp_coeff[1] + mp_coeff[2]) / 2;
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- else
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- *mp_avg = (mp_coeff[2] + mp_coeff[0]) / 2;
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+ int mp_max = -64, max_idx = 0;
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+ int mp_min = 63, min_idx = 0;
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+ int mp_avg = 0, i, outlier_idx = 0;
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+
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+ /* find min/max mismatch across all calibrated gains */
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+ for (i = 0; i < nmeasurement; i++) {
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+ mp_avg += mp_coeff[i];
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+ if (mp_coeff[i] > mp_max) {
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+ mp_max = mp_coeff[i];
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+ max_idx = i;
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+ } else if (mp_coeff[i] < mp_min) {
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+ mp_min = mp_coeff[i];
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+ min_idx = i;
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+ }
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+ }
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- return true;
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+ /* find average (exclude max abs value) */
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+ for (i = 0; i < nmeasurement; i++) {
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+ if ((abs(mp_coeff[i]) < abs(mp_max)) ||
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+ (abs(mp_coeff[i]) < abs(mp_min)))
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+ mp_avg += mp_coeff[i];
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+ }
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+ mp_avg /= (nmeasurement - 1);
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+
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+ /* detect outlier */
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+ if (abs(mp_max - mp_min) > max_delta) {
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+ if (abs(mp_max - mp_avg) > abs(mp_min - mp_avg))
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+ outlier_idx = max_idx;
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+ else
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+ outlier_idx = min_idx;
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+ }
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+ mp_coeff[outlier_idx] = mp_avg;
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}
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static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
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u8 num_chains,
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struct coeff *coeff)
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{
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- struct ath_common *common = ath9k_hw_common(ah);
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int i, im, nmeasurement;
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- int magnitude, phase;
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u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS];
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memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff));
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@@ -657,37 +669,28 @@ static void ar9003_hw_tx_iqcal_load_avg_
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/* Load the average of 2 passes */
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for (i = 0; i < num_chains; i++) {
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- if (AR_SREV_9485(ah))
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- nmeasurement = REG_READ_FIELD(ah,
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- AR_PHY_TX_IQCAL_STATUS_B0_9485,
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- AR_PHY_CALIBRATED_GAINS_0);
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- else
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- nmeasurement = REG_READ_FIELD(ah,
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- AR_PHY_TX_IQCAL_STATUS_B0,
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- AR_PHY_CALIBRATED_GAINS_0);
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+ nmeasurement = REG_READ_FIELD(ah,
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+ AR_PHY_TX_IQCAL_STATUS_B0,
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+ AR_PHY_CALIBRATED_GAINS_0);
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if (nmeasurement > MAX_MEASUREMENT)
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nmeasurement = MAX_MEASUREMENT;
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- for (im = 0; im < nmeasurement; im++) {
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- /*
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- * Determine which 2 passes are closest and compute avg
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- * magnitude
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- */
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- if (!ar9003_hw_compute_closest_pass_and_avg(coeff->mag_coeff[i][im],
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- &magnitude))
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- goto disable_txiqcal;
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+ /* detect outlier only if nmeasurement > 1 */
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+ if (nmeasurement > 1) {
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+ /* Detect magnitude outlier */
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+ ar9003_hw_detect_outlier(coeff->mag_coeff[i],
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+ nmeasurement, MAX_MAG_DELTA);
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+
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+ /* Detect phase outlier */
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+ ar9003_hw_detect_outlier(coeff->phs_coeff[i],
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+ nmeasurement, MAX_PHS_DELTA);
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+ }
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- /*
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- * Determine which 2 passes are closest and compute avg
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- * phase
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- */
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- if (!ar9003_hw_compute_closest_pass_and_avg(coeff->phs_coeff[i][im],
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- &phase))
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- goto disable_txiqcal;
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+ for (im = 0; im < nmeasurement; im++) {
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- coeff->iqc_coeff[0] = (magnitude & 0x7f) |
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- ((phase & 0x7f) << 7);
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+ coeff->iqc_coeff[0] = (coeff->mag_coeff[i][im] & 0x7f) |
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+ ((coeff->phs_coeff[i][im] & 0x7f) << 7);
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if ((im % 2) == 0)
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REG_RMW_FIELD(ah, tx_corr_coeff[im][i],
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@@ -707,141 +710,37 @@ static void ar9003_hw_tx_iqcal_load_avg_
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return;
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-disable_txiqcal:
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- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3,
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- AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x0);
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- REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0,
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- AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x0);
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-
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- ath_dbg(common, ATH_DBG_CALIBRATE, "TX IQ Cal disabled\n");
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}
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-static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
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+static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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- static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
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- AR_PHY_TX_IQCAL_STATUS_B0,
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- AR_PHY_TX_IQCAL_STATUS_B1,
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- AR_PHY_TX_IQCAL_STATUS_B2,
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- };
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- static const u32 chan_info_tab[] = {
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- AR_PHY_CHAN_INFO_TAB_0,
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- AR_PHY_CHAN_INFO_TAB_1,
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- AR_PHY_CHAN_INFO_TAB_2,
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- };
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- struct coeff coeff;
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- s32 iq_res[6];
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- s32 i, j, ip, im, nmeasurement;
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- u8 nchains = get_streams(common->tx_chainmask);
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-
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- for (ip = 0; ip < MPASS; ip++) {
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- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
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- AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
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- DELPT);
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- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
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- AR_PHY_TX_IQCAL_START_DO_CAL,
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- AR_PHY_TX_IQCAL_START_DO_CAL);
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-
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- if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
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- AR_PHY_TX_IQCAL_START_DO_CAL,
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- 0, AH_WAIT_TIMEOUT)) {
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- ath_dbg(common, ATH_DBG_CALIBRATE,
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- "Tx IQ Cal not complete.\n");
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- goto TX_IQ_CAL_FAILED;
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- }
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-
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- nmeasurement = REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_STATUS_B0,
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- AR_PHY_CALIBRATED_GAINS_0);
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- if (nmeasurement > MAX_MEASUREMENT)
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- nmeasurement = MAX_MEASUREMENT;
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-
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- for (i = 0; i < nchains; i++) {
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- ath_dbg(common, ATH_DBG_CALIBRATE,
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- "Doing Tx IQ Cal for chain %d.\n", i);
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- for (im = 0; im < nmeasurement; im++) {
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- if (REG_READ(ah, txiqcal_status[i]) &
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- AR_PHY_TX_IQCAL_STATUS_FAILED) {
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- ath_dbg(common, ATH_DBG_CALIBRATE,
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- "Tx IQ Cal failed for chain %d.\n", i);
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- goto TX_IQ_CAL_FAILED;
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- }
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-
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- for (j = 0; j < 3; j++) {
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- u8 idx = 2 * j,
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- offset = 4 * (3 * im + j);
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-
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- REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
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- AR_PHY_CHAN_INFO_TAB_S2_READ,
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- 0);
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-
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- /* 32 bits */
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- iq_res[idx] = REG_READ(ah,
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- chan_info_tab[i] +
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- offset);
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-
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- REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
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- AR_PHY_CHAN_INFO_TAB_S2_READ,
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- 1);
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-
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- /* 16 bits */
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- iq_res[idx+1] = 0xffff & REG_READ(ah,
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- chan_info_tab[i] +
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- offset);
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-
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- ath_dbg(common, ATH_DBG_CALIBRATE,
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- "IQ RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
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- idx, iq_res[idx], idx+1, iq_res[idx+1]);
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- }
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-
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- if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
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- coeff.iqc_coeff)) {
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- ath_dbg(common, ATH_DBG_CALIBRATE,
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- "Failed in calculation of IQ correction.\n");
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- goto TX_IQ_CAL_FAILED;
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- }
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- coeff.mag_coeff[i][im][ip] =
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- coeff.iqc_coeff[0] & 0x7f;
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- coeff.phs_coeff[i][im][ip] =
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- (coeff.iqc_coeff[0] >> 7) & 0x7f;
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-
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- if (coeff.mag_coeff[i][im][ip] > 63)
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- coeff.mag_coeff[i][im][ip] -= 128;
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- if (coeff.phs_coeff[i][im][ip] > 63)
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- coeff.phs_coeff[i][im][ip] -= 128;
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-
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- }
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- }
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- }
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-
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- ar9003_hw_tx_iqcal_load_avg_2_passes(ah, nchains, &coeff);
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-
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- return;
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-
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-TX_IQ_CAL_FAILED:
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- ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
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-}
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-
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-static void ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
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-{
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u8 tx_gain_forced;
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- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1_9485,
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- AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT, DELPT);
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tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
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AR_PHY_TXGAIN_FORCE);
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if (tx_gain_forced)
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REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
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AR_PHY_TXGAIN_FORCE, 0);
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- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START_9485,
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- AR_PHY_TX_IQCAL_START_DO_CAL_9485, 1);
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+ REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
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+ AR_PHY_TX_IQCAL_START_DO_CAL, 1);
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+
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+ if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
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+ AR_PHY_TX_IQCAL_START_DO_CAL, 0,
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+ AH_WAIT_TIMEOUT)) {
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+ ath_dbg(common, ATH_DBG_CALIBRATE,
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+ "Tx IQ Cal is not completed.\n");
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+ return false;
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+ }
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+ return true;
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}
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static void ar9003_hw_tx_iq_cal_post_proc(struct ath_hw *ah)
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{
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struct ath_common *common = ath9k_hw_common(ah);
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const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
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- AR_PHY_TX_IQCAL_STATUS_B0_9485,
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+ AR_PHY_TX_IQCAL_STATUS_B0,
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AR_PHY_TX_IQCAL_STATUS_B1,
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AR_PHY_TX_IQCAL_STATUS_B2,
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};
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@@ -853,7 +752,7 @@ static void ar9003_hw_tx_iq_cal_post_pro
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struct coeff coeff;
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s32 iq_res[6];
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u8 num_chains = 0;
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- int i, ip, im, j;
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+ int i, im, j;
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int nmeasurement;
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for (i = 0; i < AR9300_MAX_CHAINS; i++) {
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@@ -861,71 +760,69 @@ static void ar9003_hw_tx_iq_cal_post_pro
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num_chains++;
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}
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- for (ip = 0; ip < MPASS; ip++) {
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- for (i = 0; i < num_chains; i++) {
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- nmeasurement = REG_READ_FIELD(ah,
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- AR_PHY_TX_IQCAL_STATUS_B0_9485,
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- AR_PHY_CALIBRATED_GAINS_0);
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- if (nmeasurement > MAX_MEASUREMENT)
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- nmeasurement = MAX_MEASUREMENT;
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+ for (i = 0; i < num_chains; i++) {
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+ nmeasurement = REG_READ_FIELD(ah,
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+ AR_PHY_TX_IQCAL_STATUS_B0,
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+ AR_PHY_CALIBRATED_GAINS_0);
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+ if (nmeasurement > MAX_MEASUREMENT)
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+ nmeasurement = MAX_MEASUREMENT;
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+
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+ for (im = 0; im < nmeasurement; im++) {
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+ ath_dbg(common, ATH_DBG_CALIBRATE,
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+ "Doing Tx IQ Cal for chain %d.\n", i);
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- for (im = 0; im < nmeasurement; im++) {
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+ if (REG_READ(ah, txiqcal_status[i]) &
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+ AR_PHY_TX_IQCAL_STATUS_FAILED) {
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ath_dbg(common, ATH_DBG_CALIBRATE,
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- "Doing Tx IQ Cal for chain %d.\n", i);
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-
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- if (REG_READ(ah, txiqcal_status[i]) &
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- AR_PHY_TX_IQCAL_STATUS_FAILED) {
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- ath_dbg(common, ATH_DBG_CALIBRATE,
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"Tx IQ Cal failed for chain %d.\n", i);
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- goto tx_iqcal_fail;
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- }
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+ goto tx_iqcal_fail;
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+ }
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- for (j = 0; j < 3; j++) {
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- u32 idx = 2 * j, offset = 4 * (3 * im + j);
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+ for (j = 0; j < 3; j++) {
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+ u32 idx = 2 * j, offset = 4 * (3 * im + j);
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- REG_RMW_FIELD(ah,
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+ REG_RMW_FIELD(ah,
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AR_PHY_CHAN_INFO_MEMORY,
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AR_PHY_CHAN_INFO_TAB_S2_READ,
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0);
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- /* 32 bits */
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- iq_res[idx] = REG_READ(ah,
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- chan_info_tab[i] +
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- offset);
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+ /* 32 bits */
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+ iq_res[idx] = REG_READ(ah,
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+ chan_info_tab[i] +
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+ offset);
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- REG_RMW_FIELD(ah,
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+ REG_RMW_FIELD(ah,
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AR_PHY_CHAN_INFO_MEMORY,
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AR_PHY_CHAN_INFO_TAB_S2_READ,
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1);
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- /* 16 bits */
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- iq_res[idx + 1] = 0xffff & REG_READ(ah,
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- chan_info_tab[i] + offset);
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-
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- ath_dbg(common, ATH_DBG_CALIBRATE,
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- "IQ RES[%d]=0x%x"
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- "IQ_RES[%d]=0x%x\n",
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- idx, iq_res[idx], idx + 1,
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- iq_res[idx + 1]);
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- }
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+ /* 16 bits */
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+ iq_res[idx + 1] = 0xffff & REG_READ(ah,
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+ chan_info_tab[i] + offset);
|
||||
|
||||
- if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
|
||||
- coeff.iqc_coeff)) {
|
||||
- ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
- "Failed in calculation of IQ correction.\n");
|
||||
- goto tx_iqcal_fail;
|
||||
- }
|
||||
+ ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
+ "IQ RES[%d]=0x%x"
|
||||
+ "IQ_RES[%d]=0x%x\n",
|
||||
+ idx, iq_res[idx], idx + 1,
|
||||
+ iq_res[idx + 1]);
|
||||
+ }
|
||||
|
||||
- coeff.mag_coeff[i][im][ip] =
|
||||
- coeff.iqc_coeff[0] & 0x7f;
|
||||
- coeff.phs_coeff[i][im][ip] =
|
||||
- (coeff.iqc_coeff[0] >> 7) & 0x7f;
|
||||
-
|
||||
- if (coeff.mag_coeff[i][im][ip] > 63)
|
||||
- coeff.mag_coeff[i][im][ip] -= 128;
|
||||
- if (coeff.phs_coeff[i][im][ip] > 63)
|
||||
- coeff.phs_coeff[i][im][ip] -= 128;
|
||||
+ if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
|
||||
+ coeff.iqc_coeff)) {
|
||||
+ ath_dbg(common, ATH_DBG_CALIBRATE,
|
||||
+ "Failed in calculation of \
|
||||
+ IQ correction.\n");
|
||||
+ goto tx_iqcal_fail;
|
||||
}
|
||||
+
|
||||
+ coeff.mag_coeff[i][im] = coeff.iqc_coeff[0] & 0x7f;
|
||||
+ coeff.phs_coeff[i][im] =
|
||||
+ (coeff.iqc_coeff[0] >> 7) & 0x7f;
|
||||
+
|
||||
+ if (coeff.mag_coeff[i][im] > 63)
|
||||
+ coeff.mag_coeff[i][im] -= 128;
|
||||
+ if (coeff.phs_coeff[i][im] > 63)
|
||||
+ coeff.phs_coeff[i][im] -= 128;
|
||||
}
|
||||
}
|
||||
ar9003_hw_tx_iqcal_load_avg_2_passes(ah, num_chains, &coeff);
|
||||
@@ -941,6 +838,7 @@ static bool ar9003_hw_init_cal(struct at
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
int val;
|
||||
+ bool txiqcal_done = false;
|
||||
|
||||
val = REG_READ(ah, AR_ENT_OTP);
|
||||
ath_dbg(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val);
|
||||
@@ -957,14 +855,22 @@ static bool ar9003_hw_init_cal(struct at
|
||||
ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
|
||||
|
||||
/* Do Tx IQ Calibration */
|
||||
- if (AR_SREV_9485(ah))
|
||||
- ar9003_hw_tx_iq_cal_run(ah);
|
||||
- else
|
||||
- ar9003_hw_tx_iq_cal(ah);
|
||||
+ REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
|
||||
+ AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
|
||||
+ DELPT);
|
||||
|
||||
- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
|
||||
- udelay(5);
|
||||
- REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
|
||||
+ /*
|
||||
+ * For AR9485 or later chips, TxIQ cal runs as part of
|
||||
+ * AGC calibration
|
||||
+ */
|
||||
+ if (AR_SREV_9485_OR_LATER(ah))
|
||||
+ txiqcal_done = true;
|
||||
+ else {
|
||||
+ txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
|
||||
+ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
|
||||
+ udelay(5);
|
||||
+ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
|
||||
+ }
|
||||
|
||||
/* Calibrate the AGC */
|
||||
REG_WRITE(ah, AR_PHY_AGC_CONTROL,
|
||||
@@ -979,7 +885,7 @@ static bool ar9003_hw_init_cal(struct at
|
||||
return false;
|
||||
}
|
||||
|
||||
- if (AR_SREV_9485(ah))
|
||||
+ if (txiqcal_done)
|
||||
ar9003_hw_tx_iq_cal_post_proc(ah);
|
||||
|
||||
/* Revert chainmasks to their original values before NF cal */
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
@@ -548,15 +548,12 @@
|
||||
|
||||
#define AR_PHY_TXGAIN_TABLE (AR_SM_BASE + 0x300)
|
||||
|
||||
-#define AR_PHY_TX_IQCAL_START_9485 (AR_SM_BASE + 0x3c4)
|
||||
-#define AR_PHY_TX_IQCAL_START_DO_CAL_9485 0x80000000
|
||||
-#define AR_PHY_TX_IQCAL_START_DO_CAL_9485_S 31
|
||||
-#define AR_PHY_TX_IQCAL_CONTROL_1_9485 (AR_SM_BASE + 0x3c8)
|
||||
-#define AR_PHY_TX_IQCAL_STATUS_B0_9485 (AR_SM_BASE + 0x3f0)
|
||||
-
|
||||
-#define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + 0x448)
|
||||
-#define AR_PHY_TX_IQCAL_START (AR_SM_BASE + 0x440)
|
||||
-#define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + 0x48c)
|
||||
+#define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + AR_SREV_9485(ah) ? \
|
||||
+ 0x3c8 : 0x448)
|
||||
+#define AR_PHY_TX_IQCAL_START (AR_SM_BASE + AR_SREV_9485(ah) ? \
|
||||
+ 0x3c4 : 0x440)
|
||||
+#define AR_PHY_TX_IQCAL_STATUS_B0 (AR_SM_BASE + AR_SREV_9485(ah) ? \
|
||||
+ 0x3f0 : 0x48c)
|
||||
#define AR_PHY_TX_IQCAL_CORR_COEFF_B0(_i) (AR_SM_BASE + \
|
||||
(AR_SREV_9485(ah) ? \
|
||||
0x3d0 : 0x450) + ((_i) << 2))
|
||||
@@ -758,10 +755,10 @@
|
||||
#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000
|
||||
#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24
|
||||
#define AR_PHY_CHANNEL_STATUS_RX_CLEAR 0x00000004
|
||||
-#define AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT 0x01fc0000
|
||||
-#define AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S 18
|
||||
-#define AR_PHY_TX_IQCAL_START_DO_CAL 0x00000001
|
||||
-#define AR_PHY_TX_IQCAL_START_DO_CAL_S 0
|
||||
+#define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT 0x01fc0000
|
||||
+#define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S 18
|
||||
+#define AR_PHY_TX_IQCAL_START_DO_CAL 0x00000001
|
||||
+#define AR_PHY_TX_IQCAL_START_DO_CAL_S 0
|
||||
|
||||
#define AR_PHY_TX_IQCAL_STATUS_FAILED 0x00000001
|
||||
#define AR_PHY_CALIBRATED_GAINS_0 0x3e
|
||||
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
|
||||
@@ -453,6 +453,7 @@ void ath9k_btcoex_timer_pause(struct ath
|
||||
|
||||
#define ATH_LED_PIN_DEF 1
|
||||
#define ATH_LED_PIN_9287 8
|
||||
+#define ATH_LED_PIN_9300 10
|
||||
#define ATH_LED_PIN_9485 6
|
||||
|
||||
#ifdef CONFIG_MAC80211_LEDS
|
||||
--- a/drivers/net/wireless/ath/ath9k/gpio.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/gpio.c
|
||||
@@ -46,6 +46,8 @@ void ath_init_leds(struct ath_softc *sc)
|
||||
sc->sc_ah->led_pin = ATH_LED_PIN_9287;
|
||||
else if (AR_SREV_9485(sc->sc_ah))
|
||||
sc->sc_ah->led_pin = ATH_LED_PIN_9485;
|
||||
+ else if (AR_SREV_9300(sc->sc_ah))
|
||||
+ sc->sc_ah->led_pin = ATH_LED_PIN_9300;
|
||||
else
|
||||
sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
|
||||
}
|
||||
--- a/drivers/net/wireless/ath/ath9k/reg.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/reg.h
|
||||
@@ -868,6 +868,8 @@
|
||||
#define AR_SREV_9485_11(_ah) \
|
||||
(AR_SREV_9485(_ah) && \
|
||||
((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11))
|
||||
+#define AR_SREV_9485_OR_LATER(_ah) \
|
||||
+ (((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9485))
|
||||
|
||||
#define AR_SREV_9285E_20(_ah) \
|
||||
(AR_SREV_9285_12_OR_LATER(_ah) && \
|
||||
--- a/net/mac80211/rx.c
|
||||
+++ b/net/mac80211/rx.c
|
||||
@@ -652,7 +652,7 @@ static void ieee80211_sta_reorder_releas
|
||||
set_release_timer:
|
||||
|
||||
mod_timer(&tid_agg_rx->reorder_timer,
|
||||
- tid_agg_rx->reorder_time[j] +
|
||||
+ tid_agg_rx->reorder_time[j] + 1 +
|
||||
HT_RX_REORDER_BUF_TIMEOUT);
|
||||
} else {
|
||||
del_timer(&tid_agg_rx->reorder_timer);
|
@ -1,63 +0,0 @@ |
||||
--- a/net/wireless/reg.c
|
||||
+++ b/net/wireless/reg.c
|
||||
@@ -107,9 +107,6 @@ struct reg_beacon {
|
||||
static void reg_todo(struct work_struct *work);
|
||||
static DECLARE_WORK(reg_work, reg_todo);
|
||||
|
||||
-static void reg_timeout_work(struct work_struct *work);
|
||||
-static DECLARE_DELAYED_WORK(reg_timeout, reg_timeout_work);
|
||||
-
|
||||
/* We keep a static world regulatory domain in case of the absence of CRDA */
|
||||
static const struct ieee80211_regdomain world_regdom = {
|
||||
.n_reg_rules = 5,
|
||||
@@ -1334,9 +1331,6 @@ static void reg_set_request_processed(vo
|
||||
need_more_processing = true;
|
||||
spin_unlock(®_requests_lock);
|
||||
|
||||
- if (last_request->initiator == NL80211_REGDOM_SET_BY_USER)
|
||||
- cancel_delayed_work_sync(®_timeout);
|
||||
-
|
||||
if (need_more_processing)
|
||||
schedule_work(®_work);
|
||||
}
|
||||
@@ -1447,17 +1441,8 @@ static void reg_process_hint(struct regu
|
||||
r = __regulatory_hint(wiphy, reg_request);
|
||||
/* This is required so that the orig_* parameters are saved */
|
||||
if (r == -EALREADY && wiphy &&
|
||||
- wiphy->flags & WIPHY_FLAG_STRICT_REGULATORY) {
|
||||
+ wiphy->flags & WIPHY_FLAG_STRICT_REGULATORY)
|
||||
wiphy_update_regulatory(wiphy, initiator);
|
||||
- return;
|
||||
- }
|
||||
-
|
||||
- /*
|
||||
- * We only time out user hints, given that they should be the only
|
||||
- * source of bogus requests.
|
||||
- */
|
||||
- if (reg_request->initiator == NL80211_REGDOM_SET_BY_USER)
|
||||
- schedule_delayed_work(®_timeout, msecs_to_jiffies(3142));
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -2185,13 +2170,6 @@ out:
|
||||
mutex_unlock(®_mutex);
|
||||
}
|
||||
|
||||
-static void reg_timeout_work(struct work_struct *work)
|
||||
-{
|
||||
- REG_DBG_PRINT("Timeout while waiting for CRDA to reply, "
|
||||
- "restoring regulatory settings");
|
||||
- restore_regulatory_settings(true);
|
||||
-}
|
||||
-
|
||||
int __init regulatory_init(void)
|
||||
{
|
||||
int err = 0;
|
||||
@@ -2245,7 +2223,6 @@ void /* __init_or_exit */ regulatory_exi
|
||||
struct reg_beacon *reg_beacon, *btmp;
|
||||
|
||||
cancel_work_sync(®_work);
|
||||
- cancel_delayed_work_sync(®_timeout);
|
||||
|
||||
mutex_lock(&cfg80211_mutex);
|
||||
mutex_lock(®_mutex);
|
Loading…
Reference in new issue