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@ -54,7 +54,7 @@ struct vlynq_pci_private { |
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static struct vlynq_pci_config known_devices[] = { |
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{ |
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.chip_id = 0x00000009, .name = "TI ACX111", |
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.chip_id = 0x00000009, .name = "TI TNETW1130", |
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.rx_mapping = { |
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{ .size = 0x22000, .offset = 0xf0000000 }, |
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{ .size = 0x40000, .offset = 0xc0000000 }, |
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@ -65,9 +65,41 @@ static struct vlynq_pci_config known_devices[] = { |
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.irq_type = IRQ_TYPE_EDGE_RISING, |
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.class = PCI_CLASS_NETWORK_OTHER, |
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.num_regs = 5, |
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.regs = {
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{ .offset = 0x790, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) }, |
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{ .offset = 0x794, .value = (0xd0000000 - (ARCH_PFN_OFFSET << PAGE_SHIFT)) }, |
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.regs = { |
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{ |
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.offset = 0x790, |
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.value = (0xd0000000 - PHYS_OFFSET) |
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}, |
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{ |
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.offset = 0x794, |
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.value = (0xd0000000 - PHYS_OFFSET) |
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}, |
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{ .offset = 0x740, .value = 0 }, |
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{ .offset = 0x744, .value = 0x00010000 }, |
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{ .offset = 0x764, .value = 0x00010000 }, |
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}, |
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}, |
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{ |
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.chip_id = 0x00000029, .name = "TI TNETW1350", |
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.rx_mapping = { |
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{ .size = 0x100000, .offset = 0x00300000 }, |
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{ .size = 0x80000, .offset = 0x00000000 }, |
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{ .size = 0x0, .offset = 0x0 }, |
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{ .size = 0x0, .offset = 0x0 }, |
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}, |
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.irq = 0, .chip = 0x9066104c, |
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.irq_type = IRQ_TYPE_EDGE_RISING, |
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.class = PCI_CLASS_NETWORK_OTHER, |
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.num_regs = 5, |
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.regs = { |
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{ |
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.offset = 0x790, |
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.value = (0x60000000 - PHYS_OFFSET) |
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}, |
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{ |
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.offset = 0x794, |
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.value = (0x60000000 - PHYS_OFFSET) |
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}, |
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{ .offset = 0x740, .value = 0 }, |
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{ .offset = 0x744, .value = 0x00010000 }, |
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{ .offset = 0x764, .value = 0x00010000 }, |
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@ -328,8 +360,8 @@ static int vlynq_pci_probe(struct vlynq_device *dev) |
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} |
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for (i = 0; i < config->num_regs; i++) |
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*(volatile u32 *)(addr + config->regs[i].offset) = |
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config->regs[i].value; |
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iowrite32(config->regs[i].value, |
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(u32 *)(addr + config->regs[i].offset)); |
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dev->priv = priv; |
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for (i = 0; i < VLYNQ_PCI_SLOTS; i++) { |
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