Changelog: * https://www.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.1.6 Signed-off-by: Jonas Gorski <jogo@openwrt.org> SVN-Revision: 46713master
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From 1b02e59087d3de3953d3fa0536356e3e137bf74b Mon Sep 17 00:00:00 2001
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From: Florian Fainelli <f.fainelli@gmail.com>
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Date: Tue, 28 Jul 2015 19:24:24 -0700
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Subject: [PATCH] Revert "MIPS: BCM63xx: Provide a plat_post_dma_flush hook"
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This reverts commit 3cf29543413207d3ab1c3f62a88c09bb46f2264e ("MIPS:
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BCM63xx: Provide a plat_post_dma_flush hook") since this commit was
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found to prevent BCM6358 (early BMIPS4350 cores) and some BCM6368
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(BMIPS4380 cores) from booting reliably.
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Alvaro was able to track this down to an issue specifically located to
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devices that use the second thread (TP1) when booting. Since BCM63xx did
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not have a need for plat_post_dma_flush() hook before, let's just keep
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things the way they were.
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CC: stable@vger.kernel.org
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CC: Kevin Cernekee <cernekee@gmail.com>
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CC: Nicolas Schichan <nschichan@freebox.fr>
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Reported-by: Álvaro Fernández Rojas <noltari@gmail.com>
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Reported-by: Jonas Gorski <jogo@openwrt.org>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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arch/mips/include/asm/mach-bcm63xx/dma-coherence.h | 10 ----------
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1 file changed, 10 deletions(-)
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delete mode 100644 arch/mips/include/asm/mach-bcm63xx/dma-coherence.h
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--- a/arch/mips/include/asm/mach-bcm63xx/dma-coherence.h
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+++ /dev/null
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@@ -1,10 +0,0 @@
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-#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H
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-#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H
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-
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-#include <asm/bmips.h>
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-
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-#define plat_post_dma_flush bmips_post_dma_flush
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-
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-#include <asm/mach-generic/dma-coherence.h>
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-
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-#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */
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@ -1,35 +0,0 @@ |
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From: Felix Fietkau <nbd@openwrt.org>
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Date: Sun, 19 Jul 2015 00:21:57 +0200
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Subject: [PATCH] MIPS: kernel: fix sched_getaffinity with MT FPAFF enabled
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p->thread.user_cpus_allowed is zero-initialized and is only filled on
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the first sched_setaffinity call.
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To avoid adding overhead in the task initialization codepath, simply OR
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the returned mask in sched_getaffinity with p->cpus_allowed.
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Cc: stable@vger.kernel.org
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Signed-off-by: Felix Fietkau <nbd@openwrt.org>
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---
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--- a/arch/mips/kernel/mips-mt-fpaff.c
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+++ b/arch/mips/kernel/mips-mt-fpaff.c
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@@ -154,7 +154,7 @@ asmlinkage long mipsmt_sys_sched_getaffi
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unsigned long __user *user_mask_ptr)
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{
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unsigned int real_len;
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- cpumask_t mask;
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+ cpumask_t allowed, mask;
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int retval;
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struct task_struct *p;
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@@ -173,7 +173,8 @@ asmlinkage long mipsmt_sys_sched_getaffi
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if (retval)
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goto out_unlock;
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- cpumask_and(&mask, &p->thread.user_cpus_allowed, cpu_possible_mask);
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+ cpumask_or(&allowed, &p->thread.user_cpus_allowed, &p->cpus_allowed);
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+ cpumask_and(&mask, &allowed, cpu_active_mask);
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out_unlock:
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read_unlock(&tasklist_lock);
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From f8ff99a839ed05e1e4993b543357183b095b77f1 Mon Sep 17 00:00:00 2001
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From: Michal Suchanek <hramrach@gmail.com>
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Date: Thu, 1 Jan 2015 16:44:45 +0100
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Subject: [PATCH] mtd: nand: Fix NAND_* options to use unique values.
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NAND_BUSWIDTH_AUTO (64b37b2a6) and NAND_USE_BOUNCE_BUFFER (66507c7bc)
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are the same value. Change the later introduced NAND_USE_BOUNCE_BUFFER
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to a different value.
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Signed-off-by: Michal Suchanek <hramrach@gmail.com>
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Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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---
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include/linux/mtd/nand.h | 12 ++++++------
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1 file changed, 6 insertions(+), 6 deletions(-)
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--- a/include/linux/mtd/nand.h
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+++ b/include/linux/mtd/nand.h
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@@ -176,17 +176,17 @@ typedef enum {
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/* Chip may not exist, so silence any errors in scan */
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#define NAND_SCAN_SILENT_NODEV 0x00040000
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/*
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- * This option could be defined by controller drivers to protect against
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- * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers
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- */
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-#define NAND_USE_BOUNCE_BUFFER 0x00080000
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-/*
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* Autodetect nand buswidth with readid/onfi.
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* This suppose the driver will configure the hardware in 8 bits mode
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* when calling nand_scan_ident, and update its configuration
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* before calling nand_scan_tail.
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*/
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-#define NAND_BUSWIDTH_AUTO 0x00080000
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+#define NAND_BUSWIDTH_AUTO 0x00080000
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+/*
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+ * This option could be defined by controller drivers to protect against
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+ * kmap'ed, vmalloc'ed highmem buffers being passed from upper layers
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+ */
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+#define NAND_USE_BOUNCE_BUFFER 0x00100000
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/* Options set by nand scan */
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/* Nand scan has allocated controller struct */
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