Remove old irq map patch and replace it with the propper upstream patches allowing IMX6 PCIe devices behind PCIe switches to work properly. Signed-off-by: Tim Harvey <tharvey@gateworks.com> SVN-Revision: 41004master
Luka Perkov
10 years ago
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2ecdc86b4d
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@ -0,0 +1,55 @@ |
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commit d644122d8420c425fdf5c74e50d440d5f146bc0c
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Author: Tim Harvey <tharvey@gateworks.com>
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Date: Thu Mar 13 09:37:51 2014 -0700
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ARM: dts: imx: fix invalid #address-cells value
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The invalid value of #address-cells in the imx6 pcie host controller node
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causes of_irq_parse_raw() to incorrectly advance through an interrupt-map
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table of more than one interrupt. We also take the opportunity to drop the
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unused #size-cells here.
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This patch resolves this issue and allows proper interrupt mapping for an
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imx6 pcie host connected to a P2P bridge when using legacy interrupts.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
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Cc: Jingoo Han <jg1.han@samsung.com>
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Cc: Lucas Stach <l.stach@pengutronix.de>
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Cc: Mark Rutland <mark.rutland@arm.com>
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Cc: linux-samsung-soc <linux-samsung-soc@vger.kernel.org>
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Cc: Richard Zhu <r65037@freescale.com>
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Cc: Sascha Hauer <kernel@pengutronix.de>
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Cc: Arnd Bergmann <arnd@arndb.de>
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Cc: Stephen Warren <swarren@wwwdotorg.org>
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Cc: Bjorn Helgaas <bhelgaas@google.com>
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Cc: Simon Horman <horms@verge.net.au>
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Cc: Thierry Reding <thierry.reding@gmail.com>
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Cc: Ben Dooks <ben-linux@fluff.org>
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Cc: linux-tegra <linux-tegra@vger.kernel.org>
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Cc: Kukjin Kim <kgene.kim@samsung.com>
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Cc: Shawn Guo <shawn.guo@linaro.org>
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Cc: Grant Likely <grant.likely@linaro.org>
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--- a/arch/arm/boot/dts/imx6qdl.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl.dtsi
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@@ -38,8 +38,6 @@
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intc: interrupt-controller@00a01000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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- #address-cells = <1>;
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- #size-cells = <1>;
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interrupt-controller;
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reg = <0x00a01000 0x1000>,
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<0x00a00100 0x100>;
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--- a/arch/arm/boot/dts/imx6sl.dtsi
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+++ b/arch/arm/boot/dts/imx6sl.dtsi
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@@ -44,8 +44,6 @@
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intc: interrupt-controller@00a01000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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- #address-cells = <1>;
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- #size-cells = <1>;
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interrupt-controller;
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reg = <0x00a01000 0x1000>,
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<0x00a00100 0x100>;
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@ -0,0 +1,58 @@ |
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commit 62fe03d1dd629a98c6da86cabb2a98b85e89d516
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Author: Lucas Stach <l.stach@pengutronix.de>
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Date: Wed Mar 5 14:25:51 2014 +0100
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PCI: designware: use new OF interrupt mapping when possible
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This is the recommended method of doing the IRQ
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mapping. For old devicetrees we fall back to the
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previous practice.
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Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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Acked-by: Arnd Bergmann <arnd@arndb.de>
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Acked-by: Jingoo Han <jg1.han@samsung.com>
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Reviewed-by: Marek Vasut <marex@denx.de>
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -17,6 +17,7 @@
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#include <linux/module.h>
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#include <linux/msi.h>
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#include <linux/of_address.h>
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+#include <linux/of_pci.h>
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#include <linux/pci.h>
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#include <linux/pci_regs.h>
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#include <linux/types.h>
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@@ -492,7 +493,7 @@ int __init dw_pcie_host_init(struct pcie
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dw_pci.nr_controllers = 1;
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dw_pci.private_data = (void **)&pp;
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- pci_common_init(&dw_pci);
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+ pci_common_init_dev(pp->dev, &dw_pci);
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pci_assign_unassigned_resources();
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#ifdef CONFIG_PCI_DOMAINS
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dw_pci.domain++;
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@@ -725,7 +726,7 @@ static struct pci_bus *dw_pcie_scan_bus(
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if (pp) {
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pp->root_bus_nr = sys->busnr;
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- bus = pci_scan_root_bus(NULL, sys->busnr, &dw_pcie_ops,
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+ bus = pci_scan_root_bus(pp->dev, sys->busnr, &dw_pcie_ops,
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sys, &sys->resources);
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} else {
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bus = NULL;
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@@ -738,8 +739,13 @@ static struct pci_bus *dw_pcie_scan_bus(
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static int dw_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
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+ int irq;
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- return pp->irq;
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+ irq = of_irq_parse_and_map_pci(dev, slot, pin);
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+ if (!irq)
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+ irq = pp->irq;
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+
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+ return irq;
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}
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static void dw_pcie_add_bus(struct pci_bus *bus)
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@ -0,0 +1,38 @@ |
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From 07134a365f1c4be6e840a00ae452d1593f15c5fc Mon Sep 17 00:00:00 2001
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From: Lucas Stach <l.stach@pengutronix.de>
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Date: Wed, 5 Mar 2014 14:25:50 +0100
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Subject: [PATCH] ARM: dts: imx6: add PCIe interrupt mapping properties
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As defined by the common PCI bindings.
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Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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Acked-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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---
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arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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--- a/arch/arm/boot/dts/imx6qdl.dtsi
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+++ b/arch/arm/boot/dts/imx6qdl.dtsi
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@@ -10,6 +10,8 @@
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* http://www.gnu.org/copyleft/gpl.html
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*/
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+
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#include "skeleton.dtsi"
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/ {
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@@ -125,6 +127,12 @@
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0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
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num-lanes = <1>;
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interrupts = <0 123 0x04>;
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+ #interrupt-cells = <1>;
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+ interrupt-map-mask = <0 0 0 0x7>;
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+ interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
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+ <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
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+ <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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+ <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
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clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
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status = "disabled";
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@ -1,43 +0,0 @@ |
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From: Tim Harvey <tharvey@gateworks.com>
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Subject: [PATCH] PCI: imx6: add support for legacy irqs
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The i.MX6 supports legacy IRQ's via 155,154,153,152. When devices
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are behind a PCIe-to-PCIe switch (at least for the TI XIO2001) the
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mapping is reversed from when they are behind a PCIe switch.
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This patch still needs some review and clarification before going
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upstream.
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---
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drivers/pci/host/pcie-designware.c | 21 ++++++++++++++++++++-
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1 file changed, 20 insertions(+), 1 deletion(-)
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--- a/drivers/pci/host/pcie-designware.c
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+++ b/drivers/pci/host/pcie-designware.c
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@@ -739,7 +739,26 @@ static int dw_pcie_map_irq(const struct
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{
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struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
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- return pp->irq;
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+ /* TI XIO2001 PCIe-to-PCI bridge IRQs are flipped it seems */
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+ if ( dev->bus && dev->bus->self
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+ && (dev->bus->self->vendor == 0x104c)
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+ && (dev->bus->self->device == 0x8240)) {
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+ switch (pin) {
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+ case 1: return pp->irq - 3;
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+ case 2: return pp->irq - 2;
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+ case 3: return pp->irq - 1;
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+ case 4: return pp->irq;
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+ default: return -1;
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+ }
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+ } else {
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+ switch (pin) {
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+ case 1: return pp->irq;
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+ case 2: return pp->irq - 1;
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+ case 3: return pp->irq - 2;
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+ case 4: return pp->irq - 3;
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+ default: return -1;
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+ }
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+ }
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}
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static void dw_pcie_add_bus(struct pci_bus *bus)
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