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@ -69,6 +69,8 @@ |
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#define RTL8366S_GLOBAL_MIB_COUNT 1 |
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#define RTL8366S_MIB_COUNTER_PORT_OFFSET 0x0040 |
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#define RTL8366S_MIB_COUNTER_BASE 0x1000 |
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#define RTL8366S_MIB_COUNTER_PORT_OFFSET2 0x0008 |
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#define RTL8366S_MIB_COUNTER_BASE2 0x1180 |
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#define RTL8366S_MIB_CTRL_REG 0x11F0 |
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#define RTL8366S_MIB_CTRL_USER_MASK 0x01FF |
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#define RTL8366S_MIB_CTRL_BUSY_MASK 0x0001 |
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@ -181,45 +183,51 @@ u16 g_dbg_reg; |
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#endif |
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struct mib_counter { |
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unsigned base; |
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unsigned offset; |
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unsigned length; |
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const char *name; |
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}; |
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static struct mib_counter rtl8366s_mib_counters[RTL8366S_MIB_COUNT] = { |
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{ 0, 4, "IfInOctets" }, |
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{ 4, 4, "EtherStatsOctets" }, |
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{ 8, 2, "EtherStatsUnderSizePkts" }, |
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{ 10, 2, "EtherFragments" }, |
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{ 12, 2, "EtherStatsPkts64Octets" }, |
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{ 14, 2, "EtherStatsPkts65to127Octets" }, |
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{ 16, 2, "EtherStatsPkts128to255Octets" }, |
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{ 18, 2, "EtherStatsPkts256to511Octets" }, |
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{ 20, 2, "EtherStatsPkts512to1023Octets" }, |
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{ 22, 2, "EtherStatsPkts1024to1518Octets" }, |
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{ 24, 2, "EtherOversizeStats" }, |
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{ 26, 2, "EtherStatsJabbers" }, |
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{ 28, 2, "IfInUcastPkts" }, |
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{ 30, 2, "EtherStatsMulticastPkts" }, |
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{ 32, 2, "EtherStatsBroadcastPkts" }, |
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{ 34, 2, "EtherStatsDropEvents" }, |
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{ 36, 2, "Dot3StatsFCSErrors" }, |
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{ 38, 2, "Dot3StatsSymbolErrors" }, |
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{ 40, 2, "Dot3InPauseFrames" }, |
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{ 42, 2, "Dot3ControlInUnknownOpcodes" }, |
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{ 44, 4, "IfOutOctets" }, |
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{ 48, 2, "Dot3StatsSingleCollisionFrames" }, |
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{ 50, 2, "Dot3StatMultipleCollisionFrames" }, |
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{ 52, 2, "Dot3sDeferredTransmissions" }, |
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{ 54, 2, "Dot3StatsLateCollisions" }, |
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{ 56, 2, "EtherStatsCollisions" }, |
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{ 58, 2, "Dot3StatsExcessiveCollisions" }, |
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{ 60, 2, "Dot3OutPauseFrames" }, |
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{ 62, 2, "Dot1dBasePortDelayExceededDiscards" }, |
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{ 64, 2, "Dot1dTpPortInDiscards" }, |
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{ 66, 2, "IfOutUcastPkts" }, |
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{ 68, 2, "IfOutMulticastPkts" }, |
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{ 70, 2, "IfOutBroadcastPkts" }, |
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{ 0, 0, 4, "IfInOctets" }, |
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{ 0, 4, 4, "EtherStatsOctets" }, |
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{ 0, 8, 2, "EtherStatsUnderSizePkts" }, |
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{ 0, 10, 2, "EtherFragments" }, |
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{ 0, 12, 2, "EtherStatsPkts64Octets" }, |
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{ 0, 14, 2, "EtherStatsPkts65to127Octets" }, |
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{ 0, 16, 2, "EtherStatsPkts128to255Octets" }, |
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{ 0, 18, 2, "EtherStatsPkts256to511Octets" }, |
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{ 0, 20, 2, "EtherStatsPkts512to1023Octets" }, |
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{ 0, 22, 2, "EtherStatsPkts1024to1518Octets" }, |
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{ 0, 24, 2, "EtherOversizeStats" }, |
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{ 0, 26, 2, "EtherStatsJabbers" }, |
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{ 0, 28, 2, "IfInUcastPkts" }, |
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{ 0, 30, 2, "EtherStatsMulticastPkts" }, |
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{ 0, 32, 2, "EtherStatsBroadcastPkts" }, |
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{ 0, 34, 2, "EtherStatsDropEvents" }, |
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{ 0, 36, 2, "Dot3StatsFCSErrors" }, |
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{ 0, 38, 2, "Dot3StatsSymbolErrors" }, |
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{ 0, 40, 2, "Dot3InPauseFrames" }, |
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{ 0, 42, 2, "Dot3ControlInUnknownOpcodes" }, |
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{ 0, 44, 4, "IfOutOctets" }, |
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{ 0, 48, 2, "Dot3StatsSingleCollisionFrames" }, |
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{ 0, 50, 2, "Dot3StatMultipleCollisionFrames" }, |
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{ 0, 52, 2, "Dot3sDeferredTransmissions" }, |
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{ 0, 54, 2, "Dot3StatsLateCollisions" }, |
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{ 0, 56, 2, "EtherStatsCollisions" }, |
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{ 0, 58, 2, "Dot3StatsExcessiveCollisions" }, |
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{ 0, 60, 2, "Dot3OutPauseFrames" }, |
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{ 0, 62, 2, "Dot1dBasePortDelayExceededDiscards" }, |
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/*
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* The following counters are accessible at a different |
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* base address. |
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*/ |
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{ 1, 0, 2, "Dot1dTpPortInDiscards" }, |
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{ 1, 2, 2, "IfOutUcastPkts" }, |
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{ 1, 4, 2, "IfOutMulticastPkts" }, |
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{ 1, 6, 2, "IfOutBroadcastPkts" }, |
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}; |
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static inline struct rtl8366s *smi_to_rtl8366s(struct rtl8366_smi *smi) |
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@ -339,9 +347,22 @@ static int rtl8366_get_mib_counter(struct rtl8366_smi *smi, int counter, |
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if (port > RTL8366_NUM_PORTS || counter >= RTL8366S_MIB_COUNT) |
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return -EINVAL; |
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addr = RTL8366S_MIB_COUNTER_BASE + |
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RTL8366S_MIB_COUNTER_PORT_OFFSET * (port) + |
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rtl8366s_mib_counters[counter].offset; |
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switch (rtl8366s_mib_counters[counter].base) { |
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case 0: |
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addr = RTL8366S_MIB_COUNTER_BASE + |
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RTL8366S_MIB_COUNTER_PORT_OFFSET * port; |
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break; |
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case 1: |
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addr = RTL8366S_MIB_COUNTER_BASE2 + |
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RTL8366S_MIB_COUNTER_PORT_OFFSET2 * port; |
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break; |
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default: |
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return -EINVAL; |
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} |
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addr += rtl8366s_mib_counters[counter].offset; |
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/*
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* Writing access counter address first |
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