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@ -37,7 +37,7 @@ |
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+obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
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--- /dev/null
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+++ b/arch/mips/lantiq/xway/mach-arv45xx.c
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@@ -0,0 +1,465 @@
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@@ -0,0 +1,514 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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@ -56,6 +56,8 @@ |
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+#include <linux/mtd/physmap.h>
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+#include <linux/input.h>
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+#include <linux/etherdevice.h>
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+#include <linux/ath5k_platform.h>
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+#include <linux/pci.h>
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+
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+#include <machine.h>
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+
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@ -315,6 +317,47 @@ |
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+ lq_register_ethernet(&lq_eth_data);
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+}
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+
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+static u16 arv45xx_ath5k_eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
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+static struct ath5k_platform_data arv45xx_ath5k_platform_data;
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+
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+static int arv45xx_pci_plat_dev_init(struct pci_dev *dev)
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+{
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+ dev->dev.platform_data = &arv45xx_ath5k_platform_data;
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+ return 0;
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+}
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+
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+void __init
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+arv45xx_register_ath5k(void)
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+{
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+#define ARV45XX_BRN_ATH 0x3f0478
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+ int i;
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+ unsigned char eeprom_mac[6];
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+ u16 eeprom_data[ATH5K_PLAT_EEP_MAX_WORDS];
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+ u32 *p = (u32*)arv45xx_ath5k_eeprom_data;
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+
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+ memcpy_fromio(eeprom_mac,
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+ (void *)KSEG1ADDR(LQ_FLASH_START + ARV45XX_BRN_MAC), 6);
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+ eeprom_mac[5]++;
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+ memcpy_fromio(arv45xx_ath5k_eeprom_data,
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+ (void *)KSEG1ADDR(LQ_FLASH_START + ARV45XX_BRN_ATH), ATH5K_PLAT_EEP_MAX_WORDS);
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+ // swap eeprom bytes
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+ for (i = 0; i < ATH5K_PLAT_EEP_MAX_WORDS>>1; i++){
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+ //arv4518_ath5k_eeprom_data[i] = ((eeprom_data[i]&0xff)<<8)|((eeprom_data[i]&0xff00)>>8);
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+ p[i] = ((eeprom_data[(i<<1)+1]&0xff)<<24)|((eeprom_data[(i<<1)+1]&0xff00)<<8)|((eeprom_data[i<<1]&0xff)<<8)|((eeprom_data[i<<1]&0xff00)>>8);
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+ if (i == 0xbf>>1){
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+ // printk ("regdomain: 0x%x --> 0x%x\n", p[i], (p[i] & 0xffff0000)|0x67);
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+ /* regdomain is invalid?? how did original fw convert
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+ * value to 0x82d4 ??
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+ * for now, force to 0x67 */
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+ p[i] &= 0xffff0000;
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+ p[i] |= 0x67;
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+ }
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+ }
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+ arv45xx_ath5k_platform_data.eeprom_data = arv45xx_ath5k_eeprom_data;
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+ arv45xx_ath5k_platform_data.macaddr = eeprom_mac;
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+ lqpci_plat_dev_init = arv45xx_pci_plat_dev_init;
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+}
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+
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+static void __init
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+arv4510pw_init(void)
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+{
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@ -354,8 +397,9 @@ |
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+ lq_pci_data.gpio = PCI_GNT2 | PCI_REQ2;
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+ lq_register_pci(&lq_pci_data);
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+ lq_register_wdt();
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+ arv45xx_register_ethernet();
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+ xway_register_dwc(ARV4518PW_USB);
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+ arv45xx_register_ethernet();
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+ arv45xx_register_ath5k();
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+
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+ gpio_request(ARV4518PW_SWITCH_RESET, "switch");
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+ gpio_direction_output(ARV4518PW_SWITCH_RESET, 1);
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@ -372,6 +416,7 @@ |
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+{
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+#define ARV4520PW_EBU 0x400
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+#define ARV4520PW_USB 28
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+#define ARV4520PW_SWITCH_RESET 42
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+
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+ lq_register_gpio();
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+ lq_register_gpio_ebu(ARV4520PW_EBU);
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@ -383,6 +428,9 @@ |
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+ lq_register_wdt();
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+ arv45xx_register_ethernet();
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+ xway_register_dwc(ARV4520PW_USB);
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+
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+ gpio_request(ARV4520PW_SWITCH_RESET, "switch");
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+ gpio_set_value(ARV4520PW_SWITCH_RESET, 1);
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+}
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+
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+MIPS_MACHINE(LANTIQ_MACH_ARV4520PW,
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@ -407,8 +455,9 @@ |
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+ lq_register_nor(&arv4518_flash_data);
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+ lq_register_pci(&lq_pci_data);
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+ lq_register_wdt();
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+ arv45xx_register_ethernet();
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+ xway_register_dwc(ARV452CPW_USB);
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+ arv45xx_register_ethernet();
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+ arv45xx_register_ath5k();
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+
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+ gpio_request(ARV452CPW_SWITCH_RESET, "switch");
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+ gpio_set_value(ARV452CPW_SWITCH_RESET, 1);
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