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@ -213,7 +213,7 @@ |
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+ radio_config = 0;
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+ }
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+
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+ return (u8 *) radio_config;
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+ return radio_config;
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+}
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+
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+int __init
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@ -248,7 +248,7 @@ |
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+ }
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+
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+ board_data = kzalloc(BOARD_CONFIG_BUFSZ, GFP_KERNEL);
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+ ar231x_board.config = (struct ar231x_boarddata *) board_data;
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+ ar231x_board.config = (struct ar231x_boarddata *)board_data;
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+ memcpy(board_data, bcfg, 0x100);
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+ if (broken_boarddata) {
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+ pr_warn("WARNING: broken board data detected\n");
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@ -269,7 +269,7 @@ |
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+ * of what the physical layout on the flash chip looks like */
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+
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+ if (ar231x_board.radio)
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+ rcfg = (u8 *) ar231x_board.radio;
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+ rcfg = (u8 *)ar231x_board.radio;
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+ else
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+ rcfg = find_radio_config(flash_limit, bcfg);
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+
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@ -1818,13 +1818,13 @@ |
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+
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+static const struct gpio_led_platform_data ar5312_led_data = {
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+ .num_leds = ARRAY_SIZE(ar5312_leds),
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+ .leds = (void *) ar5312_leds,
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+ .leds = (void *)ar5312_leds,
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+};
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+
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+static struct platform_device ar5312_gpio_leds = {
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+ .name = "leds-gpio",
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+ .id = -1,
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+ .dev.platform_data = (void *) &ar5312_led_data,
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+ .dev.platform_data = (void *)&ar5312_led_data,
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+};
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+#endif
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+
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@ -1857,7 +1857,7 @@ |
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+ ar231x_write_reg(AR531X_FLASHCTL2,
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+ ar231x_read_reg(AR531X_FLASHCTL2) & ~(FLASHCTL_E | FLASHCTL_AC));
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+
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+ return (char *) KSEG1ADDR(AR531X_FLASH + 0x800000);
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+ return (char *)KSEG1ADDR(AR531X_FLASH + 0x800000);
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+}
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+
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+int __init ar5312_init_devices(void)
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@ -1916,7 +1916,7 @@ |
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+ c--;
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+ }
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+
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+ switch(ar231x_devtype) {
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+ switch (ar231x_devtype) {
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+ case DEV_TYPE_AR5312:
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+ ar5312_eth0_data.macaddr = config->enet0_mac;
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+ ar231x_add_ethernet(0, KSEG1ADDR(AR531X_ENET0),
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@ -2258,7 +2258,7 @@ |
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+ unsigned int imr;
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+
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+ imr = ar231x_read_reg(AR2315_IMR);
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+ switch(d->irq) {
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+ switch (d->irq) {
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+ case AR531X_MISC_IRQ_SPI:
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+ imr |= AR2315_ISR_SPI;
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+ break;
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@ -2289,7 +2289,7 @@ |
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+ unsigned int imr;
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+
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+ imr = ar231x_read_reg(AR2315_IMR);
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+ switch(d->irq) {
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+ switch (d->irq) {
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+ case AR531X_MISC_IRQ_SPI:
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+ imr &= ~AR2315_ISR_SPI;
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+ break;
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@ -2581,20 +2581,20 @@ |
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+
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|
+ ar2315_spiflash_res[0].end = ar2315_spiflash_res[0].start +
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|
+ flash_size - 1;
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+ return (u8 *) ar2315_spiflash_res[0].end + 1;
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|
+ return (u8 *)ar2315_spiflash_res[0].end + 1;
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|
+}
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+
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|
+#ifdef CONFIG_LEDS_GPIO
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|
|
+static struct gpio_led ar2315_leds[6];
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|
|
+static struct gpio_led_platform_data ar2315_led_data = {
|
|
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|
|
+ .leds = (void *) ar2315_leds,
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|
|
+ .leds = (void *)ar2315_leds,
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|
|
+};
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|
+
|
|
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|
|
+static struct platform_device ar2315_gpio_leds = {
|
|
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|
|
+ .name = "leds-gpio",
|
|
|
|
|
+ .id = -1,
|
|
|
|
|
+ .dev = {
|
|
|
|
|
+ .platform_data = (void *) &ar2315_led_data,
|
|
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|
|
+ .platform_data = (void *)&ar2315_led_data,
|
|
|
|
|
+ }
|
|
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|
|
+};
|
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+
|
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|
@ -2606,8 +2606,8 @@ |
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|
+
|
|
|
|
|
+ ar2315_led_data.num_leds = 0;
|
|
|
|
|
+ for (i = 1; i < 8; i++) {
|
|
|
|
|
+ if((i == AR2315_RESET_GPIO) ||
|
|
|
|
|
+ (i == ar231x_board.config->reset_config_gpio))
|
|
|
|
|
+ if ((i == AR2315_RESET_GPIO) ||
|
|
|
|
|
+ (i == ar231x_board.config->reset_config_gpio))
|
|
|
|
|
+ continue;
|
|
|
|
|
+
|
|
|
|
|
+ if (i == ar231x_board.config->sys_led_gpio)
|
|
|
|
@ -2652,12 +2652,12 @@ |
|
|
|
|
+static void
|
|
|
|
|
+ar2315_restart(char *command)
|
|
|
|
|
+{
|
|
|
|
|
+ void (*mips_reset_vec)(void) = (void *) 0xbfc00000;
|
|
|
|
|
+ void (*mips_reset_vec)(void) = (void *)0xbfc00000;
|
|
|
|
|
+
|
|
|
|
|
+ local_irq_disable();
|
|
|
|
|
+
|
|
|
|
|
+ /* try reset the system via reset control */
|
|
|
|
|
+ ar231x_write_reg(AR2315_COLD_RESET,AR2317_RESET_SYSTEM);
|
|
|
|
|
+ ar231x_write_reg(AR2315_COLD_RESET, AR2317_RESET_SYSTEM);
|
|
|
|
|
+
|
|
|
|
|
+ /* Cold reset does not work on the AR2315/6, use the GPIO reset bits a workaround.
|
|
|
|
|
+ * give it some time to attempt a gpio based hardware reset
|
|
|
|
@ -2797,7 +2797,7 @@ |
|
|
|
|
+ /* Clear any lingering AHB errors */
|
|
|
|
|
+ config = read_c0_config();
|
|
|
|
|
+ write_c0_config(config & ~0x3);
|
|
|
|
|
+ ar231x_write_reg(AR2315_AHB_ERR0,AHB_ERROR_DET);
|
|
|
|
|
+ ar231x_write_reg(AR2315_AHB_ERR0, AHB_ERROR_DET);
|
|
|
|
|
+ ar231x_read_reg(AR2315_AHB_ERR1);
|
|
|
|
|
+ ar231x_write_reg(AR2315_WDC, AR2315_WDC_IGNORE_EXPIRATION);
|
|
|
|
|
+
|
|
|
|
@ -2922,13 +2922,13 @@ |
|
|
|
|
+static inline u32
|
|
|
|
|
+ar231x_read_reg(u32 reg)
|
|
|
|
|
+{
|
|
|
|
|
+ return __raw_readl((u32 *) KSEG1ADDR(reg));
|
|
|
|
|
+ return __raw_readl((u32 *)KSEG1ADDR(reg));
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+static inline void
|
|
|
|
|
+ar231x_write_reg(u32 reg, u32 val)
|
|
|
|
|
+{
|
|
|
|
|
+ __raw_writel(val, (u32 *) KSEG1ADDR(reg));
|
|
|
|
|
+ __raw_writel(val, (u32 *)KSEG1ADDR(reg));
|
|
|
|
|
+}
|
|
|
|
|
+
|
|
|
|
|
+static inline u32
|
|
|
|
|