parent
da1bb88a2b
commit
08e4d51c29
@ -1,51 +0,0 @@ |
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#
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# Copyright (C) 2008-2009 OpenWrt.org
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#
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# This is free software, licensed under the GNU General Public License v2.
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# See /LICENSE for more information.
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#
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include $(TOPDIR)/rules.mk |
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include $(INCLUDE_DIR)/kernel.mk |
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PKG_NAME:=broadcom-57xx
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PKG_RELEASE:=2
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include $(INCLUDE_DIR)/package.mk |
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define KernelPackage/brcm-57xx |
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SUBMENU:=Network Devices
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DEPENDS:=@TARGET_brcm_2_4 +kmod-switch
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TITLE:=Broadcom 57xx ethernet support
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FILES:=$(PKG_BUILD_DIR)/bcm57xx.$(LINUX_KMOD_SUFFIX)
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AUTOLOAD:=$(call AutoLoad,30,bcm57xx)
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endef |
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define Build/Prepare |
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mkdir -p $(PKG_BUILD_DIR)
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$(CP) ./src/* $(PKG_BUILD_DIR)/
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endef |
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ifeq ($(BOARD),brcm-2.4) |
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BUILDFLAGS := \
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-DBCMDRIVER -I$(LINUX_DIR)/arch/mips/bcm947xx/include $(TARGET_CPPFLAGS) \
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-DDBG=0 -DBCM_PROC_FS=1 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256 -DNICE_SUPPORT \
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-DPCIX_TARGET_WORKAROUND=1 -DINCLUDE_TBI_SUPPORT=1 -DINCLUDE_5701_AX_FIX=1
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endif |
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define Build/Compile |
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$(MAKE) -C "$(LINUX_DIR)" \
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CROSS_COMPILE="$(TARGET_CROSS)" \
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ARCH="$(LINUX_KARCH)" \
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SUBDIRS="$(PKG_BUILD_DIR)" \
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EXTRA_CFLAGS="$(BUILDFLAGS)" \
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modules
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endef |
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define KernelPackage/brcm-57xx/install |
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$(call Package/brcm-57xx/install/Default,$(1))
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#$(INSTALL_DIR) $(1)/etc/modules.d
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#echo "bcm57xx activate_gpio=1" > $(1)/etc/modules.d/30-bcm57xx
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endef |
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$(eval $(call KernelPackage,brcm-57xx)) |
@ -1,46 +0,0 @@ |
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/******************************************************************************/ |
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/* */ |
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/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
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/* Corporation. */ |
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/* All rights reserved. */ |
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/* */ |
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/* This program is free software; you can redistribute it and/or modify */ |
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/* it under the terms of the GNU General Public License as published by */ |
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/* the Free Software Foundation, located in the file LICENSE. */ |
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/* */ |
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/* History: */ |
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/* */ |
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/******************************************************************************/ |
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#ifdef INCLUDE_5701_AX_FIX |
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#include "mm.h" |
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#include "5701rls.h" |
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LM_STATUS LM_LoadRlsFirmware(PLM_DEVICE_BLOCK pDevice) |
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{ |
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T3_FWIMG_INFO FwImgInfo; |
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FwImgInfo.StartAddress = t3FwStartAddr; |
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FwImgInfo.Text.Buffer = (PLM_UINT8)t3FwText; |
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FwImgInfo.Text.Offset = t3FwTextAddr; |
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FwImgInfo.Text.Length = t3FwTextLen; |
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FwImgInfo.ROnlyData.Buffer = (PLM_UINT8)t3FwRodata; |
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FwImgInfo.ROnlyData.Offset = t3FwRodataAddr; |
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FwImgInfo.ROnlyData.Length = t3FwRodataLen; |
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FwImgInfo.Data.Buffer = (PLM_UINT8)t3FwData; |
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FwImgInfo.Data.Offset = t3FwDataAddr; |
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FwImgInfo.Data.Length = t3FwDataLen; |
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if (LM_LoadFirmware(pDevice, |
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&FwImgInfo, |
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T3_RX_CPU_ID | T3_TX_CPU_ID, |
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T3_RX_CPU_ID) != LM_STATUS_SUCCESS) |
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{ |
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return LM_STATUS_FAILURE; |
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} |
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return LM_STATUS_SUCCESS; |
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} |
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#endif /* INCLUDE_5701_AX_FIX */ |
@ -1,198 +0,0 @@ |
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/******************************************************************************/ |
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/* */ |
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/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
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/* Corporation. */ |
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/* All rights reserved. */ |
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/* */ |
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/* This program is free software; you can redistribute it and/or modify */ |
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/* it under the terms of the GNU General Public License as published by */ |
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/* the Free Software Foundation, located in the file LICENSE. */ |
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/* */ |
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/* History: */ |
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/******************************************************************************/ |
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typedef unsigned long U32; |
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int t3FwReleaseMajor = 0x0; |
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int t3FwReleaseMinor = 0x0; |
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int t3FwReleaseFix = 0x0; |
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U32 t3FwStartAddr = 0x08000000; |
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U32 t3FwTextAddr = 0x08000000; |
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int t3FwTextLen = 0x9c0; |
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U32 t3FwRodataAddr = 0x080009c0; |
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int t3FwRodataLen = 0x60; |
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U32 t3FwDataAddr = 0x08000a40; |
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int t3FwDataLen = 0x20; |
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U32 t3FwSbssAddr = 0x08000a60; |
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int t3FwSbssLen = 0xc; |
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U32 t3FwBssAddr = 0x08000a70; |
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int t3FwBssLen = 0x10; |
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U32 t3FwText[(0x9c0/4) + 1] = { |
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0x0,
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0x10000003, 0x0, 0xd, 0xd,
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0x3c1d0800, 0x37bd3ffc, 0x3a0f021, 0x3c100800,
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0x26100000, 0xe000018, 0x0, 0xd,
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0x3c1d0800, 0x37bd3ffc, 0x3a0f021, 0x3c100800,
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0x26100034, 0xe00021c, 0x0, 0xd,
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0x0, 0x0, 0x0, 0x27bdffe0,
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0x3c1cc000, 0xafbf0018, 0xaf80680c, 0xe00004c,
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0x241b2105, 0x97850000, 0x97870002, 0x9782002c,
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0x9783002e, 0x3c040800, 0x248409c0, 0xafa00014,
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0x21400, 0x621825, 0x52c00, 0xafa30010,
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0x8f860010, 0xe52825, 0xe000060, 0x24070102,
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0x3c02ac00, 0x34420100, 0x3c03ac01, 0x34630100,
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0xaf820490, 0x3c02ffff, 0xaf820494, 0xaf830498,
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0xaf82049c, 0x24020001, 0xaf825ce0, 0xe00003f,
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0xaf825d00, 0xe000140, 0x0, 0x8fbf0018,
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0x3e00008, 0x27bd0020, 0x2402ffff, 0xaf825404,
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0x8f835400, 0x34630400, 0xaf835400, 0xaf825404,
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0x3c020800, 0x24420034, 0xaf82541c, 0x3e00008,
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0xaf805400, 0x0, 0x0, 0x3c020800,
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0x34423000, 0x3c030800, 0x34633000, 0x3c040800,
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0x348437ff, 0x3c010800, 0xac220a64, 0x24020040,
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0x3c010800, 0xac220a68, 0x3c010800, 0xac200a60,
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0xac600000, 0x24630004, 0x83102b, 0x5040fffd,
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0xac600000, 0x3e00008, 0x0, 0x804821,
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0x8faa0010, 0x3c020800, 0x8c420a60, 0x3c040800,
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0x8c840a68, 0x8fab0014, 0x24430001, 0x44102b,
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0x3c010800, 0xac230a60, 0x14400003, 0x4021,
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0x3c010800, 0xac200a60, 0x3c020800, 0x8c420a60,
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0x3c030800, 0x8c630a64, 0x91240000, 0x21140,
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0x431021, 0x481021, 0x25080001, 0xa0440000,
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0x29020008, 0x1440fff4, 0x25290001, 0x3c020800,
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0x8c420a60, 0x3c030800, 0x8c630a64, 0x8f84680c,
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0x21140, 0x431021, 0xac440008, 0xac45000c,
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0xac460010, 0xac470014, 0xac4a0018, 0x3e00008,
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0xac4b001c, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
|
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
|
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x2000008,
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0x0, 0xa0001e3, 0x3c0a0001, 0xa0001e3,
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0x3c0a0002, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x3c0a0007, 0xa0001e3, 0x3c0a0008, 0xa0001e3,
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0x3c0a0009, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x3c0a000b, 0xa0001e3,
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0x3c0a000c, 0xa0001e3, 0x3c0a000d, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x3c0a000e, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x0, 0xa0001e3,
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0x0, 0xa0001e3, 0x3c0a0013, 0xa0001e3,
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0x3c0a0014, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x27bdffe0,
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0x1821, 0x1021, 0xafbf0018, 0xafb10014,
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0xafb00010, 0x3c010800, 0x220821, 0xac200a70,
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0x3c010800, 0x220821, 0xac200a74, 0x3c010800,
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0x220821, 0xac200a78, 0x24630001, 0x1860fff5,
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0x2442000c, 0x24110001, 0x8f906810, 0x32020004,
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0x14400005, 0x24040001, 0x3c020800, 0x8c420a78,
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0x18400003, 0x2021, 0xe000182, 0x0,
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0x32020001, 0x10400003, 0x0, 0xe000169,
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0x0, 0xa000153, 0xaf915028, 0x8fbf0018,
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0x8fb10014, 0x8fb00010, 0x3e00008, 0x27bd0020,
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0x3c050800, 0x8ca50a70, 0x3c060800, 0x8cc60a80,
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0x3c070800, 0x8ce70a78, 0x27bdffe0, 0x3c040800,
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0x248409d0, 0xafbf0018, 0xafa00010, 0xe000060,
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0xafa00014, 0xe00017b, 0x2021, 0x8fbf0018,
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0x3e00008, 0x27bd0020, 0x24020001, 0x8f836810,
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0x821004, 0x21027, 0x621824, 0x3e00008,
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0xaf836810, 0x27bdffd8, 0xafbf0024, 0x1080002e,
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0xafb00020, 0x8f825cec, 0xafa20018, 0x8f825cec,
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0x3c100800, 0x26100a78, 0xafa2001c, 0x34028000,
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0xaf825cec, 0x8e020000, 0x18400016, 0x0,
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0x3c020800, 0x94420a74, 0x8fa3001c, 0x221c0,
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0xac830004, 0x8fa2001c, 0x3c010800, 0xe000201,
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0xac220a74, 0x10400005, 0x0, 0x8e020000,
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0x24420001, 0xa0001df, 0xae020000, 0x3c020800,
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0x8c420a70, 0x21c02, 0x321c0, 0xa0001c5,
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0xafa2001c, 0xe000201, 0x0, 0x1040001f,
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0x0, 0x8e020000, 0x8fa3001c, 0x24420001,
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0x3c010800, 0xac230a70, 0x3c010800, 0xac230a74,
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0xa0001df, 0xae020000, 0x3c100800, 0x26100a78,
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0x8e020000, 0x18400028, 0x0, 0xe000201,
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0x0, 0x14400024, 0x0, 0x8e020000,
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0x3c030800, 0x8c630a70, 0x2442ffff, 0xafa3001c,
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0x18400006, 0xae020000, 0x31402, 0x221c0,
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0x8c820004, 0x3c010800, 0xac220a70, 0x97a2001e,
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0x2442ff00, 0x2c420300, 0x1440000b, 0x24024000,
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0x3c040800, 0x248409dc, 0xafa00010, 0xafa00014,
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0x8fa6001c, 0x24050008, 0xe000060, 0x3821,
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0xa0001df, 0x0, 0xaf825cf8, 0x3c020800,
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0x8c420a40, 0x8fa3001c, 0x24420001, 0xaf835cf8,
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0x3c010800, 0xac220a40, 0x8fbf0024, 0x8fb00020,
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0x3e00008, 0x27bd0028, 0x27bdffe0, 0x3c040800,
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0x248409e8, 0x2821, 0x3021, 0x3821,
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0xafbf0018, 0xafa00010, 0xe000060, 0xafa00014,
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0x8fbf0018, 0x3e00008, 0x27bd0020, 0x8f82680c,
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0x8f85680c, 0x21827, 0x3182b, 0x31823,
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0x431024, 0x441021, 0xa2282b, 0x10a00006,
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0x0, 0x401821, 0x8f82680c, 0x43102b,
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0x1440fffd, 0x0, 0x3e00008, 0x0,
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0x3c040800, 0x8c840000, 0x3c030800, 0x8c630a40,
|
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0x64102b, 0x54400002, 0x831023, 0x641023,
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0x2c420008, 0x3e00008, 0x38420001, 0x27bdffe0,
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0x802821, 0x3c040800, 0x24840a00, 0x3021,
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0x3821, 0xafbf0018, 0xafa00010, 0xe000060,
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0xafa00014, 0xa000216, 0x0, 0x8fbf0018,
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0x3e00008, 0x27bd0020, 0x0, 0x27bdffe0,
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0x3c1cc000, 0xafbf0018, 0xe00004c, 0xaf80680c,
|
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0x3c040800, 0x24840a10, 0x3802821, 0x3021,
|
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0x3821, 0xafa00010, 0xe000060, 0xafa00014,
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0x2402ffff, 0xaf825404, 0x3c0200aa, 0xe000234,
|
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0xaf825434, 0x8fbf0018, 0x3e00008, 0x27bd0020,
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0x0, 0x0, 0x0, 0x27bdffe8,
|
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0xafb00010, 0x24100001, 0xafbf0014, 0x3c01c003,
|
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0xac200000, 0x8f826810, 0x30422000, 0x10400003,
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0x0, 0xe000246, 0x0, 0xa00023a,
|
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0xaf905428, 0x8fbf0014, 0x8fb00010, 0x3e00008,
|
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0x27bd0018, 0x27bdfff8, 0x8f845d0c, 0x3c0200ff,
|
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0x3c030800, 0x8c630a50, 0x3442fff8, 0x821024,
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0x1043001e, 0x3c0500ff, 0x34a5fff8, 0x3c06c003,
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0x3c074000, 0x851824, 0x8c620010, 0x3c010800,
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0xac230a50, 0x30420008, 0x10400005, 0x871025,
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0x8cc20000, 0x24420001, 0xacc20000, 0x871025,
|
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0xaf825d0c, 0x8fa20000, 0x24420001, 0xafa20000,
|
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0x8fa20000, 0x8fa20000, 0x24420001, 0xafa20000,
|
||||
0x8fa20000, 0x8f845d0c, 0x3c030800, 0x8c630a50,
|
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0x851024, 0x1443ffe8, 0x851824, 0x27bd0008,
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0x3e00008, 0x0, 0x0, 0x0 }; |
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U32 t3FwRodata[(0x60/4) + 1] = { |
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0x35373031, 0x726c7341, 0x0,
|
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0x0, 0x53774576, 0x656e7430, 0x0,
|
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0x726c7045, 0x76656e74, 0x31000000, 0x556e6b6e,
|
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0x45766e74, 0x0, 0x0, 0x0,
|
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0x0, 0x66617461, 0x6c457272, 0x0,
|
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0x0, 0x4d61696e, 0x43707542, 0x0,
|
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0x0, 0x0 }; |
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U32 t3FwData[(0x20/4) + 1] = { |
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0x0, 0x0, 0x0,
|
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0x0, 0x0, 0x0, 0x0,
|
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0x0, 0x0 }; |
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#
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# Broadcom BCM57XX Gigabit Ethernet driver make file.
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#
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#
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|
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O_TARGET = bcm57xx.o
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|
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EXTRA_CFLAGS += -DDBG=0 -DBCM_PROC_FS=1 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256
|
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EXTRA_CFLAGS += -DPCIX_TARGET_WORKAROUND=1 -DINCLUDE_TBI_SUPPORT=1 -DINCLUDE_5701_AX_FIX=1
|
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|
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export-objs :=
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|
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obj-y := b57um.o tigon3.o autoneg.o 5701rls.o tcp_seg.o hndgige.o bcmrobo.o
|
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obj-m := $(O_TARGET)
|
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|
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include $(TOPDIR)/Rules.make |
@ -1,438 +0,0 @@ |
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/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/******************************************************************************/ |
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|
||||
#ifdef INCLUDE_TBI_SUPPORT |
||||
#include "mm.h" |
||||
|
||||
|
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|
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/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
void |
||||
MM_AnTxConfig( |
||||
PAN_STATE_INFO pAnInfo) |
||||
{ |
||||
PLM_DEVICE_BLOCK pDevice; |
||||
|
||||
pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; |
||||
|
||||
REG_WR(pDevice, MacCtrl.TxAutoNeg, (LM_UINT32) pAnInfo->TxConfig.AsUSHORT); |
||||
|
||||
pDevice->MacMode |= MAC_MODE_SEND_CONFIGS; |
||||
REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); |
||||
} |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
void |
||||
MM_AnTxIdle( |
||||
PAN_STATE_INFO pAnInfo) |
||||
{ |
||||
PLM_DEVICE_BLOCK pDevice; |
||||
|
||||
pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; |
||||
|
||||
pDevice->MacMode &= ~MAC_MODE_SEND_CONFIGS; |
||||
REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); |
||||
} |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
char |
||||
MM_AnRxConfig( |
||||
PAN_STATE_INFO pAnInfo, |
||||
unsigned short *pRxConfig) |
||||
{ |
||||
PLM_DEVICE_BLOCK pDevice; |
||||
LM_UINT32 Value32; |
||||
char Retcode; |
||||
|
||||
Retcode = AN_FALSE; |
||||
|
||||
pDevice = (PLM_DEVICE_BLOCK) pAnInfo->pContext; |
||||
|
||||
Value32 = REG_RD(pDevice, MacCtrl.Status); |
||||
if(Value32 & MAC_STATUS_RECEIVING_CFG) |
||||
{ |
||||
Value32 = REG_RD(pDevice, MacCtrl.RxAutoNeg); |
||||
*pRxConfig = (unsigned short) Value32; |
||||
|
||||
Retcode = AN_TRUE; |
||||
} |
||||
|
||||
return Retcode; |
||||
} |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
void |
||||
AutonegInit( |
||||
PAN_STATE_INFO pAnInfo) |
||||
{ |
||||
unsigned long j; |
||||
|
||||
for(j = 0; j < sizeof(AN_STATE_INFO); j++) |
||||
{ |
||||
((unsigned char *) pAnInfo)[j] = 0; |
||||
} |
||||
|
||||
/* Initialize the default advertisement register. */ |
||||
pAnInfo->mr_adv_full_duplex = 1; |
||||
pAnInfo->mr_adv_sym_pause = 1; |
||||
pAnInfo->mr_adv_asym_pause = 1; |
||||
pAnInfo->mr_an_enable = 1; |
||||
} |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
AUTONEG_STATUS |
||||
Autoneg8023z( |
||||
PAN_STATE_INFO pAnInfo) |
||||
{ |
||||
unsigned short RxConfig; |
||||
unsigned long Delta_us; |
||||
AUTONEG_STATUS AnRet; |
||||
|
||||
/* Get the current time. */ |
||||
if(pAnInfo->State == AN_STATE_UNKNOWN) |
||||
{ |
||||
pAnInfo->RxConfig.AsUSHORT = 0; |
||||
pAnInfo->CurrentTime_us = 0; |
||||
pAnInfo->LinkTime_us = 0; |
||||
pAnInfo->AbilityMatchCfg = 0; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->IdleMatch = AN_FALSE; |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
} |
||||
|
||||
/* Increment the timer tick. This function is called every microsecon. */ |
||||
// pAnInfo->CurrentTime_us++;
|
||||
|
||||
/* Set the AbilityMatch, IdleMatch, and AckMatch flags if their */ |
||||
/* corresponding conditions are satisfied. */ |
||||
if(MM_AnRxConfig(pAnInfo, &RxConfig)) |
||||
{ |
||||
if(RxConfig != pAnInfo->AbilityMatchCfg) |
||||
{ |
||||
pAnInfo->AbilityMatchCfg = RxConfig; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->AbilityMatchCnt++; |
||||
if(pAnInfo->AbilityMatchCnt > 1) |
||||
{ |
||||
pAnInfo->AbilityMatch = AN_TRUE; |
||||
pAnInfo->AbilityMatchCfg = RxConfig; |
||||
} |
||||
} |
||||
|
||||
if(RxConfig & AN_CONFIG_ACK) |
||||
{ |
||||
pAnInfo->AckMatch = AN_TRUE; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
} |
||||
|
||||
pAnInfo->IdleMatch = AN_FALSE; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->IdleMatch = AN_TRUE; |
||||
|
||||
pAnInfo->AbilityMatchCfg = 0; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
|
||||
RxConfig = 0; |
||||
} |
||||
|
||||
/* Save the last Config. */ |
||||
pAnInfo->RxConfig.AsUSHORT = RxConfig; |
||||
|
||||
/* Default return code. */ |
||||
AnRet = AUTONEG_STATUS_OK; |
||||
|
||||
/* Autoneg state machine as defined in 802.3z section 37.3.1.5. */ |
||||
switch(pAnInfo->State) |
||||
{ |
||||
case AN_STATE_UNKNOWN: |
||||
if(pAnInfo->mr_an_enable || pAnInfo->mr_restart_an) |
||||
{ |
||||
pAnInfo->CurrentTime_us = 0; |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
} |
||||
|
||||
/* Fall through.*/ |
||||
|
||||
case AN_STATE_AN_ENABLE: |
||||
pAnInfo->mr_an_complete = AN_FALSE; |
||||
pAnInfo->mr_page_rx = AN_FALSE; |
||||
|
||||
if(pAnInfo->mr_an_enable) |
||||
{ |
||||
pAnInfo->LinkTime_us = 0; |
||||
pAnInfo->AbilityMatchCfg = 0; |
||||
pAnInfo->AbilityMatchCnt = 0; |
||||
pAnInfo->AbilityMatch = AN_FALSE; |
||||
pAnInfo->IdleMatch = AN_FALSE; |
||||
pAnInfo->AckMatch = AN_FALSE; |
||||
|
||||
pAnInfo->State = AN_STATE_AN_RESTART_INIT; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->State = AN_STATE_DISABLE_LINK_OK; |
||||
} |
||||
break; |
||||
|
||||
case AN_STATE_AN_RESTART_INIT: |
||||
pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; |
||||
pAnInfo->mr_np_loaded = AN_FALSE; |
||||
|
||||
pAnInfo->TxConfig.AsUSHORT = 0; |
||||
MM_AnTxConfig(pAnInfo); |
||||
|
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
|
||||
pAnInfo->State = AN_STATE_AN_RESTART; |
||||
|
||||
/* Fall through.*/ |
||||
|
||||
case AN_STATE_AN_RESTART: |
||||
/* Get the current time and compute the delta with the saved */ |
||||
/* link timer. */ |
||||
Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; |
||||
if(Delta_us > AN_LINK_TIMER_INTERVAL_US) |
||||
{ |
||||
pAnInfo->State = AN_STATE_ABILITY_DETECT_INIT; |
||||
} |
||||
else |
||||
{ |
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
} |
||||
break; |
||||
|
||||
case AN_STATE_DISABLE_LINK_OK: |
||||
AnRet = AUTONEG_STATUS_DONE; |
||||
break; |
||||
|
||||
case AN_STATE_ABILITY_DETECT_INIT: |
||||
/* Note: in the state diagram, this variable is set to */ |
||||
/* mr_adv_ability<12>. Is this right?. */ |
||||
pAnInfo->mr_toggle_tx = AN_FALSE; |
||||
|
||||
/* Send the config as advertised in the advertisement register. */ |
||||
pAnInfo->TxConfig.AsUSHORT = 0; |
||||
pAnInfo->TxConfig.D5_FD = pAnInfo->mr_adv_full_duplex; |
||||
pAnInfo->TxConfig.D6_HD = pAnInfo->mr_adv_half_duplex; |
||||
pAnInfo->TxConfig.D7_PS1 = pAnInfo->mr_adv_sym_pause; |
||||
pAnInfo->TxConfig.D8_PS2 = pAnInfo->mr_adv_asym_pause; |
||||
pAnInfo->TxConfig.D12_RF1 = pAnInfo->mr_adv_remote_fault1; |
||||
pAnInfo->TxConfig.D13_RF2 = pAnInfo->mr_adv_remote_fault2; |
||||
pAnInfo->TxConfig.D15_NP = pAnInfo->mr_adv_next_page; |
||||
|
||||
MM_AnTxConfig(pAnInfo); |
||||
|
||||
pAnInfo->State = AN_STATE_ABILITY_DETECT; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_ABILITY_DETECT: |
||||
if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT != 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_ACK_DETECT_INIT; |
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_ACK_DETECT_INIT: |
||||
pAnInfo->TxConfig.D14_ACK = 1; |
||||
MM_AnTxConfig(pAnInfo); |
||||
|
||||
pAnInfo->State = AN_STATE_ACK_DETECT; |
||||
|
||||
/* Fall through. */ |
||||
|
||||
case AN_STATE_ACK_DETECT: |
||||
if(pAnInfo->AckMatch == AN_TRUE) |
||||
{ |
||||
if((pAnInfo->RxConfig.AsUSHORT & ~AN_CONFIG_ACK) == |
||||
(pAnInfo->AbilityMatchCfg & ~AN_CONFIG_ACK)) |
||||
{ |
||||
pAnInfo->State = AN_STATE_COMPLETE_ACK_INIT; |
||||
} |
||||
else |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
} |
||||
} |
||||
else if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_COMPLETE_ACK_INIT: |
||||
/* Make sure invalid bits are not set. */ |
||||
if(pAnInfo->RxConfig.bits.D0 || pAnInfo->RxConfig.bits.D1 || |
||||
pAnInfo->RxConfig.bits.D2 || pAnInfo->RxConfig.bits.D3 || |
||||
pAnInfo->RxConfig.bits.D4 || pAnInfo->RxConfig.bits.D9 || |
||||
pAnInfo->RxConfig.bits.D10 || pAnInfo->RxConfig.bits.D11) |
||||
{ |
||||
AnRet = AUTONEG_STATUS_FAILED; |
||||
break; |
||||
} |
||||
|
||||
/* Set up the link partner advertisement register. */ |
||||
pAnInfo->mr_lp_adv_full_duplex = pAnInfo->RxConfig.D5_FD; |
||||
pAnInfo->mr_lp_adv_half_duplex = pAnInfo->RxConfig.D6_HD; |
||||
pAnInfo->mr_lp_adv_sym_pause = pAnInfo->RxConfig.D7_PS1; |
||||
pAnInfo->mr_lp_adv_asym_pause = pAnInfo->RxConfig.D8_PS2; |
||||
pAnInfo->mr_lp_adv_remote_fault1 = pAnInfo->RxConfig.D12_RF1; |
||||
pAnInfo->mr_lp_adv_remote_fault2 = pAnInfo->RxConfig.D13_RF2; |
||||
pAnInfo->mr_lp_adv_next_page = pAnInfo->RxConfig.D15_NP; |
||||
|
||||
pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; |
||||
|
||||
pAnInfo->mr_toggle_tx = !pAnInfo->mr_toggle_tx; |
||||
pAnInfo->mr_toggle_rx = pAnInfo->RxConfig.bits.D11; |
||||
pAnInfo->mr_np_rx = pAnInfo->RxConfig.D15_NP; |
||||
pAnInfo->mr_page_rx = AN_TRUE; |
||||
|
||||
pAnInfo->State = AN_STATE_COMPLETE_ACK; |
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_COMPLETE_ACK: |
||||
if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
break; |
||||
} |
||||
|
||||
Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; |
||||
|
||||
if(Delta_us > AN_LINK_TIMER_INTERVAL_US) |
||||
{ |
||||
if(pAnInfo->mr_adv_next_page == 0 || |
||||
pAnInfo->mr_lp_adv_next_page == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; |
||||
} |
||||
else |
||||
{ |
||||
if(pAnInfo->TxConfig.bits.D15 == 0 && |
||||
pAnInfo->mr_np_rx == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; |
||||
} |
||||
else |
||||
{ |
||||
AnRet = AUTONEG_STATUS_FAILED; |
||||
} |
||||
} |
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_IDLE_DETECT_INIT: |
||||
pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; |
||||
|
||||
MM_AnTxIdle(pAnInfo); |
||||
|
||||
pAnInfo->State = AN_STATE_IDLE_DETECT; |
||||
|
||||
AnRet = AUTONEG_STATUS_TIMER_ENABLED; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_IDLE_DETECT: |
||||
if(pAnInfo->AbilityMatch == AN_TRUE && |
||||
pAnInfo->RxConfig.AsUSHORT == 0) |
||||
{ |
||||
pAnInfo->State = AN_STATE_AN_ENABLE; |
||||
break; |
||||
} |
||||
|
||||
Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; |
||||
if(Delta_us > AN_LINK_TIMER_INTERVAL_US) |
||||
{ |
||||
// if(pAnInfo->IdleMatch == AN_TRUE)
|
||||
// {
|
||||
pAnInfo->State = AN_STATE_LINK_OK; |
||||
// }
|
||||
// else
|
||||
// {
|
||||
// AnRet = AUTONEG_STATUS_FAILED;
|
||||
// break;
|
||||
// }
|
||||
} |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_LINK_OK: |
||||
pAnInfo->mr_an_complete = AN_TRUE; |
||||
pAnInfo->mr_link_ok = AN_TRUE; |
||||
AnRet = AUTONEG_STATUS_DONE; |
||||
|
||||
break; |
||||
|
||||
case AN_STATE_NEXT_PAGE_WAIT_INIT: |
||||
break; |
||||
|
||||
case AN_STATE_NEXT_PAGE_WAIT: |
||||
break; |
||||
|
||||
default: |
||||
AnRet = AUTONEG_STATUS_FAILED; |
||||
break; |
||||
} |
||||
|
||||
return AnRet; |
||||
} |
||||
#endif /* INCLUDE_TBI_SUPPORT */ |
||||
|
@ -1,418 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/******************************************************************************/ |
||||
|
||||
|
||||
#ifndef AUTONEG_H |
||||
#define AUTONEG_H |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Constants. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define AN_LINK_TIMER_INTERVAL_US 12000 /* 10ms */ |
||||
|
||||
/* TRUE, FALSE */ |
||||
#define AN_TRUE 1 |
||||
#define AN_FALSE 0 |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Main data structure for keeping track of 802.3z auto-negotation state */ |
||||
/* variables as shown in Figure 37-6 of the IEEE 802.3z specification. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef struct |
||||
{ |
||||
/* Pointer to the operating system specific data structure. */ |
||||
void *pContext; |
||||
|
||||
/* Current auto-negotiation state. */ |
||||
unsigned long State; |
||||
#define AN_STATE_UNKNOWN 0 |
||||
#define AN_STATE_AN_ENABLE 1 |
||||
#define AN_STATE_AN_RESTART_INIT 2 |
||||
#define AN_STATE_AN_RESTART 3 |
||||
#define AN_STATE_DISABLE_LINK_OK 4 |
||||
#define AN_STATE_ABILITY_DETECT_INIT 5 |
||||
#define AN_STATE_ABILITY_DETECT 6 |
||||
#define AN_STATE_ACK_DETECT_INIT 7 |
||||
#define AN_STATE_ACK_DETECT 8 |
||||
#define AN_STATE_COMPLETE_ACK_INIT 9 |
||||
#define AN_STATE_COMPLETE_ACK 10 |
||||
#define AN_STATE_IDLE_DETECT_INIT 11 |
||||
#define AN_STATE_IDLE_DETECT 12 |
||||
#define AN_STATE_LINK_OK 13 |
||||
#define AN_STATE_NEXT_PAGE_WAIT_INIT 14 |
||||
#define AN_STATE_NEXT_PAGE_WAIT 16 |
||||
|
||||
/* Link timer. */ |
||||
unsigned long LinkTime_us; |
||||
|
||||
/* Current time. */ |
||||
unsigned long CurrentTime_us; |
||||
|
||||
/* Ability, idle, and ack match functions. */ |
||||
unsigned long AbilityMatchCnt; |
||||
|
||||
/* Need these values for consistency check. */ |
||||
unsigned short AbilityMatchCfg; |
||||
|
||||
unsigned short reserved; |
||||
|
||||
char AbilityMatch; |
||||
char IdleMatch; |
||||
char AckMatch; |
||||
char reserved1; |
||||
|
||||
/* Tx config data */ |
||||
union |
||||
{ |
||||
/* The TxConfig register is arranged as follows: */ |
||||
/* */ |
||||
/* MSB LSB */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
/* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
struct |
||||
{ |
||||
#ifdef BIG_ENDIAN_HOST |
||||
unsigned short D7:1; /* PS1 */ |
||||
unsigned short D6:1; /* HD */ |
||||
unsigned short D5:1; /* FD */ |
||||
unsigned short D4:1; |
||||
unsigned short D3:1; |
||||
unsigned short D2:1; |
||||
unsigned short D1:1; |
||||
unsigned short D0:1; |
||||
unsigned short D15:1; /* NP */ |
||||
unsigned short D14:1; /* ACK */ |
||||
unsigned short D13:1; /* RF2 */ |
||||
unsigned short D12:1; /* RF1 */ |
||||
unsigned short D11:1; |
||||
unsigned short D10:1; |
||||
unsigned short D9:1; |
||||
unsigned short D8:1; /* PS2 */ |
||||
#else /* BIG_ENDIAN_HOST */ |
||||
unsigned int D8:1; /* PS2 */ |
||||
unsigned int D9:1; |
||||
unsigned int D10:1; |
||||
unsigned int D11:1; |
||||
unsigned int D12:1; /* RF1 */ |
||||
unsigned int D13:1; /* RF2 */ |
||||
unsigned int D14:1; /* ACK */ |
||||
unsigned int D15:1; /* NP */ |
||||
unsigned int D0:1; |
||||
unsigned int D1:1; |
||||
unsigned int D2:1; |
||||
unsigned int D3:1; |
||||
unsigned int D4:1; |
||||
unsigned int D5:1; /* FD */ |
||||
unsigned int D6:1; /* HD */ |
||||
unsigned int D7:1; /* PS1 */ |
||||
#endif |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define D8_PS2 bits.D8 |
||||
#define D12_RF1 bits.D12 |
||||
#define D13_RF2 bits.D13 |
||||
#define D14_ACK bits.D14 |
||||
#define D15_NP bits.D15 |
||||
#define D5_FD bits.D5 |
||||
#define D6_HD bits.D6 |
||||
#define D7_PS1 bits.D7 |
||||
} TxConfig; |
||||
|
||||
/* Rx config data */ |
||||
union |
||||
{ |
||||
/* The RxConfig register is arranged as follows: */ |
||||
/* */ |
||||
/* MSB LSB */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
/* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ |
||||
/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ |
||||
struct |
||||
{ |
||||
#ifdef BIG_ENDIAN_HOST |
||||
unsigned short D7:1; /* PS1 */ |
||||
unsigned short D6:1; /* HD */ |
||||
unsigned short D5:1; /* FD */ |
||||
unsigned short D4:1; |
||||
unsigned short D3:1; |
||||
unsigned short D2:1; |
||||
unsigned short D1:1; |
||||
unsigned short D0:1; |
||||
unsigned short D15:1; /* NP */ |
||||
unsigned short D14:1; /* ACK */ |
||||
unsigned short D13:1; /* RF2 */
|
||||
unsigned short D12:1; /* RF1 */ |
||||
unsigned short D11:1; |
||||
unsigned short D10:1; |
||||
unsigned short D9:1; |
||||
unsigned short D8:1; /* PS2 */ |
||||
#else /* BIG_ENDIAN_HOST */ |
||||
unsigned int D8:1; /* PS2 */ |
||||
unsigned int D9:1; |
||||
unsigned int D10:1; |
||||
unsigned int D11:1; |
||||
unsigned int D12:1; /* RF1 */ |
||||
unsigned int D13:1; /* RF2 */ |
||||
unsigned int D14:1; /* ACK */ |
||||
unsigned int D15:1; /* NP */ |
||||
unsigned int D0:1; |
||||
unsigned int D1:1; |
||||
unsigned int D2:1; |
||||
unsigned int D3:1; |
||||
unsigned int D4:1; |
||||
unsigned int D5:1; /* FD */ |
||||
unsigned int D6:1; /* HD */ |
||||
unsigned int D7:1; /* PS1 */ |
||||
#endif |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
} RxConfig; |
||||
|
||||
#define AN_CONFIG_NP 0x0080 |
||||
#define AN_CONFIG_ACK 0x0040 |
||||
#define AN_CONFIG_RF2 0x0020 |
||||
#define AN_CONFIG_RF1 0x0010 |
||||
#define AN_CONFIG_PS2 0x0001 |
||||
#define AN_CONFIG_PS1 0x8000 |
||||
#define AN_CONFIG_HD 0x4000 |
||||
#define AN_CONFIG_FD 0x2000 |
||||
|
||||
|
||||
/* Management registers. */ |
||||
|
||||
/* Control register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int an_enable:1; |
||||
unsigned int loopback:1; |
||||
unsigned int reset:1; |
||||
unsigned int restart_an:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_an_enable Mr0.bits.an_enable |
||||
#define mr_loopback Mr0.bits.loopback |
||||
#define mr_main_reset Mr0.bits.reset |
||||
#define mr_restart_an Mr0.bits.restart_an |
||||
} Mr0; |
||||
|
||||
/* Status register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int an_complete:1; |
||||
unsigned int link_ok:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_an_complete Mr1.bits.an_complete |
||||
#define mr_link_ok Mr1.bits.link_ok |
||||
} Mr1; |
||||
|
||||
/* Advertisement register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_4:5; |
||||
unsigned int full_duplex:1; |
||||
unsigned int half_duplex:1; |
||||
unsigned int sym_pause:1; |
||||
unsigned int asym_pause:1; |
||||
unsigned int reserved_11:3; |
||||
unsigned int remote_fault1:1; |
||||
unsigned int remote_fault2:1; |
||||
unsigned int reserved_14:1; |
||||
unsigned int next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_adv_full_duplex Mr4.bits.full_duplex |
||||
#define mr_adv_half_duplex Mr4.bits.half_duplex |
||||
#define mr_adv_sym_pause Mr4.bits.sym_pause |
||||
#define mr_adv_asym_pause Mr4.bits.asym_pause |
||||
#define mr_adv_remote_fault1 Mr4.bits.remote_fault1 |
||||
#define mr_adv_remote_fault2 Mr4.bits.remote_fault2 |
||||
#define mr_adv_next_page Mr4.bits.next_page |
||||
} Mr4; |
||||
|
||||
/* Link partner advertisement register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_4:5; |
||||
unsigned int lp_full_duplex:1; |
||||
unsigned int lp_half_duplex:1; |
||||
unsigned int lp_sym_pause:1; |
||||
unsigned int lp_asym_pause:1; |
||||
unsigned int reserved_11:3; |
||||
unsigned int lp_remote_fault1:1; |
||||
unsigned int lp_remote_fault2:1; |
||||
unsigned int lp_ack:1; |
||||
unsigned int lp_next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_lp_adv_full_duplex Mr5.bits.lp_full_duplex |
||||
#define mr_lp_adv_half_duplex Mr5.bits.lp_half_duplex |
||||
#define mr_lp_adv_sym_pause Mr5.bits.lp_sym_pause |
||||
#define mr_lp_adv_asym_pause Mr5.bits.lp_asym_pause |
||||
#define mr_lp_adv_remote_fault1 Mr5.bits.lp_remote_fault1 |
||||
#define mr_lp_adv_remote_fault2 Mr5.bits.lp_remote_fault2 |
||||
#define mr_lp_adv_next_page Mr5.bits.lp_next_page |
||||
} Mr5; |
||||
|
||||
/* Auto-negotiation expansion register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_0:1; |
||||
unsigned int page_received:1; |
||||
unsigned int next_pageable:1; |
||||
unsigned int reserved_15:13; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
} Mr6; |
||||
|
||||
/* Auto-negotiation next page transmit register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int code_field:11; |
||||
unsigned int toggle:1; |
||||
unsigned int ack2:1; |
||||
unsigned int message_page:1; |
||||
unsigned int reserved_14:1; |
||||
unsigned int next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_np_tx Mr7.AsUSHORT |
||||
} Mr7; |
||||
|
||||
/* Auto-negotiation link partner ability register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int code_field:11; |
||||
unsigned int toggle:1; |
||||
unsigned int ack2:1; |
||||
unsigned int message_page:1; |
||||
unsigned int ack:1; |
||||
unsigned int next_page:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_lp_np_rx Mr8.AsUSHORT |
||||
} Mr8; |
||||
|
||||
/* Extended status register. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int reserved_11:12; |
||||
unsigned int base1000_t_hd:1; |
||||
unsigned int base1000_t_fd:1; |
||||
unsigned int base1000_x_hd:1; |
||||
unsigned int base1000_x_fd:1; |
||||
} bits;
|
||||
|
||||
unsigned short AsUSHORT; |
||||
} Mr15; |
||||
|
||||
/* Miscellaneous state variables. */ |
||||
union |
||||
{ |
||||
struct |
||||
{ |
||||
unsigned int toggle_tx:1; |
||||
unsigned int toggle_rx:1; |
||||
unsigned int np_rx:1; |
||||
unsigned int page_rx:1; |
||||
unsigned int np_loaded:1; |
||||
} bits; |
||||
|
||||
unsigned short AsUSHORT; |
||||
|
||||
#define mr_toggle_tx MrMisc.bits.toggle_tx |
||||
#define mr_toggle_rx MrMisc.bits.toggle_rx |
||||
#define mr_np_rx MrMisc.bits.np_rx |
||||
#define mr_page_rx MrMisc.bits.page_rx |
||||
#define mr_np_loaded MrMisc.bits.np_loaded |
||||
} MrMisc; |
||||
|
||||
} AN_STATE_INFO, *PAN_STATE_INFO; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Return code of Autoneg8023z. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef enum |
||||
{ |
||||
AUTONEG_STATUS_OK = 0, |
||||
AUTONEG_STATUS_DONE = 1, |
||||
AUTONEG_STATUS_TIMER_ENABLED = 2, |
||||
// AUTONEG_STATUS_FAILED = 0xffffffff,
|
||||
AUTONEG_STATUS_FAILED = 0xfffffff |
||||
} AUTONEG_STATUS, *PAUTONEG_STATUS; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Function prototypes. */ |
||||
/******************************************************************************/ |
||||
|
||||
AUTONEG_STATUS Autoneg8023z(PAN_STATE_INFO pAnInfo); |
||||
void AutonegInit(PAN_STATE_INFO pAnInfo); |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* The following functions are defined in the os-dependent module. */ |
||||
/******************************************************************************/ |
||||
|
||||
void MM_AnTxConfig(PAN_STATE_INFO pAnInfo); |
||||
void MM_AnTxIdle(PAN_STATE_INFO pAnInfo); |
||||
char MM_AnRxConfig(PAN_STATE_INFO pAnInfo, unsigned short *pRxConfig); |
||||
|
||||
|
||||
|
||||
#endif /* AUTONEG_H */ |
||||
|
File diff suppressed because it is too large
Load Diff
@ -1,197 +0,0 @@ |
||||
/*
|
||||
* local version of endian.h - byte order defines |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _BCMENDIAN_H_ |
||||
#define _BCMENDIAN_H_ |
||||
|
||||
#include <typedefs.h> |
||||
|
||||
/* Byte swap a 16 bit value */ |
||||
#define BCMSWAP16(val) \ |
||||
((uint16)(\
|
||||
(((uint16)(val) & (uint16)0x00ffU) << 8) | \
|
||||
(((uint16)(val) & (uint16)0xff00U) >> 8))) |
||||
|
||||
/* Byte swap a 32 bit value */ |
||||
#define BCMSWAP32(val) \ |
||||
((uint32)(\
|
||||
(((uint32)(val) & (uint32)0x000000ffUL) << 24) | \
|
||||
(((uint32)(val) & (uint32)0x0000ff00UL) << 8) | \
|
||||
(((uint32)(val) & (uint32)0x00ff0000UL) >> 8) | \
|
||||
(((uint32)(val) & (uint32)0xff000000UL) >> 24))) |
||||
|
||||
/* 2 Byte swap a 32 bit value */ |
||||
#define BCMSWAP32BY16(val) \ |
||||
((uint32)(\
|
||||
(((uint32)(val) & (uint32)0x0000ffffUL) << 16) | \
|
||||
(((uint32)(val) & (uint32)0xffff0000UL) >> 16))) |
||||
|
||||
|
||||
static INLINE uint16 |
||||
bcmswap16(uint16 val) |
||||
{ |
||||
return BCMSWAP16(val); |
||||
} |
||||
|
||||
static INLINE uint32 |
||||
bcmswap32(uint32 val) |
||||
{ |
||||
return BCMSWAP32(val); |
||||
} |
||||
|
||||
static INLINE uint32 |
||||
bcmswap32by16(uint32 val) |
||||
{ |
||||
return BCMSWAP32BY16(val); |
||||
} |
||||
|
||||
/* buf - start of buffer of shorts to swap */ |
||||
/* len - byte length of buffer */ |
||||
static INLINE void |
||||
bcmswap16_buf(uint16 *buf, uint len) |
||||
{ |
||||
len = len/2; |
||||
|
||||
while (len--) { |
||||
*buf = bcmswap16(*buf); |
||||
buf++; |
||||
} |
||||
} |
||||
|
||||
#ifndef hton16 |
||||
#ifndef IL_BIGENDIAN |
||||
#define HTON16(i) BCMSWAP16(i) |
||||
#define hton16(i) bcmswap16(i) |
||||
#define hton32(i) bcmswap32(i) |
||||
#define ntoh16(i) bcmswap16(i) |
||||
#define ntoh32(i) bcmswap32(i) |
||||
#define ltoh16(i) (i) |
||||
#define ltoh32(i) (i) |
||||
#define htol16(i) (i) |
||||
#define htol32(i) (i) |
||||
#else |
||||
#define HTON16(i) (i) |
||||
#define hton16(i) (i) |
||||
#define hton32(i) (i) |
||||
#define ntoh16(i) (i) |
||||
#define ntoh32(i) (i) |
||||
#define ltoh16(i) bcmswap16(i) |
||||
#define ltoh32(i) bcmswap32(i) |
||||
#define htol16(i) bcmswap16(i) |
||||
#define htol32(i) bcmswap32(i) |
||||
#endif /* IL_BIGENDIAN */ |
||||
#endif /* hton16 */ |
||||
|
||||
#ifndef IL_BIGENDIAN |
||||
#define ltoh16_buf(buf, i) |
||||
#define htol16_buf(buf, i) |
||||
#else |
||||
#define ltoh16_buf(buf, i) bcmswap16_buf((uint16*)buf, i) |
||||
#define htol16_buf(buf, i) bcmswap16_buf((uint16*)buf, i) |
||||
#endif /* IL_BIGENDIAN */ |
||||
|
||||
/*
|
||||
* store 16-bit value to unaligned little endian byte array. |
||||
*/ |
||||
static INLINE void |
||||
htol16_ua_store(uint16 val, uint8 *bytes) |
||||
{ |
||||
bytes[0] = val&0xff; |
||||
bytes[1] = val>>8; |
||||
} |
||||
|
||||
/*
|
||||
* store 32-bit value to unaligned little endian byte array. |
||||
*/ |
||||
static INLINE void |
||||
htol32_ua_store(uint32 val, uint8 *bytes) |
||||
{ |
||||
bytes[0] = val&0xff; |
||||
bytes[1] = (val>>8)&0xff; |
||||
bytes[2] = (val>>16)&0xff; |
||||
bytes[3] = val>>24; |
||||
} |
||||
|
||||
/*
|
||||
* store 16-bit value to unaligned network(big) endian byte array. |
||||
*/ |
||||
static INLINE void |
||||
hton16_ua_store(uint16 val, uint8 *bytes) |
||||
{ |
||||
bytes[1] = val&0xff; |
||||
bytes[0] = val>>8; |
||||
} |
||||
|
||||
/*
|
||||
* store 32-bit value to unaligned network(big) endian byte array. |
||||
*/ |
||||
static INLINE void |
||||
hton32_ua_store(uint32 val, uint8 *bytes) |
||||
{ |
||||
bytes[3] = val&0xff; |
||||
bytes[2] = (val>>8)&0xff; |
||||
bytes[1] = (val>>16)&0xff; |
||||
bytes[0] = val>>24; |
||||
} |
||||
|
||||
/*
|
||||
* load 16-bit value from unaligned little endian byte array. |
||||
*/ |
||||
static INLINE uint16 |
||||
ltoh16_ua(void *bytes) |
||||
{ |
||||
return (((uint8*)bytes)[1]<<8)+((uint8 *)bytes)[0]; |
||||
} |
||||
|
||||
/*
|
||||
* load 32-bit value from unaligned little endian byte array. |
||||
*/ |
||||
static INLINE uint32 |
||||
ltoh32_ua(void *bytes) |
||||
{ |
||||
return (((uint8*)bytes)[3]<<24)+(((uint8*)bytes)[2]<<16)+ |
||||
(((uint8*)bytes)[1]<<8)+((uint8*)bytes)[0]; |
||||
} |
||||
|
||||
/*
|
||||
* load 16-bit value from unaligned big(network) endian byte array. |
||||
*/ |
||||
static INLINE uint16 |
||||
ntoh16_ua(void *bytes) |
||||
{ |
||||
return (((uint8*)bytes)[0]<<8)+((uint8*)bytes)[1]; |
||||
} |
||||
|
||||
/*
|
||||
* load 32-bit value from unaligned big(network) endian byte array. |
||||
*/ |
||||
static INLINE uint32 |
||||
ntoh32_ua(void *bytes) |
||||
{ |
||||
return (((uint8*)bytes)[0]<<24)+(((uint8*)bytes)[1]<<16)+ |
||||
(((uint8*)bytes)[2]<<8)+((uint8*)bytes)[3]; |
||||
} |
||||
|
||||
#define ltoh_ua(ptr) (\ |
||||
sizeof(*(ptr)) == sizeof(uint8) ? *(uint8 *)ptr : \
|
||||
sizeof(*(ptr)) == sizeof(uint16) ? (((uint8 *)ptr)[1]<<8)+((uint8 *)ptr)[0] : \
|
||||
(((uint8 *)ptr)[3]<<24)+(((uint8 *)ptr)[2]<<16)+(((uint8 *)ptr)[1]<<8)+((uint8 *)ptr)[0] \
|
||||
) |
||||
|
||||
#define ntoh_ua(ptr) (\ |
||||
sizeof(*(ptr)) == sizeof(uint8) ? *(uint8 *)ptr : \
|
||||
sizeof(*(ptr)) == sizeof(uint16) ? (((uint8 *)ptr)[0]<<8)+((uint8 *)ptr)[1] : \
|
||||
(((uint8 *)ptr)[0]<<24)+(((uint8 *)ptr)[1]<<16)+(((uint8 *)ptr)[2]<<8)+((uint8 *)ptr)[3] \
|
||||
) |
||||
|
||||
#endif /* _BCMENDIAN_H_ */ |
@ -1,24 +0,0 @@ |
||||
/*
|
||||
* Misc system wide parameters. |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
*/ |
||||
|
||||
#ifndef _bcmparams_h_ |
||||
#define _bcmparams_h_ |
||||
|
||||
#define VLAN_MAXVID 15 /* Max. VLAN ID supported/allowed */ |
||||
|
||||
#define VLAN_NUMPRIS 8 /* # of prio, start from 0 */ |
||||
|
||||
#define DEV_NUMIFS 16 /* Max. # of devices/interfaces supported */ |
||||
|
||||
#define WL_MAXBSSCFG 16 /* maximum number of BSS Configs we can configure */ |
||||
|
||||
#endif |
File diff suppressed because it is too large
Load Diff
@ -1,69 +0,0 @@ |
||||
/*
|
||||
* RoboSwitch setup functions |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _bcm_robo_h_ |
||||
#define _bcm_robo_h_ |
||||
#include <switch-core.h> |
||||
|
||||
#define DEVID5325 0x25 /* 5325 (Not really be we fake it) */ |
||||
|
||||
/* Forward declaration */ |
||||
typedef struct robo_info_s robo_info_t; |
||||
|
||||
/* Device access/config oprands */ |
||||
typedef struct { |
||||
/* low level routines */ |
||||
void (*enable_mgmtif)(robo_info_t *robo); /* enable mgmt i/f, optional */ |
||||
void (*disable_mgmtif)(robo_info_t *robo); /* disable mgmt i/f, optional */ |
||||
int (*write_reg)(robo_info_t *robo, uint8 page, uint8 reg, void *val, int len); |
||||
int (*read_reg)(robo_info_t *robo, uint8 page, uint8 reg, void *val, int len); |
||||
/* description */ |
||||
char *desc; |
||||
} dev_ops_t; |
||||
|
||||
|
||||
typedef uint16 (*miird_f)(void *h, int add, int off); |
||||
typedef void (*miiwr_f)(void *h, int add, int off, uint16 val); |
||||
|
||||
/* Private state per RoboSwitch */ |
||||
struct robo_info_s { |
||||
sb_t *sbh; /* SiliconBackplane handle */ |
||||
char *vars; /* nvram variables handle */ |
||||
void *h; /* dev handle */ |
||||
uint16 devid; /* Device id for the switch */ |
||||
char *name; /* Linux device name */ |
||||
char macaddr[6]; |
||||
|
||||
dev_ops_t *ops; /* device ops */ |
||||
uint8 page; /* current page */ |
||||
|
||||
/* SPI */ |
||||
uint32 ss, sck, mosi, miso; /* GPIO mapping */ |
||||
|
||||
/* MII */ |
||||
miird_f miird; |
||||
miiwr_f miiwr; |
||||
}; |
||||
|
||||
extern robo_info_t *bcm_robo_attach(sb_t *sbh, void *h, char *name, char *vars, miird_f miird, miiwr_f miiwr); |
||||
extern void bcm_robo_detach(robo_info_t *robo); |
||||
extern int bcm_robo_enable_device(robo_info_t *robo); |
||||
extern int bcm_robo_config_vlan(robo_info_t *robo, uint8 *mac_addr); |
||||
extern int bcm_robo_enable_switch(robo_info_t *robo); |
||||
extern void bcm_robo_set_macaddr(robo_info_t *robo, char *macaddr); |
||||
|
||||
#ifdef BCMDBG |
||||
extern void robo_dump_regs(robo_info_t *robo, struct bcmstrbuf *b); |
||||
#endif /* BCMDBG */ |
||||
|
||||
#endif /* _bcm_robo_h_ */ |
@ -1,61 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 02/25/00 Hav Khauv Initial version. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef BITS_H |
||||
#define BITS_H |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Bit Mask definitions */ |
||||
/******************************************************************************/ |
||||
|
||||
#define BIT_NONE 0x00 |
||||
#define BIT_0 0x01 |
||||
#define BIT_1 0x02 |
||||
#define BIT_2 0x04 |
||||
#define BIT_3 0x08 |
||||
#define BIT_4 0x10 |
||||
#define BIT_5 0x20 |
||||
#define BIT_6 0x40 |
||||
#define BIT_7 0x80 |
||||
#define BIT_8 0x0100 |
||||
#define BIT_9 0x0200 |
||||
#define BIT_10 0x0400 |
||||
#define BIT_11 0x0800 |
||||
#define BIT_12 0x1000 |
||||
#define BIT_13 0x2000 |
||||
#define BIT_14 0x4000 |
||||
#define BIT_15 0x8000 |
||||
#define BIT_16 0x010000 |
||||
#define BIT_17 0x020000 |
||||
#define BIT_18 0x040000 |
||||
#define BIT_19 0x080000 |
||||
#define BIT_20 0x100000 |
||||
#define BIT_21 0x200000 |
||||
#define BIT_22 0x400000 |
||||
#define BIT_23 0x800000 |
||||
#define BIT_24 0x01000000 |
||||
#define BIT_25 0x02000000 |
||||
#define BIT_26 0x04000000 |
||||
#define BIT_27 0x08000000 |
||||
#define BIT_28 0x10000000 |
||||
#define BIT_29 0x20000000 |
||||
#define BIT_30 0x40000000 |
||||
#define BIT_31 0x80000000 |
||||
|
||||
|
||||
|
||||
#endif /* BITS_H */ |
||||
|
@ -1,289 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* (c) COPYRIGHT 2001-2004 Broadcom Corporation, ALL RIGHTS RESERVED. */ |
||||
/* */ |
||||
/* Name: F W _ L S O 0 5. H */ |
||||
/* Author : Kevin Tran */ |
||||
/* Version: 1.2 */ |
||||
/* */ |
||||
/* Module Description: This file contains firmware binary code of TCP */ |
||||
/* Segmentation firmware (BCM5705). */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 08/10/02 Kevin Tran Incarnation. */ |
||||
/* 02/02/04 Kevin Tran Added Support for BCM5788. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef __FW_LSO05_H__ |
||||
#define __FW_LSO05_H__ |
||||
|
||||
int t3StkOffLd05FwReleaseMajor = 0x1; |
||||
int t3StkOffLd05FwReleaseMinor = 0x2; |
||||
int t3StkOffLd05FwReleaseFix = 0x0; |
||||
U32 t3StkOffLd05FwStartAddr = 0x00010000; |
||||
U32 t3StkOffLd05FwTextAddr = 0x00010000; |
||||
int t3StkOffLd05FwTextLen = 0xe90; |
||||
U32 t3StkOffLd05FwRodataAddr = 0x00010e90; |
||||
int t3StkOffLd05FwRodataLen = 0x50; |
||||
U32 t3StkOffLd05FwDataAddr = 0x00010f00; |
||||
int t3StkOffLd05FwDataLen = 0x20; |
||||
U32 t3StkOffLd05FwSbssAddr = 0x00010f20; |
||||
int t3StkOffLd05FwSbssLen = 0x28; |
||||
U32 t3StkOffLd05FwBssAddr = 0x00010f50; |
||||
int t3StkOffLd05FwBssLen = 0x88; |
||||
U32 t3StkOffLd05FwText[(0xe90/4) + 1] = { |
||||
0xc004003, 0x0, 0x10f04,
|
||||
0x0, 0x10000003, 0x0, 0xd,
|
||||
0xd, 0x3c1d0001, 0x37bde000, 0x3a0f021,
|
||||
0x3c100001, 0x26100000, 0xc004010, 0x0,
|
||||
0xd, 0x27bdffe0, 0x3c04fefe, 0xafbf0018,
|
||||
0xc0042e8, 0x34840002, 0xc004364, 0x0,
|
||||
0x3c030001, 0x90630f34, 0x24020002, 0x3c040001,
|
||||
0x24840e9c, 0x14620003, 0x24050001, 0x3c040001,
|
||||
0x24840e90, 0x24060002, 0x3821, 0xafa00010,
|
||||
0xc004378, 0xafa00014, 0xc00402c, 0x0,
|
||||
0x8fbf0018, 0x3e00008, 0x27bd0020, 0x0,
|
||||
0x0, 0x27bdffe0, 0xafbf001c, 0xafb20018,
|
||||
0xafb10014, 0xc0042d4, 0xafb00010, 0x3c128000,
|
||||
0x24110001, 0x8f706810, 0x32020400, 0x10400007,
|
||||
0x0, 0x8f641008, 0x921024, 0x14400003,
|
||||
0x0, 0xc004064, 0x0, 0x3c020001,
|
||||
0x90420f56, 0x10510003, 0x32020200, 0x1040fff1,
|
||||
0x0, 0xc0041b4, 0x0, 0x8004034,
|
||||
0x0, 0x8fbf001c, 0x8fb20018, 0x8fb10014,
|
||||
0x8fb00010, 0x3e00008, 0x27bd0020, 0x27bdffe0,
|
||||
0x3c040001, 0x24840eb0, 0x2821, 0x3021,
|
||||
0x3821, 0xafbf0018, 0xafa00010, 0xc004378,
|
||||
0xafa00014, 0xd021, 0x24020130, 0xaf625000,
|
||||
0x3c010001, 0xa4200f50, 0x3c010001, 0xa0200f57,
|
||||
0x8fbf0018, 0x3e00008, 0x27bd0020, 0x0,
|
||||
0x0, 0x3c030001, 0x24630f60, 0x90620000,
|
||||
0x27bdfff0, 0x14400003, 0x80c021, 0x8004073,
|
||||
0x4821, 0x3c022000, 0x3021024, 0x10400003,
|
||||
0x24090002, 0x8004073, 0xa0600000, 0x24090001,
|
||||
0x181040, 0x30431f80, 0x346f8008, 0x1520004b,
|
||||
0x25eb0028, 0x3c040001, 0x832021, 0x8c848010,
|
||||
0x3c050001, 0x24a50f7a, 0x41402, 0xa0a20000,
|
||||
0x3c010001, 0xa0240f7b, 0x3c020001, 0x431021,
|
||||
0x94428014, 0x3c010001, 0xa0220f7c, 0x3c0c0001,
|
||||
0x1836021, 0x8d8c8018, 0x304200ff, 0x24420008,
|
||||
0x220c3, 0x24020001, 0x3c010001, 0xa0220f60,
|
||||
0x124102b, 0x1040000c, 0x3821, 0x24a6000e,
|
||||
0x1602821, 0x8ca20000, 0x8ca30004, 0x24a50008,
|
||||
0x24e70001, 0xacc20000, 0xacc30004, 0xe4102b,
|
||||
0x1440fff8, 0x24c60008, 0x3821, 0x3c080001,
|
||||
0x25080f7b, 0x91060000, 0x3c020001, 0x90420f7c,
|
||||
0x2503000d, 0xc32821, 0x461023, 0x21fc2,
|
||||
0x431021, 0x21043, 0x1840000c, 0x2021,
|
||||
0x91020001, 0x461023, 0x21fc2, 0x431021,
|
||||
0x21843, 0x94a20000, 0x24e70001, 0x822021,
|
||||
0xe3102a, 0x1440fffb, 0x24a50002, 0x41c02,
|
||||
0x3082ffff, 0x622021, 0x41402, 0x822021,
|
||||
0x3c02ffff, 0x1821024, 0x3083ffff, 0x431025,
|
||||
0x3c010001, 0x80040fa, 0xac220f80, 0x3c050001,
|
||||
0x24a50f7c, 0x90a20000, 0x3c0c0001, 0x1836021,
|
||||
0x8d8c8018, 0x220c2, 0x1080000e, 0x3821,
|
||||
0x1603021, 0x24a5000c, 0x8ca20000, 0x8ca30004,
|
||||
0x24a50008, 0x24e70001, 0xacc20000, 0xacc30004,
|
||||
0xe4102b, 0x1440fff8, 0x24c60008, 0x3c050001,
|
||||
0x24a50f7c, 0x90a20000, 0x30430007, 0x24020004,
|
||||
0x10620011, 0x28620005, 0x10400005, 0x24020002,
|
||||
0x10620008, 0x710c0, 0x80040fa, 0x0,
|
||||
0x24020006, 0x1062000e, 0x710c0, 0x80040fa,
|
||||
0x0, 0xa21821, 0x9463000c, 0x4b1021,
|
||||
0x80040fa, 0xa4430000, 0x710c0, 0xa21821,
|
||||
0x8c63000c, 0x4b1021, 0x80040fa, 0xac430000,
|
||||
0xa21821, 0x8c63000c, 0x4b2021, 0xa21021,
|
||||
0xac830000, 0x94420010, 0xa4820004, 0x95e70006,
|
||||
0x3c020001, 0x90420f7c, 0x3c030001, 0x90630f7a,
|
||||
0xe2c823, 0x3c020001, 0x90420f7b, 0x24630028,
|
||||
0x1e34021, 0x24420028, 0x15200012, 0x1e23021,
|
||||
0x94c2000c, 0x3c010001, 0xa4220f78, 0x94c20004,
|
||||
0x94c30006, 0x3c010001, 0xa4200f76, 0x3c010001,
|
||||
0xa4200f72, 0x21400, 0x431025, 0x3c010001,
|
||||
0xac220f6c, 0x95020004, 0x3c010001, 0x8004124,
|
||||
0xa4220f70, 0x3c020001, 0x94420f70, 0x3c030001,
|
||||
0x94630f72, 0x431021, 0xa5020004, 0x3c020001,
|
||||
0x94420f6c, 0xa4c20004, 0x3c020001, 0x8c420f6c,
|
||||
0xa4c20006, 0x3c040001, 0x94840f72, 0x3c020001,
|
||||
0x94420f70, 0x3c0a0001, 0x954a0f76, 0x441821,
|
||||
0x3063ffff, 0x62182a, 0x24020002, 0x1122000b,
|
||||
0x832023, 0x3c030001, 0x94630f78, 0x30620009,
|
||||
0x10400006, 0x3062fff6, 0xa4c2000c, 0x3c020001,
|
||||
0x94420f78, 0x30420009, 0x1425023, 0x24020001,
|
||||
0x1122001b, 0x29220002, 0x50400005, 0x24020002,
|
||||
0x11200007, 0x31a2ffff, 0x8004197, 0x0,
|
||||
0x1122001d, 0x24020016, 0x8004197, 0x31a2ffff,
|
||||
0x3c0e0001, 0x95ce0f80, 0x10800005, 0x1806821,
|
||||
0x1c42021, 0x41c02, 0x3082ffff, 0x627021,
|
||||
0xe1027, 0xa502000a, 0x3c030001, 0x90630f7b,
|
||||
0x31a2ffff, 0xe21021, 0x800418d, 0x432023,
|
||||
0x3c020001, 0x94420f80, 0x442021, 0x41c02,
|
||||
0x3082ffff, 0x622021, 0x807021, 0x41027,
|
||||
0x8004185, 0xa502000a, 0x3c050001, 0x24a50f7a,
|
||||
0x90a30000, 0x14620002, 0x24e2fff2, 0xa5e20034,
|
||||
0x90a20000, 0xe21023, 0xa5020002, 0x3c030001,
|
||||
0x94630f80, 0x3c020001, 0x94420f5a, 0x30e5ffff,
|
||||
0x641821, 0x451023, 0x622023, 0x41c02,
|
||||
0x3082ffff, 0x622021, 0x41027, 0xa502000a,
|
||||
0x3c030001, 0x90630f7c, 0x24620001, 0x14a20005,
|
||||
0x807021, 0x1631021, 0x90420000, 0x8004185,
|
||||
0x26200, 0x24620002, 0x14a20003, 0x306200fe,
|
||||
0x4b1021, 0x944c0000, 0x3c020001, 0x94420f82,
|
||||
0x3183ffff, 0x3c040001, 0x90840f7b, 0x431021,
|
||||
0xe21021, 0x442023, 0x8a2021, 0x41c02,
|
||||
0x3082ffff, 0x622021, 0x41402, 0x822021,
|
||||
0x806821, 0x41027, 0xa4c20010, 0x31a2ffff,
|
||||
0xe1c00, 0x431025, 0x3c040001, 0x24840f72,
|
||||
0xade20010, 0x94820000, 0x3c050001, 0x94a50f76,
|
||||
0x3c030001, 0x8c630f6c, 0x24420001, 0xb92821,
|
||||
0xa4820000, 0x3322ffff, 0x622021, 0x83182b,
|
||||
0x3c010001, 0xa4250f76, 0x10600003, 0x24a2ffff,
|
||||
0x3c010001, 0xa4220f76, 0x3c024000, 0x3021025,
|
||||
0x3c010001, 0xac240f6c, 0xaf621008, 0x3e00008,
|
||||
0x27bd0010, 0x3c030001, 0x90630f56, 0x27bdffe8,
|
||||
0x24020001, 0xafbf0014, 0x10620026, 0xafb00010,
|
||||
0x8f620cf4, 0x2442ffff, 0x3042007f, 0x21100,
|
||||
0x8c434000, 0x3c010001, 0xac230f64, 0x8c434008,
|
||||
0x24444000, 0x8c5c4004, 0x30620040, 0x14400002,
|
||||
0x24020088, 0x24020008, 0x3c010001, 0xa4220f68,
|
||||
0x30620004, 0x10400005, 0x24020001, 0x3c010001,
|
||||
0xa0220f57, 0x80041d5, 0x31402, 0x3c010001,
|
||||
0xa0200f57, 0x31402, 0x3c010001, 0xa4220f54,
|
||||
0x9483000c, 0x24020001, 0x3c010001, 0xa4200f50,
|
||||
0x3c010001, 0xa0220f56, 0x3c010001, 0xa4230f62,
|
||||
0x24020001, 0x1342001e, 0x0, 0x13400005,
|
||||
0x24020003, 0x13420067, 0x0, 0x80042cf,
|
||||
0x0, 0x3c020001, 0x94420f62, 0x241a0001,
|
||||
0x3c010001, 0xa4200f5e, 0x3c010001, 0xa4200f52,
|
||||
0x304407ff, 0x21bc2, 0x31823, 0x3063003e,
|
||||
0x34630036, 0x21242, 0x3042003c, 0x621821,
|
||||
0x3c010001, 0xa4240f58, 0x832021, 0x24630030,
|
||||
0x3c010001, 0xa4240f5a, 0x3c010001, 0xa4230f5c,
|
||||
0x3c060001, 0x24c60f52, 0x94c50000, 0x94c30002,
|
||||
0x3c040001, 0x94840f5a, 0x651021, 0x44102a,
|
||||
0x10400013, 0x3c108000, 0xa31021, 0xa4c20000,
|
||||
0x3c02a000, 0xaf620cf4, 0x3c010001, 0xa0200f56,
|
||||
0x8f641008, 0x901024, 0x14400003, 0x0,
|
||||
0xc004064, 0x0, 0x8f620cf4, 0x501024,
|
||||
0x104000b7, 0x0, 0x800420f, 0x0,
|
||||
0x3c030001, 0x94630f50, 0x851023, 0xa4c40000,
|
||||
0x621821, 0x3042ffff, 0x3c010001, 0xa4230f50,
|
||||
0xaf620ce8, 0x3c020001, 0x94420f68, 0x34420024,
|
||||
0xaf620cec, 0x94c30002, 0x3c020001, 0x94420f50,
|
||||
0x14620012, 0x3c028000, 0x3c108000, 0x3c02a000,
|
||||
0xaf620cf4, 0x3c010001, 0xa0200f56, 0x8f641008,
|
||||
0x901024, 0x14400003, 0x0, 0xc004064,
|
||||
0x0, 0x8f620cf4, 0x501024, 0x1440fff7,
|
||||
0x0, 0x80042cf, 0x241a0003, 0xaf620cf4,
|
||||
0x3c108000, 0x8f641008, 0x901024, 0x14400003,
|
||||
0x0, 0xc004064, 0x0, 0x8f620cf4,
|
||||
0x501024, 0x1440fff7, 0x0, 0x80042cf,
|
||||
0x241a0003, 0x3c070001, 0x24e70f50, 0x94e20000,
|
||||
0x3821021, 0xaf620ce0, 0x3c020001, 0x8c420f64,
|
||||
0xaf620ce4, 0x3c050001, 0x94a50f54, 0x94e30000,
|
||||
0x3c040001, 0x94840f58, 0x3c020001, 0x94420f5e,
|
||||
0xa32823, 0x822023, 0x30a6ffff, 0x3083ffff,
|
||||
0xc3102b, 0x14400043, 0x0, 0x3c020001,
|
||||
0x94420f5c, 0x21400, 0x621025, 0xaf620ce8,
|
||||
0x94e20000, 0x3c030001, 0x94630f54, 0x441021,
|
||||
0xa4e20000, 0x3042ffff, 0x14430021, 0x3c020008,
|
||||
0x3c020001, 0x90420f57, 0x10400006, 0x3c03000c,
|
||||
0x3c020001, 0x94420f68, 0x34630624, 0x800427c,
|
||||
0xd021, 0x3c020001, 0x94420f68, 0x3c030008,
|
||||
0x34630624, 0x431025, 0xaf620cec, 0x3c108000,
|
||||
0x3c02a000, 0xaf620cf4, 0x3c010001, 0xa0200f56,
|
||||
0x8f641008, 0x901024, 0x14400003, 0x0,
|
||||
0xc004064, 0x0, 0x8f620cf4, 0x501024,
|
||||
0x10400015, 0x0, 0x8004283, 0x0,
|
||||
0x3c030001, 0x94630f68, 0x34420624, 0x3c108000,
|
||||
0x621825, 0x3c028000, 0xaf630cec, 0xaf620cf4,
|
||||
0x8f641008, 0x901024, 0x14400003, 0x0,
|
||||
0xc004064, 0x0, 0x8f620cf4, 0x501024,
|
||||
0x1440fff7, 0x0, 0x3c010001, 0x80042cf,
|
||||
0xa4200f5e, 0x3c020001, 0x94420f5c, 0x21400,
|
||||
0xc21025, 0xaf620ce8, 0x3c020001, 0x90420f57,
|
||||
0x10400009, 0x3c03000c, 0x3c020001, 0x94420f68,
|
||||
0x34630624, 0xd021, 0x431025, 0xaf620cec,
|
||||
0x80042c1, 0x3c108000, 0x3c020001, 0x94420f68,
|
||||
0x3c030008, 0x34630604, 0x431025, 0xaf620cec,
|
||||
0x3c020001, 0x94420f5e, 0x451021, 0x3c010001,
|
||||
0xa4220f5e, 0x3c108000, 0x3c02a000, 0xaf620cf4,
|
||||
0x3c010001, 0xa0200f56, 0x8f641008, 0x901024,
|
||||
0x14400003, 0x0, 0xc004064, 0x0,
|
||||
0x8f620cf4, 0x501024, 0x1440fff7, 0x0,
|
||||
0x8fbf0014, 0x8fb00010, 0x3e00008, 0x27bd0018,
|
||||
0x0, 0x27bdffe0, 0x3c040001, 0x24840ec0,
|
||||
0x2821, 0x3021, 0x3821, 0xafbf0018,
|
||||
0xafa00010, 0xc004378, 0xafa00014, 0xd021,
|
||||
0x24020130, 0xaf625000, 0x3c010001, 0xa4200f50,
|
||||
0x3c010001, 0xa0200f57, 0x8fbf0018, 0x3e00008,
|
||||
0x27bd0020, 0x27bdffe8, 0x3c1bc000, 0xafbf0014,
|
||||
0xafb00010, 0xaf60680c, 0x8f626804, 0x34420082,
|
||||
0xaf626804, 0x8f634000, 0x24020b50, 0x3c010001,
|
||||
0xac220f20, 0x24020b78, 0x3c010001, 0xac220f30,
|
||||
0x34630002, 0xaf634000, 0xc004315, 0x808021,
|
||||
0x3c010001, 0xa0220f34, 0x304200ff, 0x24030002,
|
||||
0x14430005, 0x0, 0x3c020001, 0x8c420f20,
|
||||
0x8004308, 0xac5000c0, 0x3c020001, 0x8c420f20,
|
||||
0xac5000bc, 0x8f624434, 0x8f634438, 0x8f644410,
|
||||
0x3c010001, 0xac220f28, 0x3c010001, 0xac230f38,
|
||||
0x3c010001, 0xac240f24, 0x8fbf0014, 0x8fb00010,
|
||||
0x3e00008, 0x27bd0018, 0x3e00008, 0x24020001,
|
||||
0x27bdfff8, 0x18800009, 0x2821, 0x8f63680c,
|
||||
0x8f62680c, 0x1043fffe, 0x0, 0x24a50001,
|
||||
0xa4102a, 0x1440fff9, 0x0, 0x3e00008,
|
||||
0x27bd0008, 0x8f634450, 0x3c020001, 0x8c420f28,
|
||||
0x31c02, 0x43102b, 0x14400008, 0x3c038000,
|
||||
0x3c040001, 0x8c840f38, 0x8f624450, 0x21c02,
|
||||
0x83102b, 0x1040fffc, 0x3c038000, 0xaf634444,
|
||||
0x8f624444, 0x431024, 0x1440fffd, 0x0,
|
||||
0x8f624448, 0x3e00008, 0x3042ffff, 0x3082ffff,
|
||||
0x2442e000, 0x2c422001, 0x14400003, 0x3c024000,
|
||||
0x8004347, 0x2402ffff, 0x822025, 0xaf645c38,
|
||||
0x8f625c30, 0x30420002, 0x1440fffc, 0x1021,
|
||||
0x3e00008, 0x0, 0x8f624450, 0x3c030001,
|
||||
0x8c630f24, 0x8004350, 0x3042ffff, 0x8f624450,
|
||||
0x3042ffff, 0x43102b, 0x1440fffc, 0x0,
|
||||
0x3e00008, 0x0, 0x27bdffe0, 0x802821,
|
||||
0x3c040001, 0x24840ed0, 0x3021, 0x3821,
|
||||
0xafbf0018, 0xafa00010, 0xc004378, 0xafa00014,
|
||||
0x800435f, 0x0, 0x8fbf0018, 0x3e00008,
|
||||
0x27bd0020, 0x3c020001, 0x3442d600, 0x3c030001,
|
||||
0x3463d600, 0x3c040001, 0x3484ddff, 0x3c010001,
|
||||
0xac220f40, 0x24020040, 0x3c010001, 0xac220f44,
|
||||
0x3c010001, 0xac200f3c, 0xac600000, 0x24630004,
|
||||
0x83102b, 0x5040fffd, 0xac600000, 0x3e00008,
|
||||
0x0, 0x804821, 0x8faa0010, 0x3c020001,
|
||||
0x8c420f3c, 0x3c040001, 0x8c840f44, 0x8fab0014,
|
||||
0x24430001, 0x44102b, 0x3c010001, 0xac230f3c,
|
||||
0x14400003, 0x4021, 0x3c010001, 0xac200f3c,
|
||||
0x3c020001, 0x8c420f3c, 0x3c030001, 0x8c630f40,
|
||||
0x91240000, 0x21140, 0x431021, 0x481021,
|
||||
0x25080001, 0xa0440000, 0x29020008, 0x1440fff4,
|
||||
0x25290001, 0x3c020001, 0x8c420f3c, 0x3c030001,
|
||||
0x8c630f40, 0x8f64680c, 0x21140, 0x431021,
|
||||
0xac440008, 0xac45000c, 0xac460010, 0xac470014,
|
||||
0xac4a0018, 0x3e00008, 0xac4b001c, 0x0,
|
||||
0x0, 0x0 }; |
||||
U32 t3StkOffLd05FwRodata[(0x50/4) + 1] = { |
||||
0x4d61696e,
|
||||
0x43707542, 0x0, 0x4d61696e, 0x43707541,
|
||||
0x0, 0x0, 0x0, 0x73746b6f,
|
||||
0x66666c64, 0x0, 0x0, 0x73746b6f,
|
||||
0x66666c64, 0x0, 0x0, 0x66617461,
|
||||
0x6c457272, 0x0, 0x0, 0x0 }; |
||||
U32 t3StkOffLd05FwData[(0x20/4) + 1] = { |
||||
0x0,
|
||||
0x73746b6f, 0x66666c64, 0x5f76312e, 0x322e3000,
|
||||
0x0, 0x0, 0x0, 0x0 }; |
||||
|
||||
#endif /* __FW_LSO05_H__ */ |
@ -1,519 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* (c) COPYRIGHT 2000-2003 Broadcom Corporation, ALL RIGHTS RESERVED. */ |
||||
/* */ |
||||
/* Name: F W _ S T K O F F L D . H */ |
||||
/* Author : Kevin Tran */ |
||||
/* Version : 1.6 */ |
||||
/* */ |
||||
/* Module Description: This file contains firmware binary code of for TCP/IP */ |
||||
/* stack offload support. Currently, this firmware supports the following */ |
||||
/* features: */ |
||||
/* 1. TCP segmentation (aka Large Send Offload -- LSO) */ |
||||
/* 2. UDP Checksum offload support for IP fragmented UDP frames. */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 07/17/01 Kevin Tran Incarnation. */ |
||||
/* 10/10/01 Kevin Tran Added UDP checksum offload support. */ |
||||
/* 10/20/01 Kevin Tran Fixed a problem where pseudo checksum is not */ |
||||
/* calculated correctly in case of IP */ |
||||
/* fragmentation case. */ |
||||
/* 10/30/01 Kevin Tran Fixed a problem where checksum is incorrectly */ |
||||
/* computed if bit BD_FLAG_TCP_UDP_CKSUM is set */ |
||||
/* in Send BDs. */ |
||||
/* 05/30/02 Kevin Tran Fixed a problem where UDP checksum is */ |
||||
/* incorrectly computed if the length of data is */ |
||||
/* less than 6 bytes in the last packetst of */ |
||||
/* of a chain of fragmented IP/UDP packets. */ |
||||
/* 12/01/02 Kevin Tran Fixed a problem where firmware might lockup */ |
||||
/* in a certain test scenario with BCM5704. */ |
||||
/* 12/10/02 Kevin Tran Fixed a problem where IP checksum might be */ |
||||
/* incorrectly calculated in some corner cases. */ |
||||
/* This problem should ONLY happen with BCM5702/ */ |
||||
/* BCM5703/BCM5704 ASICs. */ |
||||
/* 06/20/03 Kevin Tran Optimized performance so that pre-DMA code */ |
||||
/* doesn't have to wait until the first packet */ |
||||
/* is completely DMAed before it can setup DMAs */ |
||||
/* for subsequent packets. This requires host */ |
||||
/* driver to pass IP/TCP option lengths if any */ |
||||
/* to F/W via bit 15..12 of Send BD flag. */ |
||||
/* 08/12/03 Kevin Tran Fixed a problem where UDP checksum doesn't */ |
||||
/* work when the host driver seeds pseudo */ |
||||
/* checksum. */ |
||||
/* 12/24/03 Kevin Tran Fixed a problem where VLAN tag is not */ |
||||
/* inserted correctly in LSO mode. */ |
||||
/* 01/16/04 Kevin Tran Fixed a problem where Ethernet Type is not */ |
||||
/* set to 0x8870 when the outgoing LSO packet is */ |
||||
/* jumbo frame with SNAP encapsulation. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef __FW_STKOFFLD_H__ |
||||
#define __FW_STKOFFLD_H__ |
||||
|
||||
typedef LM_UINT32 U32; |
||||
|
||||
int t3StkOffLdFwReleaseMajor = 0x1; |
||||
int t3StkOffLdFwReleaseMinor = 0x6; |
||||
int t3StkOffLdFwReleaseFix = 0x0; |
||||
U32 t3StkOffLdFwStartAddr = 0x08000000; |
||||
U32 t3StkOffLdFwTextAddr = 0x08000000; |
||||
int t3StkOffLdFwTextLen = 0x1aa0; |
||||
U32 t3StkOffLdFwRodataAddr = 0x08001aa0; |
||||
int t3StkOffLdFwRodataLen = 0x60; |
||||
U32 t3StkOffLdFwDataAddr = 0x08001b20; |
||||
int t3StkOffLdFwDataLen = 0x30; |
||||
U32 t3StkOffLdFwSbssAddr = 0x08001b50; |
||||
int t3StkOffLdFwSbssLen = 0x2c; |
||||
U32 t3StkOffLdFwBssAddr = 0x08001b80; |
||||
int t3StkOffLdFwBssLen = 0x894; |
||||
U32 t3StkOffLdFwText[(0x1aa0/4) + 1] = { |
||||
0xe000003, 0x0, 0x8001b24,
|
||||
0x0, 0x10000003, 0x0, 0xd,
|
||||
0xd, 0x3c1d0800, 0x37bd4000, 0x3a0f021,
|
||||
0x3c100800, 0x26100000, 0xe000010, 0x0,
|
||||
0xd, 0x27bdffe0, 0x3c04fefe, 0xafbf0018,
|
||||
0xe0005d8, 0x34840002, 0xe000668, 0x0,
|
||||
0x3c030800, 0x90631b68, 0x24020002, 0x3c040800,
|
||||
0x24841aac, 0x14620003, 0x24050001, 0x3c040800,
|
||||
0x24841aa0, 0x24060006, 0x3821, 0xafa00010,
|
||||
0xe00067c, 0xafa00014, 0x8f625c50, 0x34420001,
|
||||
0xaf625c50, 0x8f625c90, 0x34420001, 0xaf625c90,
|
||||
0x2402ffff, 0xe000034, 0xaf625404, 0x8fbf0018,
|
||||
0x3e00008, 0x27bd0020, 0x0, 0x0,
|
||||
0x0, 0x27bdffe0, 0xafbf001c, 0xafb20018,
|
||||
0xafb10014, 0xe00005b, 0xafb00010, 0x24120002,
|
||||
0x24110001, 0x8f706820, 0x32020100, 0x10400003,
|
||||
0x0, 0xe0000bb, 0x0, 0x8f706820,
|
||||
0x32022000, 0x10400004, 0x32020001, 0xe0001f0,
|
||||
0x24040001, 0x32020001, 0x10400003, 0x0,
|
||||
0xe0000a3, 0x0, 0x3c020800, 0x90421b98,
|
||||
0x14520003, 0x0, 0xe0004c0, 0x0,
|
||||
0xa00003c, 0xaf715028, 0x8fbf001c, 0x8fb20018,
|
||||
0x8fb10014, 0x8fb00010, 0x3e00008, 0x27bd0020,
|
||||
0x27bdffe0, 0x3c040800, 0x24841ac0, 0x2821,
|
||||
0x3021, 0x3821, 0xafbf0018, 0xafa00010,
|
||||
0xe00067c, 0xafa00014, 0x3c040800, 0x248423d8,
|
||||
0xa4800000, 0x3c010800, 0xa0201b98, 0x3c010800,
|
||||
0xac201b9c, 0x3c010800, 0xac201ba0, 0x3c010800,
|
||||
0xac201ba4, 0x3c010800, 0xac201bac, 0x3c010800,
|
||||
0xac201bb8, 0x3c010800, 0xac201bbc, 0x8f624434,
|
||||
0x3c010800, 0xac221b88, 0x8f624438, 0x3c010800,
|
||||
0xac221b8c, 0x8f624410, 0xac80f7a8, 0x3c010800,
|
||||
0xac201b84, 0x3c010800, 0xac2023e0, 0x3c010800,
|
||||
0xac2023c8, 0x3c010800, 0xac2023cc, 0x3c010800,
|
||||
0xac202400, 0x3c010800, 0xac221b90, 0x8f620068,
|
||||
0x24030007, 0x21702, 0x10430005, 0x0,
|
||||
0x8f620068, 0x21702, 0x14400004, 0x24020001,
|
||||
0x3c010800, 0xa000097, 0xac20240c, 0xac820034,
|
||||
0x3c040800, 0x24841acc, 0x3c050800, 0x8ca5240c,
|
||||
0x3021, 0x3821, 0xafa00010, 0xe00067c,
|
||||
0xafa00014, 0x8fbf0018, 0x3e00008, 0x27bd0020,
|
||||
0x27bdffe0, 0x3c040800, 0x24841ad8, 0x2821,
|
||||
0x3021, 0x3821, 0xafbf0018, 0xafa00010,
|
||||
0xe00067c, 0xafa00014, 0xe00005b, 0x0,
|
||||
0xe0000b4, 0x2021, 0x8fbf0018, 0x3e00008,
|
||||
0x27bd0020, 0x24020001, 0x8f636820, 0x821004,
|
||||
0x21027, 0x621824, 0x3e00008, 0xaf636820,
|
||||
0x27bdffd0, 0xafbf002c, 0xafb60028, 0xafb50024,
|
||||
0xafb40020, 0xafb3001c, 0xafb20018, 0xafb10014,
|
||||
0xafb00010, 0x8f675c5c, 0x3c030800, 0x24631bbc,
|
||||
0x8c620000, 0x14470005, 0x3c0200ff, 0x3c020800,
|
||||
0x90421b98, 0x14400119, 0x3c0200ff, 0x3442fff8,
|
||||
0xe28824, 0xac670000, 0x111902, 0x306300ff,
|
||||
0x30e20003, 0x211c0, 0x622825, 0xa04021,
|
||||
0x71602, 0x3c030800, 0x90631b98, 0x3044000f,
|
||||
0x14600036, 0x804821, 0x24020001, 0x3c010800,
|
||||
0xa0221b98, 0x51100, 0x821025, 0x3c010800,
|
||||
0xac201b9c, 0x3c010800, 0xac201ba0, 0x3c010800,
|
||||
0xac201ba4, 0x3c010800, 0xac201bac, 0x3c010800,
|
||||
0xac201bb8, 0x3c010800, 0xac201bb0, 0x3c010800,
|
||||
0xac201bb4, 0x3c010800, 0xa42223d8, 0x9622000c,
|
||||
0x30437fff, 0x3c010800, 0xa4222410, 0x30428000,
|
||||
0x3c010800, 0xa4231bc6, 0x10400005, 0x24020001,
|
||||
0x3c010800, 0xac2223f4, 0xa000102, 0x2406003e,
|
||||
0x24060036, 0x3c010800, 0xac2023f4, 0x9622000a,
|
||||
0x3c030800, 0x94631bc6, 0x3c010800, 0xac2023f0,
|
||||
0x3c010800, 0xac2023f8, 0x21302, 0x21080,
|
||||
0xc21021, 0x621821, 0x3c010800, 0xa42223d0,
|
||||
0x3c010800, 0xa000115, 0xa4231b96, 0x9622000c,
|
||||
0x3c010800, 0xa42223ec, 0x3c040800, 0x24841b9c,
|
||||
0x8c820000, 0x21100, 0x3c010800, 0x220821,
|
||||
0xac311bc8, 0x8c820000, 0x21100, 0x3c010800,
|
||||
0x220821, 0xac271bcc, 0x8c820000, 0x25030001,
|
||||
0x306601ff, 0x21100, 0x3c010800, 0x220821,
|
||||
0xac261bd0, 0x8c820000, 0x21100, 0x3c010800,
|
||||
0x220821, 0xac291bd4, 0x96230008, 0x3c020800,
|
||||
0x8c421bac, 0x432821, 0x3c010800, 0xac251bac,
|
||||
0x9622000a, 0x30420004, 0x14400018, 0x61100,
|
||||
0x8f630c14, 0x3063000f, 0x2c620002, 0x1440000b,
|
||||
0x3c02c000, 0x8f630c14, 0x3c020800, 0x8c421b40,
|
||||
0x3063000f, 0x24420001, 0x3c010800, 0xac221b40,
|
||||
0x2c620002, 0x1040fff7, 0x3c02c000, 0xe21825,
|
||||
0xaf635c5c, 0x8f625c50, 0x30420002, 0x10400014,
|
||||
0x0, 0xa000147, 0x0, 0x3c030800,
|
||||
0x8c631b80, 0x3c040800, 0x94841b94, 0x1221025,
|
||||
0x3c010800, 0xa42223da, 0x24020001, 0x3c010800,
|
||||
0xac221bb8, 0x24630001, 0x85202a, 0x3c010800,
|
||||
0x10800003, 0xac231b80, 0x3c010800, 0xa4251b94,
|
||||
0x3c060800, 0x24c61b9c, 0x8cc20000, 0x24420001,
|
||||
0xacc20000, 0x28420080, 0x14400005, 0x0,
|
||||
0xe000656, 0x24040002, 0xa0001e6, 0x0,
|
||||
0x3c020800, 0x8c421bb8, 0x10400078, 0x24020001,
|
||||
0x3c050800, 0x90a51b98, 0x14a20072, 0x0,
|
||||
0x3c150800, 0x96b51b96, 0x3c040800, 0x8c841bac,
|
||||
0x32a3ffff, 0x83102a, 0x1440006c, 0x0,
|
||||
0x14830003, 0x0, 0x3c010800, 0xac2523f0,
|
||||
0x1060005c, 0x9021, 0x24d60004, 0x60a021,
|
||||
0x24d30014, 0x8ec20000, 0x28100, 0x3c110800,
|
||||
0x2308821, 0xe000625, 0x8e311bc8, 0x402821,
|
||||
0x10a00054, 0x0, 0x9628000a, 0x31020040,
|
||||
0x10400005, 0x2407180c, 0x8e22000c, 0x2407188c,
|
||||
0x21400, 0xaca20018, 0x3c030800, 0x701821,
|
||||
0x8c631bd0, 0x3c020800, 0x501021, 0x8c421bd4,
|
||||
0x31d00, 0x21400, 0x621825, 0xaca30014,
|
||||
0x8ec30004, 0x96220008, 0x432023, 0x3242ffff,
|
||||
0x3083ffff, 0x431021, 0x282102a, 0x14400002,
|
||||
0x2b23023, 0x803021, 0x8e620000, 0x30c4ffff,
|
||||
0x441021, 0xae620000, 0x8e220000, 0xaca20000,
|
||||
0x8e220004, 0x8e63fff4, 0x431021, 0xaca20004,
|
||||
0xa4a6000e, 0x8e62fff4, 0x441021, 0xae62fff4,
|
||||
0x96230008, 0x43102a, 0x14400005, 0x2469021,
|
||||
0x8e62fff0, 0xae60fff4, 0x24420001, 0xae62fff0,
|
||||
0xaca00008, 0x3242ffff, 0x14540008, 0x24020305,
|
||||
0x31020080, 0x54400001, 0x34e70010, 0x24020905,
|
||||
0xa4a2000c, 0xa0001cb, 0x34e70020, 0xa4a2000c,
|
||||
0x3c020800, 0x8c4223f0, 0x10400003, 0x3c024b65,
|
||||
0xa0001d3, 0x34427654, 0x3c02b49a, 0x344289ab,
|
||||
0xaca2001c, 0x30e2ffff, 0xaca20010, 0xe0005a2,
|
||||
0xa02021, 0x3242ffff, 0x54102b, 0x1440ffa9,
|
||||
0x0, 0x24020002, 0x3c010800, 0xa0001e6,
|
||||
0xa0221b98, 0x8ec2083c, 0x24420001, 0xa0001e6,
|
||||
0xaec2083c, 0xe0004c0, 0x0, 0x8fbf002c,
|
||||
0x8fb60028, 0x8fb50024, 0x8fb40020, 0x8fb3001c,
|
||||
0x8fb20018, 0x8fb10014, 0x8fb00010, 0x3e00008,
|
||||
0x27bd0030, 0x27bdffd0, 0xafbf0028, 0xafb30024,
|
||||
0xafb20020, 0xafb1001c, 0xafb00018, 0x8f725c9c,
|
||||
0x3c0200ff, 0x3442fff8, 0x3c070800, 0x24e71bb4,
|
||||
0x2428824, 0x9623000e, 0x8ce20000, 0x431021,
|
||||
0xace20000, 0x8e220010, 0x30420020, 0x14400011,
|
||||
0x809821, 0xe00063b, 0x2202021, 0x3c02c000,
|
||||
0x2421825, 0xaf635c9c, 0x8f625c90, 0x30420002,
|
||||
0x1040011e, 0x0, 0xaf635c9c, 0x8f625c90,
|
||||
0x30420002, 0x10400119, 0x0, 0xa00020d,
|
||||
0x0, 0x8e240008, 0x8e230014, 0x41402,
|
||||
0x231c0, 0x31502, 0x304201ff, 0x2442ffff,
|
||||
0x3042007f, 0x31942, 0x30637800, 0x21100,
|
||||
0x24424000, 0x624821, 0x9522000a, 0x3084ffff,
|
||||
0x30420008, 0x104000b0, 0x429c0, 0x3c020800,
|
||||
0x8c422400, 0x14400024, 0x24c50008, 0x94c20014,
|
||||
0x3c010800, 0xa42223d0, 0x8cc40010, 0x41402,
|
||||
0x3c010800, 0xa42223d2, 0x3c010800, 0xa42423d4,
|
||||
0x94c2000e, 0x3083ffff, 0x431023, 0x3c010800,
|
||||
0xac222408, 0x94c2001a, 0x3c010800, 0xac262400,
|
||||
0x3c010800, 0xac322404, 0x3c010800, 0xac2223fc,
|
||||
0x3c02c000, 0x2421825, 0xaf635c9c, 0x8f625c90,
|
||||
0x30420002, 0x104000e5, 0x0, 0xaf635c9c,
|
||||
0x8f625c90, 0x30420002, 0x104000e0, 0x0,
|
||||
0xa000246, 0x0, 0x94c2000e, 0x3c030800,
|
||||
0x946323d4, 0x434023, 0x3103ffff, 0x2c620008,
|
||||
0x1040001c, 0x0, 0x94c20014, 0x24420028,
|
||||
0xa22821, 0x31042, 0x1840000b, 0x2021,
|
||||
0x24e60848, 0x403821, 0x94a30000, 0x8cc20000,
|
||||
0x24840001, 0x431021, 0xacc20000, 0x87102a,
|
||||
0x1440fff9, 0x24a50002, 0x31020001, 0x1040001f,
|
||||
0x3c024000, 0x3c040800, 0x248423fc, 0xa0a00001,
|
||||
0x94a30000, 0x8c820000, 0x431021, 0xa000285,
|
||||
0xac820000, 0x8f626800, 0x3c030010, 0x431024,
|
||||
0x10400009, 0x0, 0x94c2001a, 0x3c030800,
|
||||
0x8c6323fc, 0x431021, 0x3c010800, 0xac2223fc,
|
||||
0xa000286, 0x3c024000, 0x94c2001a, 0x94c4001c,
|
||||
0x3c030800, 0x8c6323fc, 0x441023, 0x621821,
|
||||
0x3c010800, 0xac2323fc, 0x3c024000, 0x2421825,
|
||||
0xaf635c9c, 0x8f625c90, 0x30420002, 0x1440fffc,
|
||||
0x0, 0x9522000a, 0x30420010, 0x1040009b,
|
||||
0x0, 0x3c030800, 0x946323d4, 0x3c070800,
|
||||
0x24e72400, 0x8ce40000, 0x8f626800, 0x24630030,
|
||||
0x832821, 0x3c030010, 0x431024, 0x1440000a,
|
||||
0x0, 0x94a20004, 0x3c040800, 0x8c842408,
|
||||
0x3c030800, 0x8c6323fc, 0x441023, 0x621821,
|
||||
0x3c010800, 0xac2323fc, 0x3c040800, 0x8c8423fc,
|
||||
0x41c02, 0x3082ffff, 0x622021, 0x41402,
|
||||
0x822021, 0x41027, 0xa4a20006, 0x3c030800,
|
||||
0x8c632404, 0x3c0200ff, 0x3442fff8, 0x628824,
|
||||
0x96220008, 0x24050001, 0x24034000, 0x231c0,
|
||||
0x801021, 0xa4c2001a, 0xa4c0001c, 0xace00000,
|
||||
0x3c010800, 0xac251b60, 0xaf635cb8, 0x8f625cb0,
|
||||
0x30420002, 0x10400003, 0x0, 0x3c010800,
|
||||
0xac201b60, 0x8e220008, 0xaf625cb8, 0x8f625cb0,
|
||||
0x30420002, 0x10400003, 0x0, 0x3c010800,
|
||||
0xac201b60, 0x3c020800, 0x8c421b60, 0x1040ffec,
|
||||
0x0, 0x3c040800, 0xe00063b, 0x8c842404,
|
||||
0xa00032a, 0x0, 0x3c030800, 0x90631b98,
|
||||
0x24020002, 0x14620003, 0x3c034b65, 0xa0002e1,
|
||||
0x8021, 0x8e22001c, 0x34637654, 0x10430002,
|
||||
0x24100002, 0x24100001, 0xc02021, 0xe000350,
|
||||
0x2003021, 0x24020003, 0x3c010800, 0xa0221b98,
|
||||
0x24020002, 0x1202000a, 0x24020001, 0x3c030800,
|
||||
0x8c6323f0, 0x10620006, 0x0, 0x3c020800,
|
||||
0x944223d8, 0x21400, 0xa00031f, 0xae220014,
|
||||
0x3c040800, 0x248423da, 0x94820000, 0x21400,
|
||||
0xae220014, 0x3c020800, 0x8c421bbc, 0x3c03c000,
|
||||
0x3c010800, 0xa0201b98, 0x431025, 0xaf625c5c,
|
||||
0x8f625c50, 0x30420002, 0x10400009, 0x0,
|
||||
0x2484f7e2, 0x8c820000, 0x431025, 0xaf625c5c,
|
||||
0x8f625c50, 0x30420002, 0x1440fffa, 0x0,
|
||||
0x3c020800, 0x24421b84, 0x8c430000, 0x24630001,
|
||||
0xac430000, 0x8f630c14, 0x3063000f, 0x2c620002,
|
||||
0x1440000c, 0x3c024000, 0x8f630c14, 0x3c020800,
|
||||
0x8c421b40, 0x3063000f, 0x24420001, 0x3c010800,
|
||||
0xac221b40, 0x2c620002, 0x1040fff7, 0x0,
|
||||
0x3c024000, 0x2421825, 0xaf635c9c, 0x8f625c90,
|
||||
0x30420002, 0x1440fffc, 0x0, 0x12600003,
|
||||
0x0, 0xe0004c0, 0x0, 0x8fbf0028,
|
||||
0x8fb30024, 0x8fb20020, 0x8fb1001c, 0x8fb00018,
|
||||
0x3e00008, 0x27bd0030, 0x8f634450, 0x3c040800,
|
||||
0x24841b88, 0x8c820000, 0x31c02, 0x43102b,
|
||||
0x14400007, 0x3c038000, 0x8c840004, 0x8f624450,
|
||||
0x21c02, 0x83102b, 0x1040fffc, 0x3c038000,
|
||||
0xaf634444, 0x8f624444, 0x431024, 0x1440fffd,
|
||||
0x0, 0x8f624448, 0x3e00008, 0x3042ffff,
|
||||
0x3c024000, 0x822025, 0xaf645c38, 0x8f625c30,
|
||||
0x30420002, 0x1440fffc, 0x0, 0x3e00008,
|
||||
0x0, 0x27bdffe0, 0x805821, 0x14c00011,
|
||||
0x256e0008, 0x3c020800, 0x8c4223f4, 0x10400007,
|
||||
0x24020016, 0x3c010800, 0xa42223d2, 0x2402002a,
|
||||
0x3c010800, 0xa000364, 0xa42223d4, 0x8d670010,
|
||||
0x71402, 0x3c010800, 0xa42223d2, 0x3c010800,
|
||||
0xa42723d4, 0x3c040800, 0x948423d4, 0x3c030800,
|
||||
0x946323d2, 0x95cf0006, 0x3c020800, 0x944223d0,
|
||||
0x832023, 0x1e2c023, 0x3065ffff, 0x24a20028,
|
||||
0x1c24821, 0x3082ffff, 0x14c0001a, 0x1226021,
|
||||
0x9582000c, 0x3042003f, 0x3c010800, 0xa42223d6,
|
||||
0x95820004, 0x95830006, 0x3c010800, 0xac2023e4,
|
||||
0x3c010800, 0xac2023e8, 0x21400, 0x431025,
|
||||
0x3c010800, 0xac221bc0, 0x95220004, 0x3c010800,
|
||||
0xa4221bc4, 0x95230002, 0x1e51023, 0x43102a,
|
||||
0x10400010, 0x24020001, 0x3c010800, 0xa000398,
|
||||
0xac2223f8, 0x3c030800, 0x8c6323e8, 0x3c020800,
|
||||
0x94421bc4, 0x431021, 0xa5220004, 0x3c020800,
|
||||
0x94421bc0, 0xa5820004, 0x3c020800, 0x8c421bc0,
|
||||
0xa5820006, 0x3c020800, 0x8c4223f0, 0x3c0d0800,
|
||||
0x8dad23e4, 0x3c0a0800, 0x144000e5, 0x8d4a23e8,
|
||||
0x3c020800, 0x94421bc4, 0x4a1821, 0x3063ffff,
|
||||
0x62182b, 0x24020002, 0x10c2000d, 0x1435023,
|
||||
0x3c020800, 0x944223d6, 0x30420009, 0x10400008,
|
||||
0x0, 0x9582000c, 0x3042fff6, 0xa582000c,
|
||||
0x3c020800, 0x944223d6, 0x30420009, 0x1a26823,
|
||||
0x3c020800, 0x8c4223f8, 0x1040004a, 0x1203821,
|
||||
0x3c020800, 0x944223d2, 0x4021, 0xa520000a,
|
||||
0x1e21023, 0xa5220002, 0x3082ffff, 0x21042,
|
||||
0x18400008, 0x3021, 0x401821, 0x94e20000,
|
||||
0x25080001, 0xc23021, 0x103102a, 0x1440fffb,
|
||||
0x24e70002, 0x61c02, 0x30c2ffff, 0x623021,
|
||||
0x61402, 0xc23021, 0xc02821, 0x61027,
|
||||
0xa522000a, 0x3021, 0x2527000c, 0x4021,
|
||||
0x94e20000, 0x25080001, 0xc23021, 0x2d020004,
|
||||
0x1440fffb, 0x24e70002, 0x95220002, 0x4021,
|
||||
0x91230009, 0x442023, 0x1803821, 0x3082ffff,
|
||||
0xa4e00010, 0x621821, 0x21042, 0x18400010,
|
||||
0xc33021, 0x404821, 0x94e20000, 0x24e70002,
|
||||
0xc23021, 0x30e2007f, 0x14400006, 0x25080001,
|
||||
0x8d630000, 0x3c02007f, 0x3442ff80, 0x625824,
|
||||
0x25670008, 0x109102a, 0x1440fff3, 0x0,
|
||||
0x30820001, 0x10400005, 0x61c02, 0xa0e00001,
|
||||
0x94e20000, 0xc23021, 0x61c02, 0x30c2ffff,
|
||||
0x623021, 0x61402, 0xc23021, 0xa00047d,
|
||||
0x30c6ffff, 0x24020002, 0x14c20081, 0x0,
|
||||
0x3c020800, 0x8c42240c, 0x14400007, 0x0,
|
||||
0x3c020800, 0x944223d2, 0x95230002, 0x1e21023,
|
||||
0x10620077, 0x0, 0x3c020800, 0x944223d2,
|
||||
0x1e21023, 0xa5220002, 0x3c020800, 0x8c42240c,
|
||||
0x1040001a, 0x31e3ffff, 0x8dc70010, 0x3c020800,
|
||||
0x94421b96, 0xe04021, 0x72c02, 0xaa2021,
|
||||
0x431023, 0x823823, 0x72402, 0x30e2ffff,
|
||||
0x823821, 0x71027, 0xa522000a, 0x3102ffff,
|
||||
0x3c040800, 0x948423d4, 0x453023, 0xe02821,
|
||||
0x641823, 0x6d1821, 0xc33021, 0x61c02,
|
||||
0x30c2ffff, 0xa00047d, 0x623021, 0x1203821,
|
||||
0x4021, 0x3082ffff, 0x21042, 0x18400008,
|
||||
0x3021, 0x401821, 0x94e20000, 0x25080001,
|
||||
0xc23021, 0x103102a, 0x1440fffb, 0x24e70002,
|
||||
0x61c02, 0x30c2ffff, 0x623021, 0x61402,
|
||||
0xc23021, 0xc02821, 0x61027, 0xa522000a,
|
||||
0x3021, 0x2527000c, 0x4021, 0x94e20000,
|
||||
0x25080001, 0xc23021, 0x2d020004, 0x1440fffb,
|
||||
0x24e70002, 0x95220002, 0x4021, 0x91230009,
|
||||
0x442023, 0x1803821, 0x3082ffff, 0xa4e00010,
|
||||
0x3c040800, 0x948423d4, 0x621821, 0xc33021,
|
||||
0x61c02, 0x30c2ffff, 0x623021, 0x61c02,
|
||||
0x3c020800, 0x944223d0, 0xc34821, 0x441023,
|
||||
0x21fc2, 0x431021, 0x21043, 0x18400010,
|
||||
0x3021, 0x402021, 0x94e20000, 0x24e70002,
|
||||
0xc23021, 0x30e2007f, 0x14400006, 0x25080001,
|
||||
0x8d630000, 0x3c02007f, 0x3442ff80, 0x625824,
|
||||
0x25670008, 0x104102a, 0x1440fff3, 0x0,
|
||||
0x3c020800, 0x944223ec, 0xc23021, 0x3122ffff,
|
||||
0xc23021, 0x61c02, 0x30c2ffff, 0x623021,
|
||||
0x61402, 0xc23021, 0xc04021, 0x61027,
|
||||
0xa5820010, 0xadc00014, 0xa00049d, 0xadc00000,
|
||||
0x8dc70010, 0xe04021, 0x11400007, 0x72c02,
|
||||
0xaa3021, 0x61402, 0x30c3ffff, 0x433021,
|
||||
0x61402, 0xc22821, 0x51027, 0xa522000a,
|
||||
0x3c030800, 0x946323d4, 0x3102ffff, 0x1e21021,
|
||||
0x433023, 0xcd3021, 0x61c02, 0x30c2ffff,
|
||||
0x623021, 0x61402, 0xc23021, 0xc04021,
|
||||
0x61027, 0xa5820010, 0x3102ffff, 0x51c00,
|
||||
0x431025, 0xadc20010, 0x3c020800, 0x8c4223f4,
|
||||
0x10400005, 0x2de205eb, 0x14400002, 0x25e2fff2,
|
||||
0x34028870, 0xa5c20034, 0x3c030800, 0x246323e8,
|
||||
0x8c620000, 0x24420001, 0xac620000, 0x3c040800,
|
||||
0x8c8423e4, 0x3c020800, 0x8c421bc0, 0x3303ffff,
|
||||
0x832021, 0x431821, 0x62102b, 0x3c010800,
|
||||
0xac2423e4, 0x10400003, 0x2482ffff, 0x3c010800,
|
||||
0xac2223e4, 0x3c010800, 0xac231bc0, 0x3e00008,
|
||||
0x27bd0020, 0x27bdffb8, 0x3c050800, 0x24a51b96,
|
||||
0xafbf0044, 0xafbe0040, 0xafb7003c, 0xafb60038,
|
||||
0xafb50034, 0xafb40030, 0xafb3002c, 0xafb20028,
|
||||
0xafb10024, 0xafb00020, 0x94a90000, 0x3c020800,
|
||||
0x944223d0, 0x3c030800, 0x8c631bb0, 0x3c040800,
|
||||
0x8c841bac, 0x1221023, 0x64182a, 0xa7a9001e,
|
||||
0x106000be, 0xa7a20016, 0x24be0022, 0x97b6001e,
|
||||
0x24b3001a, 0x24b70016, 0x8fc20000, 0x14400008,
|
||||
0x0, 0x8fc2fff8, 0x97a30016, 0x8fc4fff4,
|
||||
0x431021, 0x82202a, 0x148000b0, 0x0,
|
||||
0x97d50818, 0x32a2ffff, 0x104000a3, 0x9021,
|
||||
0x40a021, 0x8821, 0xe000625, 0x0,
|
||||
0x403021, 0x14c00007, 0x0, 0x3c020800,
|
||||
0x8c4223dc, 0x24420001, 0x3c010800, 0xa000596,
|
||||
0xac2223dc, 0x3c100800, 0x2118021, 0x8e101bc8,
|
||||
0x9608000a, 0x31020040, 0x10400005, 0x2407180c,
|
||||
0x8e02000c, 0x2407188c, 0x21400, 0xacc20018,
|
||||
0x31020080, 0x54400001, 0x34e70010, 0x3c020800,
|
||||
0x511021, 0x8c421bd0, 0x3c030800, 0x711821,
|
||||
0x8c631bd4, 0x21500, 0x31c00, 0x431025,
|
||||
0xacc20014, 0x96040008, 0x3242ffff, 0x821021,
|
||||
0x282102a, 0x14400002, 0x2b22823, 0x802821,
|
||||
0x8e020000, 0x2459021, 0xacc20000, 0x8e020004,
|
||||
0xc02021, 0x26310010, 0xac820004, 0x30e2ffff,
|
||||
0xac800008, 0xa485000e, 0xac820010, 0x24020305,
|
||||
0xe0005a2, 0xa482000c, 0x3242ffff, 0x54102b,
|
||||
0x1440ffc5, 0x3242ffff, 0xa00058e, 0x0,
|
||||
0x8e620000, 0x8e63fffc, 0x43102a, 0x10400067,
|
||||
0x0, 0x8e62fff0, 0x28900, 0x3c100800,
|
||||
0x2118021, 0xe000625, 0x8e101bc8, 0x403021,
|
||||
0x14c00005, 0x0, 0x8e62082c, 0x24420001,
|
||||
0xa000596, 0xae62082c, 0x9608000a, 0x31020040,
|
||||
0x10400005, 0x2407180c, 0x8e02000c, 0x2407188c,
|
||||
0x21400, 0xacc20018, 0x3c020800, 0x511021,
|
||||
0x8c421bd0, 0x3c030800, 0x711821, 0x8c631bd4,
|
||||
0x21500, 0x31c00, 0x431025, 0xacc20014,
|
||||
0x8e63fff4, 0x96020008, 0x432023, 0x3242ffff,
|
||||
0x3083ffff, 0x431021, 0x2c2102a, 0x10400003,
|
||||
0x802821, 0x97a9001e, 0x1322823, 0x8e620000,
|
||||
0x30a4ffff, 0x441021, 0xae620000, 0xa4c5000e,
|
||||
0x8e020000, 0xacc20000, 0x8e020004, 0x8e63fff4,
|
||||
0x431021, 0xacc20004, 0x8e63fff4, 0x96020008,
|
||||
0x641821, 0x62102a, 0x14400006, 0x2459021,
|
||||
0x8e62fff0, 0xae60fff4, 0x24420001, 0xa000571,
|
||||
0xae62fff0, 0xae63fff4, 0xacc00008, 0x3242ffff,
|
||||
0x10560003, 0x31020004, 0x10400006, 0x24020305,
|
||||
0x31020080, 0x54400001, 0x34e70010, 0x34e70020,
|
||||
0x24020905, 0xa4c2000c, 0x8ee30000, 0x8ee20004,
|
||||
0x14620007, 0x3c02b49a, 0x8ee20860, 0x54400001,
|
||||
0x34e70400, 0x3c024b65, 0xa000588, 0x34427654,
|
||||
0x344289ab, 0xacc2001c, 0x30e2ffff, 0xacc20010,
|
||||
0xe0005a2, 0xc02021, 0x3242ffff, 0x56102b,
|
||||
0x1440ff9b, 0x0, 0x8e620000, 0x8e63fffc,
|
||||
0x43102a, 0x1440ff48, 0x0, 0x8fbf0044,
|
||||
0x8fbe0040, 0x8fb7003c, 0x8fb60038, 0x8fb50034,
|
||||
0x8fb40030, 0x8fb3002c, 0x8fb20028, 0x8fb10024,
|
||||
0x8fb00020, 0x3e00008, 0x27bd0048, 0x27bdffe8,
|
||||
0xafbf0014, 0xafb00010, 0x8f624450, 0x8f634410,
|
||||
0xa0005b1, 0x808021, 0x8f626820, 0x30422000,
|
||||
0x10400003, 0x0, 0xe0001f0, 0x2021,
|
||||
0x8f624450, 0x8f634410, 0x3042ffff, 0x43102b,
|
||||
0x1440fff5, 0x0, 0x8f630c14, 0x3063000f,
|
||||
0x2c620002, 0x1440000b, 0x0, 0x8f630c14,
|
||||
0x3c020800, 0x8c421b40, 0x3063000f, 0x24420001,
|
||||
0x3c010800, 0xac221b40, 0x2c620002, 0x1040fff7,
|
||||
0x0, 0xaf705c18, 0x8f625c10, 0x30420002,
|
||||
0x10400009, 0x0, 0x8f626820, 0x30422000,
|
||||
0x1040fff8, 0x0, 0xe0001f0, 0x2021,
|
||||
0xa0005c4, 0x0, 0x8fbf0014, 0x8fb00010,
|
||||
0x3e00008, 0x27bd0018, 0x0, 0x0,
|
||||
0x0, 0x27bdffe8, 0x3c1bc000, 0xafbf0014,
|
||||
0xafb00010, 0xaf60680c, 0x8f626804, 0x34420082,
|
||||
0xaf626804, 0x8f634000, 0x24020b50, 0x3c010800,
|
||||
0xac221b54, 0x24020b78, 0x3c010800, 0xac221b64,
|
||||
0x34630002, 0xaf634000, 0xe000605, 0x808021,
|
||||
0x3c010800, 0xa0221b68, 0x304200ff, 0x24030002,
|
||||
0x14430005, 0x0, 0x3c020800, 0x8c421b54,
|
||||
0xa0005f8, 0xac5000c0, 0x3c020800, 0x8c421b54,
|
||||
0xac5000bc, 0x8f624434, 0x8f634438, 0x8f644410,
|
||||
0x3c010800, 0xac221b5c, 0x3c010800, 0xac231b6c,
|
||||
0x3c010800, 0xac241b58, 0x8fbf0014, 0x8fb00010,
|
||||
0x3e00008, 0x27bd0018, 0x3c040800, 0x8c870000,
|
||||
0x3c03aa55, 0x3463aa55, 0x3c06c003, 0xac830000,
|
||||
0x8cc20000, 0x14430007, 0x24050002, 0x3c0355aa,
|
||||
0x346355aa, 0xac830000, 0x8cc20000, 0x50430001,
|
||||
0x24050001, 0x3c020800, 0xac470000, 0x3e00008,
|
||||
0xa01021, 0x27bdfff8, 0x18800009, 0x2821,
|
||||
0x8f63680c, 0x8f62680c, 0x1043fffe, 0x0,
|
||||
0x24a50001, 0xa4102a, 0x1440fff9, 0x0,
|
||||
0x3e00008, 0x27bd0008, 0x8f634450, 0x3c020800,
|
||||
0x8c421b5c, 0x31c02, 0x43102b, 0x14400008,
|
||||
0x3c038000, 0x3c040800, 0x8c841b6c, 0x8f624450,
|
||||
0x21c02, 0x83102b, 0x1040fffc, 0x3c038000,
|
||||
0xaf634444, 0x8f624444, 0x431024, 0x1440fffd,
|
||||
0x0, 0x8f624448, 0x3e00008, 0x3042ffff,
|
||||
0x3082ffff, 0x2442e000, 0x2c422001, 0x14400003,
|
||||
0x3c024000, 0xa000648, 0x2402ffff, 0x822025,
|
||||
0xaf645c38, 0x8f625c30, 0x30420002, 0x1440fffc,
|
||||
0x1021, 0x3e00008, 0x0, 0x8f624450,
|
||||
0x3c030800, 0x8c631b58, 0xa000651, 0x3042ffff,
|
||||
0x8f624450, 0x3042ffff, 0x43102b, 0x1440fffc,
|
||||
0x0, 0x3e00008, 0x0, 0x27bdffe0,
|
||||
0x802821, 0x3c040800, 0x24841af0, 0x3021,
|
||||
0x3821, 0xafbf0018, 0xafa00010, 0xe00067c,
|
||||
0xafa00014, 0xa000660, 0x0, 0x8fbf0018,
|
||||
0x3e00008, 0x27bd0020, 0x0, 0x0,
|
||||
0x0, 0x3c020800, 0x34423000, 0x3c030800,
|
||||
0x34633000, 0x3c040800, 0x348437ff, 0x3c010800,
|
||||
0xac221b74, 0x24020040, 0x3c010800, 0xac221b78,
|
||||
0x3c010800, 0xac201b70, 0xac600000, 0x24630004,
|
||||
0x83102b, 0x5040fffd, 0xac600000, 0x3e00008,
|
||||
0x0, 0x804821, 0x8faa0010, 0x3c020800,
|
||||
0x8c421b70, 0x3c040800, 0x8c841b78, 0x8fab0014,
|
||||
0x24430001, 0x44102b, 0x3c010800, 0xac231b70,
|
||||
0x14400003, 0x4021, 0x3c010800, 0xac201b70,
|
||||
0x3c020800, 0x8c421b70, 0x3c030800, 0x8c631b74,
|
||||
0x91240000, 0x21140, 0x431021, 0x481021,
|
||||
0x25080001, 0xa0440000, 0x29020008, 0x1440fff4,
|
||||
0x25290001, 0x3c020800, 0x8c421b70, 0x3c030800,
|
||||
0x8c631b74, 0x8f64680c, 0x21140, 0x431021,
|
||||
0xac440008, 0xac45000c, 0xac460010, 0xac470014,
|
||||
0xac4a0018, 0x3e00008, 0xac4b001c, 0x0,
|
||||
0x0, 0x0 }; |
||||
U32 t3StkOffLdFwRodata[(0x60/4) + 1] = { |
||||
0x4d61696e,
|
||||
0x43707542, 0x0, 0x4d61696e, 0x43707541,
|
||||
0x0, 0x0, 0x0, 0x73746b6f,
|
||||
0x66666c64, 0x496e0000, 0x73746b6f, 0x66662a2a,
|
||||
0x0, 0x53774576, 0x656e7430, 0x0,
|
||||
0x0, 0x0, 0x0, 0x66617461,
|
||||
0x6c457272, 0x0, 0x0, 0x0 }; |
||||
U32 t3StkOffLdFwData[(0x30/4) + 1] = { |
||||
0x0, 0x73746b6f, 0x66666c64,
|
||||
0x5f76312e, 0x362e3000, 0x0, 0x0,
|
||||
0x0, 0x0, 0x0, 0x0,
|
||||
0x0, 0x0 }; |
||||
|
||||
#endif /* __FW_STKOFFLD_H__ */ |
@ -1,145 +0,0 @@ |
||||
/*
|
||||
* HND SiliconBackplane Gigabit Ethernet core software interface |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
*/ |
||||
|
||||
#include <typedefs.h> |
||||
#include <osl.h> |
||||
#include <pcicfg.h> |
||||
#include <sbconfig.h> |
||||
#include <sbutils.h> |
||||
#include "sbgige.h" |
||||
#include <hndpci.h> |
||||
#include "hndgige.h" |
||||
|
||||
uint32 |
||||
sb_base(uint32 admatch) |
||||
{ |
||||
uint32 base; |
||||
uint type; |
||||
|
||||
type = admatch & SBAM_TYPE_MASK; |
||||
ASSERT(type < 3); |
||||
|
||||
base = 0; |
||||
|
||||
if (type == 0) { |
||||
base = admatch & SBAM_BASE0_MASK; |
||||
} else if (type == 1) { |
||||
ASSERT(!(admatch & SBAM_ADNEG)); /* neg not supported */ |
||||
base = admatch & SBAM_BASE1_MASK; |
||||
} else if (type == 2) { |
||||
ASSERT(!(admatch & SBAM_ADNEG)); /* neg not supported */ |
||||
base = admatch & SBAM_BASE2_MASK; |
||||
} |
||||
|
||||
return (base); |
||||
} |
||||
|
||||
/*
|
||||
* Setup the gige core. |
||||
* Resetting the core will lose all settings. |
||||
*/ |
||||
void |
||||
sb_gige_init(sb_t *sbh, uint32 unit, bool *rgmii) |
||||
{ |
||||
volatile pci_config_regs *pci; |
||||
sbgige_pcishim_t *ocp; |
||||
sbconfig_t *sb; |
||||
osl_t *osh; |
||||
uint32 statelow; |
||||
uint32 statehigh; |
||||
uint32 base; |
||||
uint32 idx; |
||||
void *regs; |
||||
|
||||
/* Sanity checks */ |
||||
ASSERT(sbh); |
||||
ASSERT(rgmii); |
||||
|
||||
idx = sb_coreidx(sbh); |
||||
|
||||
/* point to the gige core registers */ |
||||
regs = sb_setcore(sbh, SB_GIGETH, unit); |
||||
ASSERT(regs); |
||||
|
||||
osh = sb_osh(sbh); |
||||
|
||||
pci = &((sbgige_t *)regs)->pcicfg; |
||||
ocp = &((sbgige_t *)regs)->pcishim; |
||||
sb = &((sbgige_t *)regs)->sbconfig; |
||||
|
||||
/* Enable the core clock and memory access */ |
||||
if (!sb_iscoreup(sbh)) |
||||
sb_core_reset(sbh, 0, 0); |
||||
|
||||
/*
|
||||
* Setup the 64K memory-mapped region base address through BAR0. |
||||
* Leave the other BAR values alone. |
||||
*/ |
||||
base = sb_base(R_REG(osh, &sb->sbadmatch1)); |
||||
W_REG(osh, &pci->base[0], base); |
||||
W_REG(osh, &pci->base[1], 0); |
||||
|
||||
/*
|
||||
* Enable the PCI memory access anyway. Any PCI config commands |
||||
* issued before the core is enabled will go to the emulation |
||||
* only and will not go to the real PCI config registers. |
||||
*/ |
||||
OR_REG(osh, &pci->command, 2); |
||||
|
||||
/*
|
||||
* Enable the posted write flush scheme as follows: |
||||
* |
||||
* - Enable flush on any core register read |
||||
* - Enable timeout on the flush |
||||
* - Disable the interrupt mask when flushing |
||||
* |
||||
* This differs from the default setting only in that interrupts are |
||||
* not masked. Since posted writes are not flushed on interrupt, the |
||||
* driver must explicitly request a flush in its interrupt handling |
||||
* by reading a core register. |
||||
*/ |
||||
W_REG(osh, &ocp->FlushStatusControl, 0x68); |
||||
|
||||
/*
|
||||
* Determine whether the GbE is in GMII or RGMII mode. This is |
||||
* indicated in bit 16 of the SBTMStateHigh register, which is |
||||
* part of the core-specific flags field. |
||||
* |
||||
* For GMII, bypass the Rx/Tx DLLs, i.e. add no delay to RXC/GTXC |
||||
* within the core. For RGMII, do not bypass the DLLs, resulting |
||||
* in added delay for RXC/GTXC. The SBTMStateLow register contains |
||||
* the controls for doing this in the core-specific flags field: |
||||
* |
||||
* bit 24 - Enable DLL controls |
||||
* bit 20 - Bypass Rx DLL |
||||
* bit 19 - Bypass Tx DLL |
||||
*/ |
||||
statelow = R_REG(osh, &sb->sbtmstatelow); /* DLL controls */ |
||||
statehigh = R_REG(osh, &sb->sbtmstatehigh); /* GMII/RGMII mode */ |
||||
if ((statehigh & (1 << 16)) != 0) /* RGMII */ |
||||
{ |
||||
statelow &= ~(1 << 20); /* no Rx bypass (delay) */ |
||||
statelow &= ~(1 << 19); /* no Tx bypass (delay) */ |
||||
*rgmii = TRUE; |
||||
} |
||||
else /* GMII */ |
||||
{ |
||||
statelow |= (1 << 20); /* Rx bypass (no delay) */ |
||||
statelow |= (1 << 19); /* Tx bypass (no delay) */ |
||||
*rgmii = FALSE; |
||||
} |
||||
statelow |= (1 << 24); /* enable DLL controls */ |
||||
W_REG(osh, &sb->sbtmstatelow, statelow); |
||||
|
||||
sb_setcoreidx(sbh, idx); |
||||
} |
@ -1,19 +0,0 @@ |
||||
/*
|
||||
* HND SiliconBackplane Gigabit Ethernet core software interface. |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _hndgige_h_ |
||||
#define _hndgige_h_ |
||||
|
||||
extern void sb_gige_init(sb_t *sbh, uint32 unit, bool *rgmii); |
||||
|
||||
#endif /* _hndgige_h_ */ |
@ -1,483 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 02/25/00 Hav Khauv Initial version. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef LM_H |
||||
#define LM_H |
||||
|
||||
#include "queue.h" |
||||
#include "bits.h" |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Basic types. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef char LM_CHAR, *PLM_CHAR; |
||||
typedef unsigned int LM_UINT, *PLM_UINT; |
||||
typedef unsigned char LM_UINT8, *PLM_UINT8; |
||||
typedef unsigned short LM_UINT16, *PLM_UINT16; |
||||
typedef unsigned int LM_UINT32, *PLM_UINT32; |
||||
typedef unsigned int LM_COUNTER, *PLM_COUNTER; |
||||
typedef void LM_VOID, *PLM_VOID; |
||||
typedef char LM_BOOL, *PLM_BOOL; |
||||
|
||||
/* 64bit value. */ |
||||
typedef struct { |
||||
#ifdef BIG_ENDIAN_HOST |
||||
LM_UINT32 High; |
||||
LM_UINT32 Low; |
||||
#else /* BIG_ENDIAN_HOST */ |
||||
LM_UINT32 Low; |
||||
LM_UINT32 High; |
||||
#endif /* !BIG_ENDIAN_HOST */ |
||||
} LM_UINT64, *PLM_UINT64; |
||||
|
||||
typedef LM_UINT64 LM_PHYSICAL_ADDRESS, *PLM_PHYSICAL_ADDRESS; |
||||
|
||||
/* void LM_INC_PHYSICAL_ADDRESS(PLM_PHYSICAL_ADDRESS pAddr,LM_UINT32 IncSize) */ |
||||
#define LM_INC_PHYSICAL_ADDRESS(pAddr, IncSize) \ |
||||
{ \
|
||||
LM_UINT32 OrgLow; \
|
||||
\
|
||||
OrgLow = (pAddr)->Low; \
|
||||
(pAddr)->Low += IncSize; \
|
||||
if((pAddr)->Low < OrgLow) { \
|
||||
(pAddr)->High++; /* Wrap around. */ \
|
||||
} \
|
||||
} |
||||
|
||||
|
||||
#ifndef TRUE |
||||
#define TRUE 1 |
||||
#endif /* TRUE */ |
||||
|
||||
#ifndef FALSE |
||||
#define FALSE 0 |
||||
#endif /* FALSE */ |
||||
|
||||
#ifndef NULL |
||||
#define NULL ((void *) 0) |
||||
#endif /* NULL */ |
||||
|
||||
#ifndef OFFSETOF |
||||
#define OFFSETOF(_s, _m) (MM_UINT_PTR(&(((_s *) 0)->_m))) |
||||
#endif /* OFFSETOF */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Simple macros. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define IS_ETH_BROADCAST(_pEthAddr) \ |
||||
(((unsigned char *) (_pEthAddr))[0] == ((unsigned char) 0xff)) |
||||
|
||||
#define IS_ETH_MULTICAST(_pEthAddr) \ |
||||
(((unsigned char *) (_pEthAddr))[0] & ((unsigned char) 0x01)) |
||||
|
||||
#define IS_ETH_ADDRESS_EQUAL(_pEtherAddr1, _pEtherAddr2) \ |
||||
((((unsigned char *) (_pEtherAddr1))[0] == \
|
||||
((unsigned char *) (_pEtherAddr2))[0]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[1] == \
|
||||
((unsigned char *) (_pEtherAddr2))[1]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[2] == \
|
||||
((unsigned char *) (_pEtherAddr2))[2]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[3] == \
|
||||
((unsigned char *) (_pEtherAddr2))[3]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[4] == \
|
||||
((unsigned char *) (_pEtherAddr2))[4]) && \
|
||||
(((unsigned char *) (_pEtherAddr1))[5] == \
|
||||
((unsigned char *) (_pEtherAddr2))[5])) |
||||
|
||||
#define COPY_ETH_ADDRESS(_Src, _Dst) \ |
||||
((unsigned char *) (_Dst))[0] = ((unsigned char *) (_Src))[0]; \
|
||||
((unsigned char *) (_Dst))[1] = ((unsigned char *) (_Src))[1]; \
|
||||
((unsigned char *) (_Dst))[2] = ((unsigned char *) (_Src))[2]; \
|
||||
((unsigned char *) (_Dst))[3] = ((unsigned char *) (_Src))[3]; \
|
||||
((unsigned char *) (_Dst))[4] = ((unsigned char *) (_Src))[4]; \
|
||||
((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5]; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Constants. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define ETHERNET_ADDRESS_SIZE 6 |
||||
#define ETHERNET_PACKET_HEADER_SIZE 14 |
||||
#define MIN_ETHERNET_PACKET_SIZE 64 /* with 4 byte crc. */ |
||||
#define MAX_ETHERNET_PACKET_SIZE 1518 /* with 4 byte crc. */ |
||||
#define MIN_ETHERNET_PACKET_SIZE_NO_CRC 60 |
||||
#define MAX_ETHERNET_PACKET_SIZE_NO_CRC 1514 |
||||
#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */ |
||||
#define MAX_ETHERNET_JUMBO_PACKET_SIZE_NO_CRC 9014 |
||||
|
||||
#ifndef LM_MAX_MC_TABLE_SIZE |
||||
#define LM_MAX_MC_TABLE_SIZE 32 |
||||
#endif /* LM_MAX_MC_TABLE_SIZE */ |
||||
#define LM_MC_ENTRY_SIZE (ETHERNET_ADDRESS_SIZE+1) |
||||
#define LM_MC_INSTANCE_COUNT_INDEX (LM_MC_ENTRY_SIZE-1) |
||||
|
||||
|
||||
/* Receive filter masks. */ |
||||
#define LM_ACCEPT_UNICAST 0x0001 |
||||
#define LM_ACCEPT_MULTICAST 0x0002 |
||||
#define LM_ACCEPT_ALL_MULTICAST 0x0004 |
||||
#define LM_ACCEPT_BROADCAST 0x0008 |
||||
#define LM_ACCEPT_ERROR_PACKET 0x0010 |
||||
#define LM_KEEP_VLAN_TAG 0x0020 |
||||
|
||||
#define LM_PROMISCUOUS_MODE 0x10000 |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* PCI registers. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define PCI_VENDOR_ID_REG 0x00 |
||||
#define PCI_DEVICE_ID_REG 0x02 |
||||
|
||||
#define PCI_COMMAND_REG 0x04 |
||||
#define PCI_IO_SPACE_ENABLE 0x0001 |
||||
#define PCI_MEM_SPACE_ENABLE 0x0002 |
||||
#define PCI_BUSMASTER_ENABLE 0x0004 |
||||
#define PCI_MEMORY_WRITE_INVALIDATE 0x0010 |
||||
#define PCI_PARITY_ERROR_ENABLE 0x0040 |
||||
#define PCI_SYSTEM_ERROR_ENABLE 0x0100 |
||||
#define PCI_FAST_BACK_TO_BACK_ENABLE 0x0200 |
||||
|
||||
#define PCI_STATUS_REG 0x06 |
||||
#define PCI_REV_ID_REG 0x08 |
||||
|
||||
#define PCI_CACHE_LINE_SIZE_REG 0x0c |
||||
|
||||
#define PCI_IO_BASE_ADDR_REG 0x10 |
||||
#define PCI_IO_BASE_ADDR_MASK 0xfffffff0 |
||||
|
||||
#define PCI_MEM_BASE_ADDR_LOW 0x10 |
||||
#define PCI_MEM_BASE_ADDR_HIGH 0x14 |
||||
|
||||
#define PCI_SUBSYSTEM_VENDOR_ID_REG 0x2c |
||||
#define PCI_SUBSYSTEM_ID_REG 0x2e |
||||
#define PCI_INT_LINE_REG 0x3c |
||||
|
||||
#define PCIX_CAP_REG 0x40 |
||||
#define PCIX_ENABLE_RELAXED_ORDERING BIT_17 |
||||
|
||||
/******************************************************************************/ |
||||
/* Fragment structure. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef struct { |
||||
LM_UINT32 FragSize; |
||||
LM_PHYSICAL_ADDRESS FragBuf; |
||||
} LM_FRAG, *PLM_FRAG; |
||||
|
||||
typedef struct { |
||||
/* FragCount is initialized for the caller to the maximum array size, on */ |
||||
/* return FragCount is the number of the actual fragments in the array. */ |
||||
LM_UINT32 FragCount; |
||||
|
||||
/* Total buffer size. */ |
||||
LM_UINT32 TotalSize; |
||||
|
||||
/* Fragment array buffer. */ |
||||
LM_FRAG Fragments[1]; |
||||
} LM_FRAG_LIST, *PLM_FRAG_LIST; |
||||
|
||||
#define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \ |
||||
typedef struct { \
|
||||
LM_FRAG_LIST FragList; \
|
||||
LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \
|
||||
} _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Status codes. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_STATUS_SUCCESS 0 |
||||
#define LM_STATUS_FAILURE 1 |
||||
|
||||
#define LM_STATUS_INTERRUPT_ACTIVE 2 |
||||
#define LM_STATUS_INTERRUPT_NOT_ACTIVE 3 |
||||
|
||||
#define LM_STATUS_LINK_ACTIVE 4 |
||||
#define LM_STATUS_LINK_DOWN 5 |
||||
#define LM_STATUS_LINK_SETTING_MISMATCH 6 |
||||
|
||||
#define LM_STATUS_TOO_MANY_FRAGMENTS 7 |
||||
#define LM_STATUS_TRANSMIT_ABORTED 8 |
||||
#define LM_STATUS_TRANSMIT_ERROR 9 |
||||
#define LM_STATUS_RECEIVE_ABORTED 10 |
||||
#define LM_STATUS_RECEIVE_ERROR 11 |
||||
#define LM_STATUS_INVALID_PACKET_SIZE 12 |
||||
#define LM_STATUS_OUT_OF_MAP_REGISTERS 13 |
||||
#define LM_STATUS_UNKNOWN_ADAPTER 14 |
||||
|
||||
typedef LM_UINT LM_STATUS, *PLM_STATUS; |
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Line speed. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_LINE_SPEED_UNKNOWN 0 |
||||
#define LM_LINE_SPEED_AUTO LM_LINE_SPEED_UNKNOWN |
||||
#define LM_LINE_SPEED_10MBPS 10 |
||||
#define LM_LINE_SPEED_100MBPS 100 |
||||
#define LM_LINE_SPEED_1000MBPS 1000 |
||||
|
||||
typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Duplex mode. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_DUPLEX_MODE_UNKNOWN 0 |
||||
#define LM_DUPLEX_MODE_HALF 1 |
||||
#define LM_DUPLEX_MODE_FULL 2 |
||||
|
||||
typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Power state. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_POWER_STATE_D0 0 |
||||
#define LM_POWER_STATE_D1 1 |
||||
#define LM_POWER_STATE_D2 2 |
||||
#define LM_POWER_STATE_D3 3 |
||||
|
||||
typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Task offloading. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_TASK_OFFLOAD_NONE 0x0000 |
||||
#define LM_TASK_OFFLOAD_TX_IP_CHECKSUM 0x0001 |
||||
#define LM_TASK_OFFLOAD_RX_IP_CHECKSUM 0x0002 |
||||
#define LM_TASK_OFFLOAD_TX_TCP_CHECKSUM 0x0004 |
||||
#define LM_TASK_OFFLOAD_RX_TCP_CHECKSUM 0x0008 |
||||
#define LM_TASK_OFFLOAD_TX_UDP_CHECKSUM 0x0010 |
||||
#define LM_TASK_OFFLOAD_RX_UDP_CHECKSUM 0x0020 |
||||
#define LM_TASK_OFFLOAD_TCP_SEGMENTATION 0x0040 |
||||
|
||||
typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Flow control. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_FLOW_CONTROL_NONE 0x00 |
||||
#define LM_FLOW_CONTROL_RECEIVE_PAUSE 0x01 |
||||
#define LM_FLOW_CONTROL_TRANSMIT_PAUSE 0x02 |
||||
#define LM_FLOW_CONTROL_RX_TX_PAUSE (LM_FLOW_CONTROL_RECEIVE_PAUSE | \ |
||||
LM_FLOW_CONTROL_TRANSMIT_PAUSE) |
||||
|
||||
/* This value can be or-ed with RECEIVE_PAUSE and TRANSMIT_PAUSE. If the */ |
||||
/* auto-negotiation is disabled and the RECEIVE_PAUSE and TRANSMIT_PAUSE */ |
||||
/* bits are set, then flow control is enabled regardless of link partner's */ |
||||
/* flow control capability. */ |
||||
#define LM_FLOW_CONTROL_AUTO_PAUSE 0x80000000 |
||||
|
||||
typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Wake up mode. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_WAKE_UP_MODE_NONE 0 |
||||
#define LM_WAKE_UP_MODE_MAGIC_PACKET 1 |
||||
#define LM_WAKE_UP_MODE_NWUF 2 |
||||
#define LM_WAKE_UP_MODE_LINK_CHANGE 4 |
||||
|
||||
typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Counters. */ |
||||
/******************************************************************************/ |
||||
|
||||
#define LM_COUNTER_FRAMES_XMITTED_OK 0 |
||||
#define LM_COUNTER_FRAMES_RECEIVED_OK 1 |
||||
#define LM_COUNTER_ERRORED_TRANSMIT_COUNT 2 |
||||
#define LM_COUNTER_ERRORED_RECEIVE_COUNT 3 |
||||
#define LM_COUNTER_RCV_CRC_ERROR 4 |
||||
#define LM_COUNTER_ALIGNMENT_ERROR 5 |
||||
#define LM_COUNTER_SINGLE_COLLISION_FRAMES 6 |
||||
#define LM_COUNTER_MULTIPLE_COLLISION_FRAMES 7 |
||||
#define LM_COUNTER_FRAMES_DEFERRED 8 |
||||
#define LM_COUNTER_MAX_COLLISIONS 9 |
||||
#define LM_COUNTER_RCV_OVERRUN 10 |
||||
#define LM_COUNTER_XMIT_UNDERRUN 11 |
||||
#define LM_COUNTER_UNICAST_FRAMES_XMIT 12 |
||||
#define LM_COUNTER_MULTICAST_FRAMES_XMIT 13 |
||||
#define LM_COUNTER_BROADCAST_FRAMES_XMIT 14 |
||||
#define LM_COUNTER_UNICAST_FRAMES_RCV 15 |
||||
#define LM_COUNTER_MULTICAST_FRAMES_RCV 16 |
||||
#define LM_COUNTER_BROADCAST_FRAMES_RCV 17 |
||||
|
||||
typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE; |
||||
|
||||
|
||||
typedef LM_UINT32 LM_RESET_TYPE; |
||||
#define LM_SHUTDOWN_RESET 0 |
||||
#define LM_INIT_RESET 1 |
||||
#define LM_SUSPEND_RESET 2 |
||||
|
||||
/******************************************************************************/ |
||||
/* Forward definition. */ |
||||
/******************************************************************************/ |
||||
|
||||
typedef struct _LM_DEVICE_BLOCK *PLM_DEVICE_BLOCK; |
||||
typedef struct _LM_PACKET *PLM_PACKET; |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Function prototypes. */ |
||||
/******************************************************************************/ |
||||
|
||||
LM_STATUS LM_GetAdapterInfo(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_InitializeAdapter(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_ResetAdapter(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_DisableInterrupt(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_EnableInterrupt(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_SendPacket(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS LM_ServiceInterrupts(PLM_DEVICE_BLOCK pDevice); |
||||
#ifdef BCM_NAPI_RXPOLL |
||||
int LM_ServiceRxPoll(PLM_DEVICE_BLOCK pDevice, int limit); |
||||
#endif |
||||
LM_STATUS LM_QueueRxPackets(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_SetReceiveMask(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask); |
||||
LM_STATUS LM_Halt(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_Abort(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_MulticastAdd(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress); |
||||
LM_STATUS LM_MulticastDel(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress); |
||||
LM_STATUS LM_MulticastClear(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_SetMacAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMacAddress); |
||||
LM_STATUS LM_LoopbackAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress); |
||||
|
||||
LM_UINT32 LM_GetCrcCounter(PLM_DEVICE_BLOCK pDevice); |
||||
|
||||
LM_WAKE_UP_MODE LM_PMCapabilities(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_NwufAdd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize, |
||||
LM_UINT8 *pByteMask, LM_UINT8 *pPattern); |
||||
LM_STATUS LM_NwufRemove(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize, |
||||
LM_UINT8 *pByteMask, LM_UINT8 *pPattern); |
||||
LM_STATUS LM_SetPowerState(PLM_DEVICE_BLOCK pDevice, LM_POWER_STATE PowerLevel); |
||||
|
||||
LM_VOID LM_ReadPhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, |
||||
PLM_UINT32 pData32); |
||||
LM_VOID LM_WritePhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, |
||||
LM_UINT32 Data32); |
||||
|
||||
/* MII read/write functions to export to the robo support code */ |
||||
LM_UINT16 robo_miird(void *h, int phyadd, int regoff); |
||||
void robo_miiwr(void *h, int phyadd, int regoff, LM_UINT16 value); |
||||
|
||||
|
||||
LM_STATUS LM_EnableMacLoopBack(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_DisableMacLoopBack(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_EnablePhyLoopBack(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_DisablePhyLoopBack(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_EnableExtLoopBack(PLM_DEVICE_BLOCK pDevice, LM_LINE_SPEED Speed); |
||||
LM_STATUS LM_DisableExtLoopBack(PLM_DEVICE_BLOCK pDevice); |
||||
|
||||
LM_STATUS LM_SetupPhy(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_BlinkLED(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration); |
||||
LM_STATUS LM_GetStats(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_NvramRead(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT32 *pData); |
||||
LM_STATUS LM_NvramWriteBlock(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT32 *pData, LM_UINT32 Size); |
||||
LM_VOID LM_ResetPhy(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS LM_ShutdownChip(PLM_DEVICE_BLOCK pDevice, LM_RESET_TYPE Mode); |
||||
LM_STATUS LM_HaltCpu(PLM_DEVICE_BLOCK pDevice,LM_UINT32 cpu_number); |
||||
LM_UINT32 ComputeCrc32(LM_UINT8 *pBuffer, LM_UINT32 BufferSize); |
||||
LM_STATUS LM_SwitchClocks(PLM_DEVICE_BLOCK pDevice); |
||||
|
||||
void LM_5714_FamForceFiber( PLM_DEVICE_BLOCK pDevice); |
||||
void LM_5714_FamGoFiberAutoNeg( PLM_DEVICE_BLOCK pDevice); |
||||
void LM_5714_FamFiberCheckLink( PLM_DEVICE_BLOCK pDevice); |
||||
|
||||
/******************************************************************************/ |
||||
/* These are the OS specific functions called by LMAC. */ |
||||
/******************************************************************************/ |
||||
|
||||
LM_STATUS MM_ReadConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT16 *pValue16); |
||||
LM_STATUS MM_WriteConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT16 Value16); |
||||
LM_STATUS MM_ReadConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT32 *pValue32); |
||||
LM_STATUS MM_WriteConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, |
||||
LM_UINT32 Value32); |
||||
LM_STATUS MM_MapMemBase(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_MapIoBase(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_IndicateRxPackets(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_IndicateTxPackets(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_StartTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS MM_CompleteTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS MM_AllocateMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
|
||||
PLM_VOID *pMemoryBlockVirt); |
||||
LM_STATUS MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize, |
||||
PLM_VOID *pMemoryBlockVirt, PLM_PHYSICAL_ADDRESS pMemoryBlockPhy, |
||||
LM_BOOL Cached); |
||||
LM_STATUS MM_GetConfig(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_IndicateStatus(PLM_DEVICE_BLOCK pDevice, LM_STATUS Status); |
||||
LM_STATUS MM_InitializeUmPackets(PLM_DEVICE_BLOCK pDevice); |
||||
LM_STATUS MM_FreeRxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
LM_STATUS MM_CoalesceTxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
PLM_DEVICE_BLOCK MM_FindPeerDev(PLM_DEVICE_BLOCK pDevice); |
||||
int MM_FindCapability(PLM_DEVICE_BLOCK pDevice, int capability); |
||||
LM_VOID MM_UnmapRxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket); |
||||
#ifdef BCM_NAPI_RXPOLL |
||||
LM_STATUS MM_ScheduleRxPoll(PLM_DEVICE_BLOCK pDevice); |
||||
#endif |
||||
LM_STATUS MM_Sleep(PLM_DEVICE_BLOCK pDevice, LM_UINT32 msec); |
||||
LM_STATUS LM_MbufWorkAround(PLM_DEVICE_BLOCK pDevice); |
||||
|
||||
#ifdef INCLUDE_5703_A0_FIX |
||||
LM_STATUS LM_Load5703DmaWFirmware(PLM_DEVICE_BLOCK pDevice); |
||||
#endif |
||||
|
||||
/* Debugging support */ |
||||
|
||||
extern int b57_msg_level; |
||||
|
||||
#define B57_ERR_VAL 1 |
||||
#define B57_INFO_VAL 2 |
||||
|
||||
#define B57_ERR(args) do {if (b57_msg_level & B57_ERR_VAL) printf args;} while (0) |
||||
#define B57_INFO(args) do {if (b57_msg_level & B57_INFO_VAL) printf args;} while (0) |
||||
|
||||
#endif /* LM_H */ |
||||
|
@ -1,608 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/******************************************************************************/ |
||||
|
||||
|
||||
#ifndef MM_H |
||||
#define MM_H |
||||
|
||||
#include <linux/config.h> |
||||
|
||||
#if defined(CONFIG_SMP) && !defined(__SMP__) |
||||
#define __SMP__ |
||||
#endif |
||||
|
||||
#if defined(CONFIG_MODVERSIONS) && defined(MODULE) && !defined(MODVERSIONS) |
||||
#ifndef BCM_SMALL_DRV |
||||
#define MODVERSIONS |
||||
#endif |
||||
#endif |
||||
|
||||
#ifndef B57UM |
||||
#define __NO_VERSION__ |
||||
#endif |
||||
#include <linux/version.h> |
||||
|
||||
#ifdef MODULE |
||||
|
||||
#if defined(MODVERSIONS) && (LINUX_VERSION_CODE < 0x020500) |
||||
#ifndef BCM_SMALL_DRV |
||||
#include <linux/modversions.h> |
||||
#endif |
||||
#endif |
||||
|
||||
#if (LINUX_VERSION_CODE < 0x020605) |
||||
#include <linux/module.h> |
||||
#else |
||||
#include <linux/moduleparam.h> |
||||
#endif |
||||
|
||||
#else |
||||
|
||||
#define MOD_INC_USE_COUNT |
||||
#define MOD_DEC_USE_COUNT |
||||
#define SET_MODULE_OWNER(dev) |
||||
#define MODULE_DEVICE_TABLE(pci, pci_tbl) |
||||
#endif |
||||
|
||||
|
||||
#include <linux/kernel.h> |
||||
#include <linux/sched.h> |
||||
#include <linux/string.h> |
||||
#include <linux/timer.h> |
||||
#include <linux/errno.h> |
||||
#include <linux/ioport.h> |
||||
#include <linux/slab.h> |
||||
#include <linux/interrupt.h> |
||||
#include <linux/pci.h> |
||||
#include <linux/init.h> |
||||
#include <linux/netdevice.h> |
||||
#include <linux/etherdevice.h> |
||||
#include <linux/skbuff.h> |
||||
#include <linux/reboot.h> |
||||
#include <asm/processor.h> /* Processor type for cache alignment. */ |
||||
#include <asm/bitops.h> |
||||
#include <asm/io.h> |
||||
#include <asm/unaligned.h> |
||||
#include <linux/delay.h> |
||||
#include <asm/byteorder.h> |
||||
#include <linux/time.h> |
||||
#include <asm/uaccess.h> |
||||
#if (LINUX_VERSION_CODE >= 0x020400) |
||||
#if (LINUX_VERSION_CODE < 0x020500) |
||||
#include <linux/wrapper.h> |
||||
#endif |
||||
#include <linux/ethtool.h> |
||||
#endif |
||||
#ifdef CONFIG_PROC_FS |
||||
#include <linux/smp_lock.h> |
||||
#include <linux/proc_fs.h> |
||||
#define BCM_PROC_FS 1 |
||||
#endif |
||||
#ifdef NETIF_F_HW_VLAN_TX |
||||
#include <linux/if_vlan.h> |
||||
#define BCM_VLAN 1 |
||||
#endif |
||||
#ifdef NETIF_F_TSO |
||||
#define BCM_TSO 1 |
||||
#define INCLUDE_TCP_SEG_SUPPORT 1 |
||||
#include <net/ip.h> |
||||
#include <net/tcp.h> |
||||
#include <net/checksum.h> |
||||
#endif |
||||
|
||||
#ifndef LINUX_KERNEL_VERSION |
||||
#define LINUX_KERNEL_VERSION 0 |
||||
#endif |
||||
|
||||
#ifndef MAX_SKB_FRAGS |
||||
#define MAX_SKB_FRAGS 0 |
||||
#endif |
||||
|
||||
#if (LINUX_VERSION_CODE >= 0x020400) |
||||
#ifndef ETHTOOL_GEEPROM |
||||
|
||||
#define ETHTOOL_GEEPROM 0x0000000b /* Get EEPROM data */ |
||||
#define ETHTOOL_SEEPROM 0x0000000c /* Set EEPROM data */ |
||||
|
||||
/* for passing EEPROM chunks */ |
||||
struct ethtool_eeprom { |
||||
u32 cmd; |
||||
u32 magic; |
||||
u32 offset; /* in bytes */ |
||||
u32 len; /* in bytes */ |
||||
u8 data[0]; |
||||
}; |
||||
#define BCM_EEDUMP_LEN(info_p, size) *((u32 *) &((info_p)->reserved1[24]))=size |
||||
|
||||
#else |
||||
|
||||
#define BCM_EEDUMP_LEN(info_p, size) (info_p)->eedump_len=size |
||||
|
||||
#endif |
||||
#endif |
||||
|
||||
#define BCM_INT_COAL 1 |
||||
#define BCM_NIC_SEND_BD 1 |
||||
#define BCM_ASF 1 |
||||
#define BCM_WOL 1 |
||||
#define BCM_TASKLET 1 |
||||
|
||||
#if HAVE_NETIF_RECEIVE_SKB |
||||
#define BCM_NAPI_RXPOLL 1 |
||||
#undef BCM_TASKLET |
||||
#endif |
||||
|
||||
#if defined(CONFIG_PPC64) |
||||
#define BCM_DISCONNECT_AT_CACHELINE 1 |
||||
#endif |
||||
|
||||
#ifdef BCM_SMALL_DRV |
||||
#undef BCM_PROC_FS |
||||
#undef ETHTOOL_GEEPROM |
||||
#undef ETHTOOL_SEEPROM |
||||
#undef ETHTOOL_GREGS |
||||
#undef ETHTOOL_GPAUSEPARAM |
||||
#undef ETHTOOL_GRXCSUM |
||||
#undef ETHTOOL_TEST |
||||
#undef BCM_INT_COAL |
||||
#undef BCM_NIC_SEND_BD |
||||
#undef BCM_WOL |
||||
#undef BCM_TASKLET |
||||
#undef BCM_TSO |
||||
#endif |
||||
|
||||
#ifdef __BIG_ENDIAN |
||||
#define BIG_ENDIAN_HOST 1 |
||||
#endif |
||||
|
||||
#define MM_SWAP_LE32(x) cpu_to_le32(x) |
||||
#define MM_SWAP_BE32(x) cpu_to_be32(x) |
||||
|
||||
#if (LINUX_VERSION_CODE < 0x020327) |
||||
#define __raw_readl readl |
||||
#define __raw_writel writel |
||||
#endif |
||||
|
||||
#define MM_MEMWRITEL(ptr, val) __raw_writel(val, ptr) |
||||
#define MM_MEMREADL(ptr) __raw_readl(ptr) |
||||
|
||||
typedef atomic_t MM_ATOMIC_T; |
||||
|
||||
#define MM_ATOMIC_SET(ptr, val) atomic_set(ptr, val) |
||||
#define MM_ATOMIC_READ(ptr) atomic_read(ptr) |
||||
#define MM_ATOMIC_INC(ptr) atomic_inc(ptr) |
||||
#define MM_ATOMIC_ADD(ptr, val) atomic_add(val, ptr) |
||||
#define MM_ATOMIC_DEC(ptr) atomic_dec(ptr) |
||||
#define MM_ATOMIC_SUB(ptr, val) atomic_sub(val, ptr) |
||||
|
||||
|
||||
#ifndef mmiowb |
||||
#define mmiowb() |
||||
#endif |
||||
|
||||
|
||||
#define MM_MB() mb() |
||||
#define MM_WMB() wmb() |
||||
#define MM_RMB() rmb() |
||||
#define MM_MMIOWB() mmiowb() |
||||
|
||||
#include "lm.h" |
||||
#include "queue.h" |
||||
#include "tigon3.h" |
||||
|
||||
#if DBG |
||||
#define STATIC |
||||
#else |
||||
#define STATIC static |
||||
#endif |
||||
|
||||
extern int MM_Packet_Desc_Size; |
||||
|
||||
#define MM_PACKET_DESC_SIZE MM_Packet_Desc_Size |
||||
|
||||
DECLARE_QUEUE_TYPE(UM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT+1); |
||||
|
||||
#define MAX_MEM 16 |
||||
#define MAX_MEM2 4 |
||||
|
||||
#if (LINUX_VERSION_CODE < 0x020211) |
||||
typedef u32 dma_addr_t; |
||||
#endif |
||||
|
||||
#if (LINUX_VERSION_CODE < 0x02032a) |
||||
#define pci_map_single(dev, address, size, dir) virt_to_bus(address) |
||||
#define pci_unmap_single(dev, dma_addr, size, dir) |
||||
#endif |
||||
|
||||
#if MAX_SKB_FRAGS |
||||
#if (LINUX_VERSION_CODE >= 0x02040d) |
||||
|
||||
typedef dma_addr_t dmaaddr_high_t; |
||||
|
||||
#else |
||||
|
||||
#if defined(CONFIG_HIGHMEM) && defined(CONFIG_X86) && !defined(CONFIG_X86_64) |
||||
|
||||
#if defined(CONFIG_HIGHMEM64G) |
||||
typedef unsigned long long dmaaddr_high_t; |
||||
#else |
||||
typedef dma_addr_t dmaaddr_high_t; |
||||
#endif |
||||
|
||||
#ifndef pci_map_page |
||||
#define pci_map_page bcm_pci_map_page |
||||
#endif |
||||
|
||||
static inline dmaaddr_high_t |
||||
bcm_pci_map_page(struct pci_dev *dev, struct page *page, |
||||
int offset, size_t size, int dir) |
||||
{ |
||||
dmaaddr_high_t phys; |
||||
|
||||
phys = (page-mem_map) * (dmaaddr_high_t) PAGE_SIZE + offset; |
||||
|
||||
return phys; |
||||
} |
||||
|
||||
#ifndef pci_unmap_page |
||||
#define pci_unmap_page(dev, map, size, dir) |
||||
#endif |
||||
|
||||
#else /* #if defined(CONFIG_HIGHMEM) && defined(CONFIG_X86) && ! defined(CONFIG_X86_64)*/ |
||||
|
||||
typedef dma_addr_t dmaaddr_high_t; |
||||
|
||||
/* Warning - This may not work for all architectures if HIGHMEM is defined */ |
||||
|
||||
#ifndef pci_map_page |
||||
#define pci_map_page(dev, page, offset, size, dir) \ |
||||
pci_map_single(dev, page_address(page) + (offset), size, dir) |
||||
#endif |
||||
#ifndef pci_unmap_page |
||||
#define pci_unmap_page(dev, map, size, dir) \ |
||||
pci_unmap_single(dev, map, size, dir) |
||||
#endif |
||||
|
||||
#endif /* #if defined(CONFIG_HIGHMEM) && defined(CONFIG_X86) && ! defined(CONFIG_X86_64)*/ |
||||
|
||||
#endif /* #if (LINUX_VERSION_CODE >= 0x02040d)*/ |
||||
#endif /* #if MAX_SKB_FRAGS*/ |
||||
|
||||
#if defined(CONFIG_X86) && !defined(CONFIG_X86_64) |
||||
#define NO_PCI_UNMAP 1 |
||||
#endif |
||||
|
||||
#if (LINUX_VERSION_CODE < 0x020412) |
||||
#if !defined(NO_PCI_UNMAP) |
||||
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; |
||||
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; |
||||
|
||||
#define pci_unmap_addr(PTR, ADDR_NAME) \ |
||||
((PTR)->ADDR_NAME) |
||||
|
||||
#define pci_unmap_len(PTR, LEN_NAME) \ |
||||
((PTR)->LEN_NAME) |
||||
|
||||
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ |
||||
(((PTR)->ADDR_NAME) = (VAL)) |
||||
|
||||
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ |
||||
(((PTR)->LEN_NAME) = (VAL)) |
||||
#else |
||||
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) |
||||
#define DECLARE_PCI_UNMAP_LEN(ADDR_NAME) |
||||
|
||||
#define pci_unmap_addr(PTR, ADDR_NAME) 0 |
||||
#define pci_unmap_len(PTR, LEN_NAME) 0 |
||||
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) |
||||
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) |
||||
#endif |
||||
#endif |
||||
|
||||
#if (LINUX_VERSION_CODE < 0x02030e) |
||||
#define net_device device |
||||
#define netif_carrier_on(dev) |
||||
#define netif_carrier_off(dev) |
||||
#endif |
||||
|
||||
#if (LINUX_VERSION_CODE < 0x02032b) |
||||
#define tasklet_struct tq_struct |
||||
#endif |
||||
|
||||
typedef struct _UM_DEVICE_BLOCK { |
||||
LM_DEVICE_BLOCK lm_dev; |
||||
struct net_device *dev; |
||||
struct pci_dev *pdev; |
||||
struct net_device *next_module; |
||||
char *name; |
||||
#ifdef BCM_PROC_FS |
||||
struct proc_dir_entry *pfs_entry; |
||||
char pfs_name[32]; |
||||
#endif |
||||
void *mem_list[MAX_MEM]; |
||||
dma_addr_t dma_list[MAX_MEM]; |
||||
int mem_size_list[MAX_MEM]; |
||||
int mem_list_num; |
||||
|
||||
int index; |
||||
int opened; |
||||
int suspended; |
||||
int using_dac; /* dual address cycle */ |
||||
int delayed_link_ind; /* Delay link status during initial load */ |
||||
int adapter_just_inited; /* the first few seconds after init. */ |
||||
int timer_interval; |
||||
int statstimer_interval; |
||||
int adaptive_expiry; |
||||
int crc_counter_expiry; |
||||
int poll_tbi_interval; |
||||
int poll_tbi_expiry; |
||||
int asf_heartbeat; |
||||
int tx_full; |
||||
int tx_queued; |
||||
int line_speed; /* in Mbps, 0 if link is down */ |
||||
UM_RX_PACKET_Q rx_out_of_buf_q; |
||||
int rx_out_of_buf; |
||||
int rx_buf_repl_thresh; |
||||
int rx_buf_repl_panic_thresh; |
||||
int rx_buf_repl_isr_limit; |
||||
int rx_buf_align; |
||||
struct timer_list timer; |
||||
struct timer_list statstimer; |
||||
int do_global_lock; |
||||
spinlock_t global_lock; |
||||
spinlock_t undi_lock; |
||||
spinlock_t phy_lock; |
||||
unsigned long undi_flags; |
||||
volatile unsigned long interrupt; |
||||
atomic_t intr_sem; |
||||
int tasklet_pending; |
||||
volatile unsigned long tasklet_busy; |
||||
struct tasklet_struct tasklet; |
||||
struct net_device_stats stats; |
||||
int intr_test; |
||||
int intr_test_result; |
||||
#ifdef NETIF_F_HW_VLAN_TX |
||||
struct vlan_group *vlgrp; |
||||
#endif |
||||
int vlan_tag_mode; /* Setting to allow ASF to work properly with */ |
||||
/* VLANs */ |
||||
#define VLAN_TAG_MODE_AUTO_STRIP 0 |
||||
#define VLAN_TAG_MODE_NORMAL_STRIP 1 |
||||
#define VLAN_TAG_MODE_FORCED_STRIP 2 |
||||
|
||||
/* Auto mode - VLAN TAGs are always stripped if ASF is enabled, */ |
||||
/* If ASF is not enabled, it will be in normal mode. */ |
||||
/* Normal mode - VLAN TAGs are stripped when VLANs are registered */ |
||||
/* Forced mode - VLAN TAGs are always stripped. */ |
||||
|
||||
int adaptive_coalesce; |
||||
uint rx_last_cnt; |
||||
uint tx_last_cnt; |
||||
uint rx_curr_coalesce_frames; |
||||
uint rx_curr_coalesce_frames_intr; |
||||
uint rx_curr_coalesce_ticks; |
||||
uint tx_curr_coalesce_frames; |
||||
#if TIGON3_DEBUG |
||||
unsigned long tx_zc_count; |
||||
unsigned long tx_chksum_count; |
||||
unsigned long tx_himem_count; |
||||
unsigned long rx_good_chksum_count; |
||||
#endif |
||||
unsigned long rx_bad_chksum_count; |
||||
#ifdef BCM_TSO |
||||
unsigned long tso_pkt_count; |
||||
#endif |
||||
unsigned long rx_misc_errors; |
||||
uint64_t phy_crc_count; |
||||
unsigned int spurious_int; |
||||
|
||||
void *sbh; |
||||
unsigned long boardflags; |
||||
void *robo; |
||||
int qos; |
||||
} UM_DEVICE_BLOCK, *PUM_DEVICE_BLOCK; |
||||
|
||||
typedef struct _UM_PACKET { |
||||
LM_PACKET lm_packet; |
||||
struct sk_buff *skbuff; |
||||
#if MAX_SKB_FRAGS |
||||
DECLARE_PCI_UNMAP_ADDR(map[MAX_SKB_FRAGS + 1]) |
||||
DECLARE_PCI_UNMAP_LEN(map_len[MAX_SKB_FRAGS + 1]) |
||||
#else |
||||
DECLARE_PCI_UNMAP_ADDR(map[1]) |
||||
DECLARE_PCI_UNMAP_LEN(map_len[1]) |
||||
#endif |
||||
} UM_PACKET, *PUM_PACKET; |
||||
|
||||
static inline void MM_SetAddr(LM_PHYSICAL_ADDRESS *paddr, dma_addr_t addr) |
||||
{ |
||||
#if BITS_PER_LONG == 64 |
||||
paddr->High = ((unsigned long) addr) >> 32; |
||||
paddr->Low = ((unsigned long) addr) & 0xffffffff; |
||||
#else |
||||
paddr->High = 0; |
||||
paddr->Low = (unsigned long) addr; |
||||
#endif |
||||
} |
||||
|
||||
static inline void MM_SetT3Addr(T3_64BIT_HOST_ADDR *paddr, dma_addr_t addr) |
||||
{ |
||||
#if BITS_PER_LONG == 64 |
||||
paddr->High = ((unsigned long) addr) >> 32; |
||||
paddr->Low = ((unsigned long) addr) & 0xffffffff; |
||||
#else |
||||
paddr->High = 0; |
||||
paddr->Low = (unsigned long) addr; |
||||
#endif |
||||
} |
||||
|
||||
#if MAX_SKB_FRAGS |
||||
static inline void MM_SetT3AddrHigh(T3_64BIT_HOST_ADDR *paddr, |
||||
dmaaddr_high_t addr) |
||||
{ |
||||
#if defined(CONFIG_HIGHMEM64G) && defined(CONFIG_X86) && !defined(CONFIG_X86_64) |
||||
paddr->High = (unsigned long) (addr >> 32); |
||||
paddr->Low = (unsigned long) (addr & 0xffffffff); |
||||
#else |
||||
MM_SetT3Addr(paddr, (dma_addr_t) addr); |
||||
#endif |
||||
} |
||||
#endif |
||||
|
||||
static inline void MM_MapRxDma(PLM_DEVICE_BLOCK pDevice, |
||||
struct _LM_PACKET *pPacket, |
||||
T3_64BIT_HOST_ADDR *paddr) |
||||
{ |
||||
dma_addr_t map; |
||||
struct sk_buff *skb = ((struct _UM_PACKET *) pPacket)->skbuff; |
||||
|
||||
map = pci_map_single(((struct _UM_DEVICE_BLOCK *)pDevice)->pdev, |
||||
skb->tail, |
||||
pPacket->u.Rx.RxBufferSize, |
||||
PCI_DMA_FROMDEVICE); |
||||
pci_unmap_addr_set(((struct _UM_PACKET *) pPacket), map[0], map); |
||||
MM_SetT3Addr(paddr, map); |
||||
} |
||||
|
||||
static inline void MM_MapTxDma(PLM_DEVICE_BLOCK pDevice, |
||||
struct _LM_PACKET *pPacket, |
||||
T3_64BIT_HOST_ADDR *paddr, |
||||
LM_UINT32 *len, |
||||
int frag) |
||||
{ |
||||
dma_addr_t map; |
||||
struct sk_buff *skb = ((struct _UM_PACKET *) pPacket)->skbuff; |
||||
unsigned int length; |
||||
|
||||
if (frag == 0) { |
||||
#if MAX_SKB_FRAGS |
||||
if (skb_shinfo(skb)->nr_frags) |
||||
length = skb->len - skb->data_len; |
||||
else |
||||
#endif |
||||
length = skb->len; |
||||
map = pci_map_single(((struct _UM_DEVICE_BLOCK *)pDevice)->pdev, |
||||
skb->data, length, PCI_DMA_TODEVICE); |
||||
MM_SetT3Addr(paddr, map); |
||||
pci_unmap_addr_set(((struct _UM_PACKET *)pPacket), map[0], map); |
||||
pci_unmap_len_set(((struct _UM_PACKET *) pPacket), map_len[0], |
||||
length); |
||||
*len = length; |
||||
} |
||||
#if MAX_SKB_FRAGS |
||||
else { |
||||
skb_frag_t *sk_frag; |
||||
dmaaddr_high_t hi_map; |
||||
|
||||
sk_frag = &skb_shinfo(skb)->frags[frag - 1]; |
||||
|
||||
hi_map = pci_map_page( |
||||
((struct _UM_DEVICE_BLOCK *)pDevice)->pdev, |
||||
sk_frag->page, |
||||
sk_frag->page_offset, |
||||
sk_frag->size, PCI_DMA_TODEVICE); |
||||
|
||||
MM_SetT3AddrHigh(paddr, hi_map); |
||||
pci_unmap_addr_set(((struct _UM_PACKET *) pPacket), map[frag], |
||||
hi_map); |
||||
pci_unmap_len_set(((struct _UM_PACKET *) pPacket), |
||||
map_len[frag], sk_frag->size); |
||||
*len = sk_frag->size; |
||||
} |
||||
#endif |
||||
} |
||||
|
||||
#define BCM5700_PHY_LOCK(pUmDevice, flags) { \ |
||||
spinlock_t *lock; \
|
||||
if ((pUmDevice)->do_global_lock) { \
|
||||
lock = &(pUmDevice)->global_lock; \
|
||||
} \
|
||||
else { \
|
||||
lock = &(pUmDevice)->phy_lock; \
|
||||
} \
|
||||
spin_lock_irqsave(lock, flags); \
|
||||
} |
||||
|
||||
#define BCM5700_PHY_UNLOCK(pUmDevice, flags) { \ |
||||
spinlock_t *lock; \
|
||||
if ((pUmDevice)->do_global_lock) { \
|
||||
lock = &(pUmDevice)->global_lock; \
|
||||
} \
|
||||
else { \
|
||||
lock = &(pUmDevice)->phy_lock; \
|
||||
} \
|
||||
spin_unlock_irqrestore(lock, flags); \
|
||||
} |
||||
|
||||
|
||||
#define MM_ACQUIRE_UNDI_LOCK(_pDevice) \ |
||||
if (!(((PUM_DEVICE_BLOCK)(_pDevice))->do_global_lock)) { \
|
||||
unsigned long flags; \
|
||||
spin_lock_irqsave(&((PUM_DEVICE_BLOCK)(_pDevice))->undi_lock, flags); \
|
||||
((PUM_DEVICE_BLOCK)(_pDevice))->undi_flags = flags; \
|
||||
} |
||||
|
||||
#define MM_RELEASE_UNDI_LOCK(_pDevice) \ |
||||
if (!(((PUM_DEVICE_BLOCK)(_pDevice))->do_global_lock)) { \
|
||||
unsigned long flags = ((PUM_DEVICE_BLOCK) (_pDevice))->undi_flags; \
|
||||
spin_unlock_irqrestore(&((PUM_DEVICE_BLOCK)(_pDevice))->undi_lock, flags); \
|
||||
} |
||||
|
||||
#define MM_ACQUIRE_PHY_LOCK_IN_IRQ(_pDevice) \ |
||||
if (!(((PUM_DEVICE_BLOCK)(_pDevice))->do_global_lock)) { \
|
||||
spin_lock(&((PUM_DEVICE_BLOCK)(_pDevice))->phy_lock); \
|
||||
} |
||||
|
||||
#define MM_RELEASE_PHY_LOCK_IN_IRQ(_pDevice) \ |
||||
if (!(((PUM_DEVICE_BLOCK)(_pDevice))->do_global_lock)) { \
|
||||
spin_unlock(&((PUM_DEVICE_BLOCK)(_pDevice))->phy_lock); \
|
||||
} |
||||
|
||||
#define MM_UINT_PTR(_ptr) ((unsigned long) (_ptr)) |
||||
|
||||
#define MM_GETSTATS64(_Ctr) \ |
||||
(uint64_t) (_Ctr).Low + ((uint64_t) (_Ctr).High << 32) |
||||
|
||||
#define MM_GETSTATS32(_Ctr) \ |
||||
(uint32_t) (_Ctr).Low |
||||
|
||||
#if BITS_PER_LONG == 64 |
||||
#define MM_GETSTATS(_Ctr) (unsigned long) MM_GETSTATS64(_Ctr) |
||||
#else |
||||
#define MM_GETSTATS(_Ctr) (unsigned long) MM_GETSTATS32(_Ctr) |
||||
#endif |
||||
|
||||
#if (LINUX_VERSION_CODE >= 0x020600) |
||||
#define mm_copy_to_user( to, from, size ) \ |
||||
(in_atomic() ? (memcpy((to),(from),(size)), 0) : copy_to_user((to),(from),(size))) |
||||
#define mm_copy_from_user( to, from, size ) \ |
||||
(in_atomic() ? (memcpy((to),(from),(size)), 0) : copy_from_user((to),(from),(size))) |
||||
#else |
||||
#define mm_copy_to_user( to, from, size ) \ |
||||
copy_to_user((to),(from),(size) ) |
||||
#define mm_copy_from_user( to, from, size ) \ |
||||
copy_from_user((to),(from),(size)) |
||||
#endif |
||||
|
||||
#ifndef printf |
||||
#define printf(fmt, args...) printk(KERN_WARNING fmt, ##args) |
||||
#endif |
||||
|
||||
#define DbgPrint(fmt, arg...) printk(KERN_DEBUG fmt, ##arg) |
||||
#if defined(CONFIG_X86) |
||||
#define DbgBreakPoint() __asm__("int $129") |
||||
#else |
||||
#define DbgBreakPoint() |
||||
#endif |
||||
#define MM_Wait(time) udelay(time) |
||||
|
||||
#endif |
@ -1,151 +0,0 @@ |
||||
/*
|
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
* Fundamental constants relating to IP Protocol |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _bcmip_h_ |
||||
#define _bcmip_h_ |
||||
|
||||
/* enable structure packing */ |
||||
#if defined(__GNUC__) |
||||
#define PACKED __attribute__((packed)) |
||||
#else |
||||
#pragma pack(1) |
||||
#define PACKED |
||||
#endif |
||||
|
||||
|
||||
/* IPV4 and IPV6 common */ |
||||
#define IP_VER_OFFSET 0x0 /* offset to version field */ |
||||
#define IP_VER_MASK 0xf0 /* version mask */ |
||||
#define IP_VER_SHIFT 4 /* version shift */ |
||||
#define IP_VER_4 4 /* version number for IPV4 */ |
||||
#define IP_VER_6 6 /* version number for IPV6 */ |
||||
|
||||
#define IP_VER(ip_body) \ |
||||
((((uint8 *)(ip_body))[IP_VER_OFFSET] & IP_VER_MASK) >> IP_VER_SHIFT) |
||||
|
||||
#define IP_PROT_ICMP 0x1 /* ICMP protocol */ |
||||
#define IP_PROT_TCP 0x6 /* TCP protocol */ |
||||
#define IP_PROT_UDP 0x11 /* UDP protocol type */ |
||||
|
||||
/* IPV4 field offsets */ |
||||
#define IPV4_VER_HL_OFFSET 0 /* version and ihl byte offset */ |
||||
#define IPV4_TOS_OFFSET 1 /* type of service offset */ |
||||
#define IPV4_PKTLEN_OFFSET 2 /* packet length offset */ |
||||
#define IPV4_PKTFLAG_OFFSET 6 /* more-frag,dont-frag flag offset */ |
||||
#define IPV4_PROT_OFFSET 9 /* protocol type offset */ |
||||
#define IPV4_CHKSUM_OFFSET 10 /* IP header checksum offset */ |
||||
#define IPV4_SRC_IP_OFFSET 12 /* src IP addr offset */ |
||||
#define IPV4_DEST_IP_OFFSET 16 /* dest IP addr offset */ |
||||
#define IPV4_OPTIONS_OFFSET 20 /* IP options offset */ |
||||
|
||||
/* IPV4 field decodes */ |
||||
#define IPV4_VER_MASK 0xf0 /* IPV4 version mask */ |
||||
#define IPV4_VER_SHIFT 4 /* IPV4 version shift */ |
||||
|
||||
#define IPV4_HLEN_MASK 0x0f /* IPV4 header length mask */ |
||||
#define IPV4_HLEN(ipv4_body) (4 * (((uint8 *)(ipv4_body))[IPV4_VER_HL_OFFSET] & IPV4_HLEN_MASK)) |
||||
|
||||
#define IPV4_ADDR_LEN 4 /* IPV4 address length */ |
||||
|
||||
#define IPV4_ADDR_NULL(a) ((((uint8 *)(a))[0] | ((uint8 *)(a))[1] | \ |
||||
((uint8 *)(a))[2] | ((uint8 *)(a))[3]) == 0) |
||||
|
||||
#define IPV4_ADDR_BCAST(a) ((((uint8 *)(a))[0] & ((uint8 *)(a))[1] & \ |
||||
((uint8 *)(a))[2] & ((uint8 *)(a))[3]) == 0xff) |
||||
|
||||
#define IPV4_TOS_DSCP_MASK 0xfc /* DiffServ codepoint mask */ |
||||
#define IPV4_TOS_DSCP_SHIFT 2 /* DiffServ codepoint shift */ |
||||
|
||||
#define IPV4_TOS(ipv4_body) (((uint8 *)(ipv4_body))[IPV4_TOS_OFFSET]) |
||||
|
||||
#define IPV4_TOS_PREC_MASK 0xe0 /* Historical precedence mask */ |
||||
#define IPV4_TOS_PREC_SHIFT 5 /* Historical precedence shift */ |
||||
|
||||
#define IPV4_TOS_LOWDELAY 0x10 /* Lowest delay requested */ |
||||
#define IPV4_TOS_THROUGHPUT 0x8 /* Best throughput requested */ |
||||
#define IPV4_TOS_RELIABILITY 0x4 /* Most reliable delivery requested */ |
||||
|
||||
#define IPV4_PROT(ipv4_body) (((uint8 *)(ipv4_body))[IPV4_PROT_OFFSET]) |
||||
|
||||
#define IPV4_FRAG_RESV 0x8000 /* Reserved */ |
||||
#define IPV4_FRAG_DONT 0x4000 /* Don't fragment */ |
||||
#define IPV4_FRAG_MORE 0x2000 /* More fragments */ |
||||
#define IPV4_FRAG_OFFSET_MASK 0x1fff /* Fragment offset */ |
||||
|
||||
#define IPV4_ADDR_STR_LEN 16 /* Max IP address length in string format */ |
||||
|
||||
/* IPv4, no options only. */ |
||||
#define IPV4_NO_OPTIONS_HDR_LEN 20 |
||||
#define IPV4_NO_OPTIONS_PAYLOAD(ip_hdr) (&(((uint8 *)(ip_hdr))[IPV4_NO_OPTIONS_HDR_LEN])) |
||||
|
||||
#define IPV4_PAYLOAD_LEN(ip_body) \ |
||||
(((int)(((uint8 *)(ip_body))[IPV4_PKTLEN_OFFSET + 0]) << 8) | \
|
||||
((uint8 *)(ip_body))[IPV4_PKTLEN_OFFSET + 1]) |
||||
|
||||
/* IPV4 packet formats */ |
||||
struct ipv4_addr { |
||||
uint8 addr[IPV4_ADDR_LEN]; |
||||
} PACKED; |
||||
|
||||
struct ipv4_hdr { |
||||
uint8 version_ihl; /* Version and Internet Header Length */ |
||||
uint8 tos; /* Type Of Service */ |
||||
uint16 tot_len; /* Number of bytes in packet (max 65535) */ |
||||
uint16 id; |
||||
uint16 frag; /* 3 flag bits and fragment offset */ |
||||
uint8 ttl; /* Time To Live */ |
||||
uint8 prot; /* Protocol */ |
||||
uint16 hdr_chksum; /* IP header checksum */ |
||||
uint8 src_ip[IPV4_ADDR_LEN]; /* Source IP Address */ |
||||
uint8 dst_ip[IPV4_ADDR_LEN]; /* Destination IP Address */ |
||||
} PACKED; |
||||
|
||||
/* IPV6 field offsets */ |
||||
#define IPV6_PAYLOAD_LEN_OFFSET 4 /* payload length offset */ |
||||
#define IPV6_NEXT_HDR_OFFSET 6 /* next header/protocol offset */ |
||||
#define IPV6_HOP_LIMIT_OFFSET 7 /* hop limit offset */ |
||||
#define IPV6_SRC_IP_OFFSET 8 /* src IP addr offset */ |
||||
#define IPV6_DEST_IP_OFFSET 24 /* dst IP addr offset */ |
||||
|
||||
/* IPV6 field decodes */ |
||||
#define IPV6_TRAFFIC_CLASS(ipv6_body) \ |
||||
(((((uint8 *)(ipv6_body))[0] & 0x0f) << 4) | \
|
||||
((((uint8 *)(ipv6_body))[1] & 0xf0) >> 4)) |
||||
|
||||
#define IPV6_FLOW_LABEL(ipv6_body) \ |
||||
(((((uint8 *)(ipv6_body))[1] & 0x0f) << 16) | \
|
||||
(((uint8 *)(ipv6_body))[2] << 8) | \
|
||||
(((uint8 *)(ipv6_body))[3])) |
||||
|
||||
#define IPV6_PAYLOAD_LEN(ipv6_body) \ |
||||
((((uint8 *)(ipv6_body))[IPV6_PAYLOAD_LEN_OFFSET + 0] << 8) | \
|
||||
((uint8 *)(ipv6_body))[IPV6_PAYLOAD_LEN_OFFSET + 1]) |
||||
|
||||
#define IPV6_NEXT_HDR(ipv6_body) \ |
||||
(((uint8 *)(ipv6_body))[IPV6_NEXT_HDR_OFFSET]) |
||||
|
||||
#define IPV6_PROT(ipv6_body) IPV6_NEXT_HDR(ipv6_body) |
||||
|
||||
#define IPV6_ADDR_LEN 16 /* IPV6 address length */ |
||||
|
||||
/* IPV4 TOS or IPV6 Traffic Classifier or 0 */ |
||||
#define IP_TOS(ip_body) \ |
||||
(IP_VER(ip_body) == IP_VER_4 ? IPV4_TOS(ip_body) : \
|
||||
IP_VER(ip_body) == IP_VER_6 ? IPV6_TRAFFIC_CLASS(ip_body) : 0) |
||||
|
||||
#undef PACKED |
||||
#if !defined(__GNUC__) |
||||
#pragma pack() |
||||
#endif |
||||
|
||||
#endif /* _bcmip_h_ */ |
@ -1,67 +0,0 @@ |
||||
/*
|
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
* Fundamental constants relating to TCP Protocol |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _bcmtcp_h_ |
||||
#define _bcmtcp_h_ |
||||
|
||||
/* enable structure packing */ |
||||
#if defined(__GNUC__) |
||||
#define PACKED __attribute__((packed)) |
||||
#else |
||||
#pragma pack(1) |
||||
#define PACKED |
||||
#endif |
||||
|
||||
#define TCP_SRC_PORT_OFFSET 0 /* TCP source port offset */ |
||||
#define TCP_DEST_PORT_OFFSET 2 /* TCP dest port offset */ |
||||
#define TCP_CHKSUM_OFFSET 16 /* TCP body checksum offset */ |
||||
|
||||
/* These fields are stored in network order */ |
||||
struct bcmtcp_hdr |
||||
{ |
||||
uint16 src_port; /* Source Port Address */ |
||||
uint16 dst_port; /* Destination Port Address */ |
||||
uint32 seq_num; /* TCP Sequence Number */ |
||||
uint32 ack_num; /* TCP Sequence Number */ |
||||
uint16 hdrlen_rsvd_flags; /* Header length, reserved bits and flags */ |
||||
uint16 tcpwin; /* TCP window */ |
||||
uint16 chksum; /* Segment checksum with pseudoheader */ |
||||
uint16 urg_ptr; /* Points to seq-num of byte following urg data */ |
||||
} PACKED; |
||||
|
||||
#undef PACKED |
||||
#if !defined(__GNUC__) |
||||
#pragma pack() |
||||
#endif |
||||
|
||||
/* Byte offset of flags in TCP header */ |
||||
#define TCP_FLAGS_OFFSET 13 |
||||
|
||||
#define TCP_FLAGS_FIN 0x01 |
||||
#define TCP_FLAGS_SYN 0x02 |
||||
#define TCP_FLAGS_RST 0x03 |
||||
#define TCP_FLAGS_PSH 0x04 |
||||
#define TCP_FLAGS_ACK 0x10 |
||||
#define TCP_FLAGS_URG 0x20 |
||||
#define TCP_FLAGS_ECN 0x40 |
||||
#define TCP_FLAGS_CWR 0x80 |
||||
|
||||
#define TCP_FLAGS(tcp_hdr) (((uint8 *)(tcp_hdr))[TCP_FLAGS_OFFSET]) |
||||
#define TCP_IS_ACK(tcp_hdr) (TCP_FLAGS(tcp_hdr) & TCP_FLAGS_ACK) |
||||
|
||||
#define TCP_SRC_PORT(tcp_hdr) (ntoh16(((struct bcmtcp_hdr*)(tcp_hdr))->src_port)) |
||||
#define TCP_DST_PORT(tcp_hdr) (ntoh16(((struct bcmtcp_hdr*)(tcp_hdr))->dst_port)) |
||||
#define TCP_SEQ_NUM(tcp_hdr) (ntoh32(((struct bcmtcp_hdr*)(tcp_hdr))->seq_num)) |
||||
#define TCP_ACK_NUM(tcp_hdr) (ntoh32(((struct bcmtcp_hdr*)(tcp_hdr))->ack_num)) |
||||
|
||||
#endif /* #ifndef _bcmtcp_h_ */ |
@ -1,172 +0,0 @@ |
||||
/*
|
||||
* From FreeBSD 2.2.7: Fundamental constants relating to ethernet. |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _NET_ETHERNET_H_ /* use native BSD ethernet.h when available */ |
||||
#define _NET_ETHERNET_H_ |
||||
|
||||
#ifndef _TYPEDEFS_H_ |
||||
#include "typedefs.h" |
||||
#endif |
||||
|
||||
/* enable structure packing */ |
||||
#if defined(__GNUC__) |
||||
#define PACKED __attribute__((packed)) |
||||
#else |
||||
#pragma pack(1) |
||||
#define PACKED |
||||
#endif |
||||
|
||||
/*
|
||||
* The number of bytes in an ethernet (MAC) address. |
||||
*/ |
||||
#define ETHER_ADDR_LEN 6 |
||||
|
||||
/*
|
||||
* The number of bytes in the type field. |
||||
*/ |
||||
#define ETHER_TYPE_LEN 2 |
||||
|
||||
/*
|
||||
* The number of bytes in the trailing CRC field. |
||||
*/ |
||||
#define ETHER_CRC_LEN 4 |
||||
|
||||
/*
|
||||
* The length of the combined header. |
||||
*/ |
||||
#define ETHER_HDR_LEN (ETHER_ADDR_LEN * 2 + ETHER_TYPE_LEN) |
||||
|
||||
/*
|
||||
* The minimum packet length. |
||||
*/ |
||||
#define ETHER_MIN_LEN 64 |
||||
|
||||
/*
|
||||
* The minimum packet user data length. |
||||
*/ |
||||
#define ETHER_MIN_DATA 46 |
||||
|
||||
/*
|
||||
* The maximum packet length. |
||||
*/ |
||||
#define ETHER_MAX_LEN 1518 |
||||
|
||||
/*
|
||||
* The maximum packet user data length. |
||||
*/ |
||||
#define ETHER_MAX_DATA 1500 |
||||
|
||||
/* ether types */ |
||||
#define ETHER_TYPE_MIN 0x0600 /* Anything less than MIN is a length */ |
||||
#define ETHER_TYPE_IP 0x0800 /* IP */ |
||||
#define ETHER_TYPE_ARP 0x0806 /* ARP */ |
||||
#define ETHER_TYPE_8021Q 0x8100 /* 802.1Q */ |
||||
#define ETHER_TYPE_BRCM 0x886c /* Broadcom Corp. */ |
||||
#define ETHER_TYPE_802_1X 0x888e /* 802.1x */ |
||||
#ifdef BCMWPA2 |
||||
#define ETHER_TYPE_802_1X_PREAUTH 0x88c7 /* 802.1x preauthentication */ |
||||
#endif |
||||
|
||||
/* Broadcom subtype follows ethertype; First 2 bytes are reserved; Next 2 are subtype; */ |
||||
#define ETHER_BRCM_SUBTYPE_LEN 4 /* Broadcom 4 byte subtype */ |
||||
#define ETHER_BRCM_CRAM 0x1 /* Broadcom subtype cram protocol */ |
||||
|
||||
/* ether header */ |
||||
#define ETHER_DEST_OFFSET (0 * ETHER_ADDR_LEN) /* dest address offset */ |
||||
#define ETHER_SRC_OFFSET (1 * ETHER_ADDR_LEN) /* src address offset */ |
||||
#define ETHER_TYPE_OFFSET (2 * ETHER_ADDR_LEN) /* ether type offset */ |
||||
|
||||
/*
|
||||
* A macro to validate a length with |
||||
*/ |
||||
#define ETHER_IS_VALID_LEN(foo) \ |
||||
((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN) |
||||
|
||||
|
||||
#ifndef __INCif_etherh /* Quick and ugly hack for VxWorks */ |
||||
/*
|
||||
* Structure of a 10Mb/s Ethernet header. |
||||
*/ |
||||
struct ether_header { |
||||
uint8 ether_dhost[ETHER_ADDR_LEN]; |
||||
uint8 ether_shost[ETHER_ADDR_LEN]; |
||||
uint16 ether_type; |
||||
} PACKED; |
||||
|
||||
/*
|
||||
* Structure of a 48-bit Ethernet address. |
||||
*/ |
||||
struct ether_addr { |
||||
uint8 octet[ETHER_ADDR_LEN]; |
||||
} PACKED; |
||||
#endif /* !__INCif_etherh Quick and ugly hack for VxWorks */ |
||||
|
||||
/*
|
||||
* Takes a pointer, set, test, clear, toggle locally admininistered |
||||
* address bit in the 48-bit Ethernet address. |
||||
*/ |
||||
#define ETHER_SET_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] | 2)) |
||||
#define ETHER_IS_LOCALADDR(ea) (((uint8 *)(ea))[0] & 2) |
||||
#define ETHER_CLR_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] & 0xd)) |
||||
#define ETHER_TOGGLE_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] ^ 2)) |
||||
|
||||
/* Takes a pointer, marks unicast address bit in the MAC address */ |
||||
#define ETHER_SET_UNICAST(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] & ~1)) |
||||
|
||||
/*
|
||||
* Takes a pointer, returns true if a 48-bit multicast address |
||||
* (including broadcast, since it is all ones) |
||||
*/ |
||||
#define ETHER_ISMULTI(ea) (((const uint8 *)(ea))[0] & 1) |
||||
|
||||
|
||||
/* compare two ethernet addresses - assumes the pointers can be referenced as shorts */ |
||||
#define ether_cmp(a, b) (!(((short*)a)[0] == ((short*)b)[0]) | \ |
||||
!(((short*)a)[1] == ((short*)b)[1]) | \
|
||||
!(((short*)a)[2] == ((short*)b)[2])) |
||||
|
||||
/* copy an ethernet address - assumes the pointers can be referenced as shorts */ |
||||
#define ether_copy(s, d) { \ |
||||
((short*)d)[0] = ((short*)s)[0]; \
|
||||
((short*)d)[1] = ((short*)s)[1]; \
|
||||
((short*)d)[2] = ((short*)s)[2]; } |
||||
|
||||
/*
|
||||
* Takes a pointer, returns true if a 48-bit broadcast (all ones) |
||||
*/ |
||||
#define ETHER_ISBCAST(ea) ((((uint8 *)(ea))[0] & \ |
||||
((uint8 *)(ea))[1] & \
|
||||
((uint8 *)(ea))[2] & \
|
||||
((uint8 *)(ea))[3] & \
|
||||
((uint8 *)(ea))[4] & \
|
||||
((uint8 *)(ea))[5]) == 0xff) |
||||
|
||||
static const struct ether_addr ether_bcast = {{255, 255, 255, 255, 255, 255}}; |
||||
static const struct ether_addr ether_null = {{0, 0, 0, 0, 0, 0}}; |
||||
|
||||
/*
|
||||
* Takes a pointer, returns true if a 48-bit null address (all zeros) |
||||
*/ |
||||
#define ETHER_ISNULLADDR(ea) ((((uint8 *)(ea))[0] | \ |
||||
((uint8 *)(ea))[1] | \
|
||||
((uint8 *)(ea))[2] | \
|
||||
((uint8 *)(ea))[3] | \
|
||||
((uint8 *)(ea))[4] | \
|
||||
((uint8 *)(ea))[5]) == 0) |
||||
|
||||
#undef PACKED |
||||
#if !defined(__GNUC__) |
||||
#pragma pack() |
||||
#endif |
||||
|
||||
#endif /* _NET_ETHERNET_H_ */ |
@ -1,51 +0,0 @@ |
||||
/*
|
||||
* 802.1Q VLAN protocol definitions |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _vlan_h_ |
||||
#define _vlan_h_ |
||||
|
||||
/* enable structure packing */ |
||||
#if defined(__GNUC__) |
||||
#define PACKED __attribute__((packed)) |
||||
#else |
||||
#pragma pack(1) |
||||
#define PACKED |
||||
#endif |
||||
|
||||
#define VLAN_VID_MASK 0xfff /* low 12 bits are vlan id */ |
||||
#define VLAN_CFI_SHIFT 12 /* canonical format indicator bit */ |
||||
#define VLAN_PRI_SHIFT 13 /* user priority */ |
||||
|
||||
#define VLAN_PRI_MASK 7 /* 3 bits of priority */ |
||||
|
||||
#define VLAN_TAG_LEN 4 |
||||
#define VLAN_TAG_OFFSET (2 * ETHER_ADDR_LEN) /* offset in Ethernet II packet only */ |
||||
|
||||
#define VLAN_TPID 0x8100 /* VLAN ethertype/Tag Protocol ID */ |
||||
|
||||
struct ethervlan_header { |
||||
uint8 ether_dhost[ETHER_ADDR_LEN]; |
||||
uint8 ether_shost[ETHER_ADDR_LEN]; |
||||
uint16 vlan_type; /* 0x8100 */ |
||||
uint16 vlan_tag; /* priority, cfi and vid */ |
||||
uint16 ether_type; |
||||
}; |
||||
|
||||
#define ETHERVLAN_HDR_LEN (ETHER_HDR_LEN + VLAN_TAG_LEN) |
||||
|
||||
#undef PACKED |
||||
#if !defined(__GNUC__) |
||||
#pragma pack() |
||||
#endif |
||||
|
||||
#endif /* _vlan_h_ */ |
@ -1,347 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2000 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* Queue functions. */ |
||||
/* void QQ_InitQueue(PQQ_CONTAINER pQueue) */ |
||||
/* char QQ_Full(PQQ_CONTAINER pQueue) */ |
||||
/* char QQ_Empty(PQQ_CONTAINER pQueue) */ |
||||
/* unsigned int QQ_GetSize(PQQ_CONTAINER pQueue) */ |
||||
/* unsigned int QQ_GetEntryCnt(PQQ_CONTAINER pQueue) */ |
||||
/* char QQ_PushHead(PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) */ |
||||
/* char QQ_PushTail(PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry) */ |
||||
/* PQQ_ENTRY QQ_PopHead(PQQ_CONTAINER pQueue) */ |
||||
/* PQQ_ENTRY QQ_PopTail(PQQ_CONTAINER pQueue) */ |
||||
/* PQQ_ENTRY QQ_GetHead(PQQ_CONTAINER pQueue, unsigned int Idx) */ |
||||
/* PQQ_ENTRY QQ_GetTail(PQQ_CONTAINER pQueue, unsigned int Idx) */ |
||||
/* */ |
||||
/* */ |
||||
/* History: */ |
||||
/* 02/25/00 Hav Khauv Initial version. */ |
||||
/******************************************************************************/ |
||||
|
||||
#ifndef BCM_QUEUE_H |
||||
#define BCM_QUEUE_H |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Queue definitions. */ |
||||
/******************************************************************************/ |
||||
|
||||
/* Entry for queueing. */ |
||||
typedef void *PQQ_ENTRY; |
||||
|
||||
|
||||
/* Queue header -- base type. */ |
||||
typedef struct { |
||||
unsigned int Head; |
||||
unsigned int Tail; |
||||
unsigned int Size; |
||||
MM_ATOMIC_T EntryCnt; |
||||
PQQ_ENTRY Array[1]; |
||||
} QQ_CONTAINER, *PQQ_CONTAINER; |
||||
|
||||
|
||||
/* Declare queue type macro. */ |
||||
#define DECLARE_QUEUE_TYPE(_QUEUE_TYPE, _QUEUE_SIZE) \ |
||||
\
|
||||
typedef struct { \
|
||||
QQ_CONTAINER Container; \
|
||||
PQQ_ENTRY EntryBuffer[_QUEUE_SIZE]; \
|
||||
} _QUEUE_TYPE, *P##_QUEUE_TYPE |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Compilation switches. */ |
||||
/******************************************************************************/ |
||||
|
||||
#if DBG |
||||
#undef QQ_NO_OVERFLOW_CHECK |
||||
#undef QQ_NO_UNDERFLOW_CHECK |
||||
#endif /* DBG */ |
||||
|
||||
#ifdef QQ_USE_MACROS |
||||
/* notdone */ |
||||
#else |
||||
|
||||
#ifdef QQ_NO_INLINE |
||||
#define __inline |
||||
#endif /* QQ_NO_INLINE */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static void
|
||||
QQ_InitQueue( |
||||
PQQ_CONTAINER pQueue, |
||||
unsigned int QueueSize) { |
||||
pQueue->Head = 0; |
||||
pQueue->Tail = 0; |
||||
pQueue->Size = QueueSize+1; |
||||
MM_ATOMIC_SET(&pQueue->EntryCnt, 0); |
||||
} /* QQ_InitQueue */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static char
|
||||
QQ_Full( |
||||
PQQ_CONTAINER pQueue) { |
||||
unsigned int NewHead; |
||||
|
||||
NewHead = (pQueue->Head + 1) % pQueue->Size; |
||||
|
||||
return(NewHead == pQueue->Tail); |
||||
} /* QQ_Full */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static char
|
||||
QQ_Empty( |
||||
PQQ_CONTAINER pQueue) { |
||||
return(pQueue->Head == pQueue->Tail); |
||||
} /* QQ_Empty */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static unsigned int
|
||||
QQ_GetSize( |
||||
PQQ_CONTAINER pQueue) { |
||||
return pQueue->Size; |
||||
} /* QQ_GetSize */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static unsigned int
|
||||
QQ_GetEntryCnt( |
||||
PQQ_CONTAINER pQueue) { |
||||
return MM_ATOMIC_READ(&pQueue->EntryCnt); |
||||
} /* QQ_GetEntryCnt */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/* TRUE entry was added successfully. */ |
||||
/* FALSE queue is full. */ |
||||
/******************************************************************************/ |
||||
__inline static char
|
||||
QQ_PushHead( |
||||
PQQ_CONTAINER pQueue,
|
||||
PQQ_ENTRY pEntry) { |
||||
unsigned int Head; |
||||
|
||||
Head = (pQueue->Head + 1) % pQueue->Size; |
||||
|
||||
#if !defined(QQ_NO_OVERFLOW_CHECK) |
||||
if(Head == pQueue->Tail) { |
||||
return 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_OVERFLOW_CHECK */ |
||||
|
||||
pQueue->Array[pQueue->Head] = pEntry; |
||||
MM_WMB(); |
||||
pQueue->Head = Head; |
||||
MM_ATOMIC_INC(&pQueue->EntryCnt); |
||||
|
||||
return -1; |
||||
} /* QQ_PushHead */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/* TRUE entry was added successfully. */ |
||||
/* FALSE queue is full. */ |
||||
/******************************************************************************/ |
||||
__inline static char
|
||||
QQ_PushTail( |
||||
PQQ_CONTAINER pQueue, |
||||
PQQ_ENTRY pEntry) { |
||||
unsigned int Tail; |
||||
|
||||
Tail = pQueue->Tail; |
||||
if(Tail == 0) { |
||||
Tail = pQueue->Size; |
||||
} /* if */ |
||||
Tail--; |
||||
|
||||
#if !defined(QQ_NO_OVERFLOW_CHECK) |
||||
if(Tail == pQueue->Head) { |
||||
return 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_OVERFLOW_CHECK */ |
||||
|
||||
pQueue->Array[Tail] = pEntry; |
||||
MM_WMB(); |
||||
pQueue->Tail = Tail; |
||||
MM_ATOMIC_INC(&pQueue->EntryCnt); |
||||
|
||||
return -1; |
||||
} /* QQ_PushTail */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static PQQ_ENTRY |
||||
QQ_PopHead( |
||||
PQQ_CONTAINER pQueue) { |
||||
unsigned int Head; |
||||
unsigned int Tail; |
||||
PQQ_ENTRY Entry; |
||||
|
||||
Head = pQueue->Head; |
||||
Tail = pQueue->Tail; |
||||
|
||||
MM_MB(); |
||||
#if !defined(QQ_NO_UNDERFLOW_CHECK) |
||||
if(Head == Tail) { |
||||
return (PQQ_ENTRY) 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_UNDERFLOW_CHECK */ |
||||
|
||||
if(Head == 0) { |
||||
Head = pQueue->Size; |
||||
} /* if */ |
||||
Head--; |
||||
|
||||
Entry = pQueue->Array[Head]; |
||||
MM_MB(); |
||||
pQueue->Head = Head; |
||||
MM_ATOMIC_DEC(&pQueue->EntryCnt); |
||||
|
||||
return Entry; |
||||
} /* QQ_PopHead */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static PQQ_ENTRY |
||||
QQ_PopTail( |
||||
PQQ_CONTAINER pQueue) { |
||||
unsigned int Head; |
||||
unsigned int Tail; |
||||
PQQ_ENTRY Entry; |
||||
|
||||
Head = pQueue->Head; |
||||
Tail = pQueue->Tail; |
||||
|
||||
MM_MB(); |
||||
#if !defined(QQ_NO_UNDERFLOW_CHECK) |
||||
if(Tail == Head) { |
||||
return (PQQ_ENTRY) 0; |
||||
} /* if */ |
||||
#endif /* QQ_NO_UNDERFLOW_CHECK */ |
||||
|
||||
Entry = pQueue->Array[Tail]; |
||||
MM_MB(); |
||||
pQueue->Tail = (Tail + 1) % pQueue->Size; |
||||
MM_ATOMIC_DEC(&pQueue->EntryCnt); |
||||
|
||||
return Entry; |
||||
} /* QQ_PopTail */ |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static PQQ_ENTRY |
||||
QQ_GetHead( |
||||
PQQ_CONTAINER pQueue, |
||||
unsigned int Idx) |
||||
{ |
||||
if(Idx >= (unsigned int) MM_ATOMIC_READ(&pQueue->EntryCnt)) |
||||
{ |
||||
return (PQQ_ENTRY) 0; |
||||
} |
||||
|
||||
if(pQueue->Head > Idx) |
||||
{ |
||||
Idx = pQueue->Head - Idx; |
||||
} |
||||
else |
||||
{ |
||||
Idx = pQueue->Size - (Idx - pQueue->Head); |
||||
} |
||||
Idx--; |
||||
|
||||
return pQueue->Array[Idx]; |
||||
} |
||||
|
||||
|
||||
|
||||
/******************************************************************************/ |
||||
/* Description: */ |
||||
/* */ |
||||
/* Return: */ |
||||
/******************************************************************************/ |
||||
__inline static PQQ_ENTRY |
||||
QQ_GetTail( |
||||
PQQ_CONTAINER pQueue, |
||||
unsigned int Idx) |
||||
{ |
||||
if(Idx >= (unsigned int) MM_ATOMIC_READ(&pQueue->EntryCnt)) |
||||
{ |
||||
return (PQQ_ENTRY) 0; |
||||
} |
||||
|
||||
Idx += pQueue->Tail; |
||||
if(Idx >= pQueue->Size) |
||||
{ |
||||
Idx = Idx - pQueue->Size; |
||||
} |
||||
|
||||
return pQueue->Array[Idx]; |
||||
} |
||||
|
||||
#endif /* QQ_USE_MACROS */ |
||||
|
||||
|
||||
|
||||
#endif /* QUEUE_H */ |
@ -1,111 +0,0 @@ |
||||
|
||||
#if 1 |
||||
#define DEBUG_REG printk |
||||
#else |
||||
#define DEBUG_REG |
||||
#endif |
||||
|
||||
void ReadDataFromRegister(robo_info_t *robo, uint16 page_num,uint16 addr_num, uint16 len, void* data) |
||||
{ |
||||
|
||||
uint32 val32 = 0,val64[2]; |
||||
uint16 val16 =0,val48[3];//,val32[2],val64[4];
|
||||
memset(val48,0,6); |
||||
memset(val64,0,8); |
||||
//memset(val32,0,4);
|
||||
DEBUG_REG("Read ioctl Page[0x%02x] Addr[0x%02x] len[%d].\n", page_num, addr_num, len); |
||||
switch (len) |
||||
{ |
||||
case 1: |
||||
case 2: |
||||
{ |
||||
robo->ops->read_reg(robo, page_num, addr_num, &val16, len); |
||||
DEBUG_REG("IRead 8/16 bit Page[0x%02x]addr[0x%02x]len[%d]val[0x%04x].\n", |
||||
page_num, addr_num, len, val16); |
||||
memcpy(data,&val16,2); |
||||
break; |
||||
} |
||||
case 4: |
||||
{ |
||||
robo->ops->read_reg(robo, page_num, addr_num, &val32, len); |
||||
DEBUG_REG("IRead 32bit Page[0x%02x]addr[0x%02x]len[%d]val[0x%08x].\n", |
||||
page_num, addr_num, len, val32); |
||||
memcpy(data,&val32,4); |
||||
break; |
||||
} |
||||
case 6: |
||||
{ |
||||
robo->ops->read_reg(robo, page_num,addr_num, &val48, len); |
||||
DEBUG_REG("IRead 48bit Page[0x%02x]addr[0x%02x]len[%d]val[0x%04x-0x%04x-0x%04x].\n", |
||||
page_num, addr_num, len, val48[0], val48[1], val48[2]); |
||||
memcpy(data,&val48,6); |
||||
break; |
||||
} |
||||
case 8: |
||||
{ |
||||
robo->ops->read_reg(robo, page_num, addr_num, &val64, len); |
||||
DEBUG_REG("IRead 64bit Page[0x%02x]addr[0x%02x]len[%d]val[0x%08x-0x%08x].\n", |
||||
page_num, addr_num, len, val64[0], val64[1]); |
||||
memcpy(data,&val64,8); |
||||
break; |
||||
} |
||||
} |
||||
} |
||||
|
||||
|
||||
|
||||
void WriteDataToRegister(robo_info_t *robo,uint16 page_num,uint16 addr_num, uint16 len, void* data) |
||||
{ |
||||
DEBUG_REG("Write ioctl Page[0x%02x]Addr[0x%02x]len[%d].\n",page_num,addr_num,len); |
||||
switch (len) |
||||
{ |
||||
case 1: |
||||
case 2: |
||||
{ |
||||
DEBUG_REG("Write 2byte Page[0x%02x]addr[0x%02x]len[%d]val[0x%04x].\n", |
||||
page_num, addr_num, len, *((uint16 *)data)); |
||||
robo->ops->write_reg(robo, page_num, addr_num, data, len); |
||||
if (page_num < 0x10 || page_num > 0x17) { |
||||
robo->ops->read_reg(robo, page_num, addr_num, data, len); |
||||
DEBUG_REG("Reload Page[0x%02x]addr[0x%02x]len[%d]val[0x%04x].\n", |
||||
page_num, addr_num, len, *((uint16 *)data)); |
||||
} |
||||
break; |
||||
} |
||||
case 4: |
||||
{ |
||||
DEBUG_REG("Write 4byte Page[0x%02x]addr[0x%02x]len[%d]val[0x%08x].\n", |
||||
page_num, addr_num, len, *((uint32 *)data)); |
||||
robo->ops->write_reg(robo, page_num, addr_num, data, len); |
||||
if (page_num < 0x10 || page_num > 0x17) { |
||||
robo->ops->read_reg(robo, page_num, addr_num, data, len); |
||||
DEBUG_REG("Reload Page[0x%02x]addr[0x%02x]len[%d]val[0x%08x].\n", |
||||
page_num, addr_num, len, *((uint32 *)data)); |
||||
} |
||||
break; |
||||
} |
||||
case 6: |
||||
{ |
||||
DEBUG_REG("Write 6byte Page[0x%02x]addr[0x%02x]len[%d]val[0x%04x-0x%04x-0x%04x].\n", |
||||
page_num, addr_num, len, *((uint16 *)data),*((((uint16 *)data)+1)), |
||||
*(((uint16 *)data)+2)); |
||||
robo->ops->write_reg(robo, page_num, addr_num, data, len); |
||||
robo->ops->read_reg(robo, page_num, addr_num, data, len); |
||||
DEBUG_REG("Reload Page[0x%02x]addr[0x%02x]len[%d]val[0x%04x-0x%04x-0x%04x].\n", |
||||
page_num, addr_num, len,*((uint16 *)data),*((((uint16 *)data)+1)), |
||||
*(((uint16 *)data)+2)); |
||||
break; |
||||
} |
||||
case 8: |
||||
{ |
||||
DEBUG_REG("Write 8byte Page[0x%02x]addr[0x%02x]len[%d]val[0x%08x-0x%08x].\n", |
||||
page_num, addr_num, len, *((uint32*)data),*(((uint32 *)data)+1)); |
||||
robo->ops->write_reg(robo, page_num, addr_num, data, len); |
||||
robo->ops->read_reg(robo, page_num, addr_num, data, len); |
||||
DEBUG_REG("Reload Page[0x%x]addr[0x%x]len[%d]val[0x%08x-0x%08x].\n", |
||||
page_num, addr_num, len,*((uint32 *)data), *(((uint32 *)data)+1)); |
||||
break; |
||||
} |
||||
} |
||||
} |
||||
|
@ -1,58 +0,0 @@ |
||||
/*
|
||||
* HND SiliconBackplane Gigabit Ethernet core registers |
||||
* |
||||
* Copyright 2007, Broadcom Corporation |
||||
* All Rights Reserved. |
||||
*
|
||||
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY |
||||
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM |
||||
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS |
||||
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE. |
||||
* |
||||
*/ |
||||
|
||||
#ifndef _sbgige_h_ |
||||
#define _sbgige_h_ |
||||
|
||||
#include <typedefs.h> |
||||
#include <sbconfig.h> |
||||
#include <pcicfg.h> |
||||
|
||||
/* cpp contortions to concatenate w/arg prescan */ |
||||
#ifndef PAD |
||||
#define _PADLINE(line) pad ## line |
||||
#define _XSTR(line) _PADLINE(line) |
||||
#define PAD _XSTR(__LINE__) |
||||
#endif /* PAD */ |
||||
|
||||
/* PCI to OCP shim registers */ |
||||
typedef volatile struct { |
||||
uint32 FlushStatusControl; |
||||
uint32 FlushReadAddr; |
||||
uint32 FlushTimeoutCntr; |
||||
uint32 BarrierReg; |
||||
uint32 MaocpSIControl; |
||||
uint32 SiocpMaControl; |
||||
uint8 PAD[0x02E8]; |
||||
} sbgige_pcishim_t; |
||||
|
||||
/* SB core registers */ |
||||
typedef volatile struct { |
||||
/* PCI I/O Read/Write registers */ |
||||
uint8 pciio[0x0400]; |
||||
|
||||
/* Reserved */ |
||||
uint8 reserved[0x0400]; |
||||
|
||||
/* PCI configuration registers */ |
||||
pci_config_regs pcicfg; |
||||
uint8 PAD[0x0300]; |
||||
|
||||
/* PCI to OCP shim registers */ |
||||
sbgige_pcishim_t pcishim; |
||||
|
||||
/* Sonics SiliconBackplane registers */ |
||||
sbconfig_t sbconfig; |
||||
} sbgige_t; |
||||
|
||||
#endif /* _sbgige_h_ */ |
@ -1,106 +0,0 @@ |
||||
/******************************************************************************/ |
||||
/* */ |
||||
/* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2002 - 2004 Broadcom */ |
||||
/* Corporation. */ |
||||
/* All rights reserved. */ |
||||
/* */ |
||||
/* This program is free software; you can redistribute it and/or modify */ |
||||
/* it under the terms of the GNU General Public License as published by */ |
||||
/* the Free Software Foundation, located in the file LICENSE. */ |
||||
/* */ |
||||
/* History: */ |
||||
/* */ |
||||
/******************************************************************************/ |
||||
|
||||
#include "mm.h" |
||||
|
||||
#ifdef INCLUDE_TCP_SEG_SUPPORT |
||||
#include "fw_stkoffld.h" |
||||
#include "fw_lso05.h" |
||||
|
||||
LM_UINT32 LM_GetStkOffLdFirmwareSize(PLM_DEVICE_BLOCK pDevice) |
||||
{ |
||||
LM_UINT32 FwSize; |
||||
|
||||
if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5750) |
||||
{ |
||||
return 0; |
||||
} |
||||
if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5705)
|
||||
{ |
||||
FwSize = (LM_UINT32)(t3StkOffLd05FwTextLen +
|
||||
t3StkOffLd05FwRodataLen +
|
||||
t3StkOffLd05FwDataLen + |
||||
t3StkOffLd05FwSbssLen + |
||||
t3StkOffLd05FwBssLen); |
||||
} |
||||
else |
||||
{ |
||||
FwSize = (LM_UINT32)(t3StkOffLdFwTextLen + |
||||
t3StkOffLdFwRodataLen + |
||||
t3StkOffLdFwDataLen + |
||||
t3StkOffLdFwSbssLen + |
||||
t3StkOffLdFwBssLen); |
||||
} |
||||
|
||||
return FwSize; |
||||
} |
||||
|
||||
LM_STATUS LM_LoadStkOffLdFirmware(PLM_DEVICE_BLOCK pDevice) |
||||
{ |
||||
T3_FWIMG_INFO FwImgInfo; |
||||
LM_UINT32 Cpu; |
||||
|
||||
if (T3_ASIC_IS_575X_PLUS(pDevice->ChipRevId)) |
||||
{ |
||||
return LM_STATUS_SUCCESS; |
||||
} |
||||
if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5705)
|
||||
{ |
||||
FwImgInfo.StartAddress = t3StkOffLd05FwStartAddr; |
||||
FwImgInfo.Text.Buffer = (PLM_UINT8)t3StkOffLd05FwText; |
||||
FwImgInfo.Text.Offset = t3StkOffLd05FwTextAddr; |
||||
FwImgInfo.Text.Length = t3StkOffLd05FwTextLen; |
||||
FwImgInfo.ROnlyData.Buffer = (PLM_UINT8)t3StkOffLd05FwRodata; |
||||
FwImgInfo.ROnlyData.Offset = t3StkOffLd05FwRodataAddr; |
||||
FwImgInfo.ROnlyData.Length = t3StkOffLd05FwRodataLen; |
||||
FwImgInfo.Data.Buffer = (PLM_UINT8)t3StkOffLd05FwData; |
||||
FwImgInfo.Data.Offset = t3StkOffLd05FwDataAddr; |
||||
FwImgInfo.Data.Length = t3StkOffLd05FwDataLen; |
||||
FwImgInfo.Sbss.Offset = t3StkOffLd05FwSbssAddr; |
||||
FwImgInfo.Sbss.Length = t3StkOffLd05FwSbssLen; |
||||
FwImgInfo.Bss.Offset = t3StkOffLd05FwBssAddr; |
||||
FwImgInfo.Bss.Length = t3StkOffLd05FwBssLen; |
||||
Cpu = T3_RX_CPU_ID; |
||||
} |
||||
else |
||||
{ |
||||
FwImgInfo.StartAddress = t3StkOffLdFwStartAddr; |
||||
FwImgInfo.Text.Buffer = (PLM_UINT8)t3StkOffLdFwText; |
||||
FwImgInfo.Text.Offset = t3StkOffLdFwTextAddr; |
||||
FwImgInfo.Text.Length = t3StkOffLdFwTextLen; |
||||
FwImgInfo.ROnlyData.Buffer = (PLM_UINT8)t3StkOffLdFwRodata; |
||||
FwImgInfo.ROnlyData.Offset = t3StkOffLdFwRodataAddr; |
||||
FwImgInfo.ROnlyData.Length = t3StkOffLdFwRodataLen; |
||||
FwImgInfo.Data.Buffer = (PLM_UINT8)t3StkOffLdFwData; |
||||
FwImgInfo.Data.Offset = t3StkOffLdFwDataAddr; |
||||
FwImgInfo.Data.Length = t3StkOffLdFwDataLen; |
||||
FwImgInfo.Sbss.Offset = t3StkOffLdFwSbssAddr; |
||||
FwImgInfo.Sbss.Length = t3StkOffLdFwSbssLen; |
||||
FwImgInfo.Bss.Offset = t3StkOffLdFwBssAddr; |
||||
FwImgInfo.Bss.Length = t3StkOffLdFwBssLen; |
||||
Cpu = T3_TX_CPU_ID; |
||||
} |
||||
|
||||
if (LM_LoadFirmware(pDevice, |
||||
&FwImgInfo, |
||||
Cpu, |
||||
Cpu) != LM_STATUS_SUCCESS) |
||||
{ |
||||
return LM_STATUS_FAILURE; |
||||
} |
||||
|
||||
return LM_STATUS_SUCCESS; |
||||
} |
||||
|
||||
#endif /* INCLUDE_TCP_SEG_SUPPORT */ |
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Load Diff
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Load Diff
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Reference in new issue