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198 lines
6.5 KiB
198 lines
6.5 KiB
6 years ago
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From 72c050acbc425ef99313d5c2e4c866e25567e569 Mon Sep 17 00:00:00 2001
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From: Rakesh Nair <ranair@codeaurora.org>
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Date: Thu, 8 Jun 2017 14:29:20 +0530
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Subject: [PATCH] CHROMIUM: net: qualcomm: Add fix for memory allocation issues
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Added ethtool counters for memory allocation failures accounting.
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Added support to track number of allocation failures that could
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not be fulfilled in the current iteration in the rx descriptor
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field and use the info to allocate in the subsequent iteration.
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Change-Id: Ie4fd3b6cf25304e5db2c9247a498791e7e9bb4aa
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Signed-off-by: Rakesh Nair <ranair@codeaurora.org>
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Signed-off-by: Kan Yan <kyan@google.com>
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Reviewed-on: https://chromium-review.googlesource.com/535419
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Reviewed-by: Grant Grundler <grundler@chromium.org>
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---
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drivers/net/ethernet/qualcomm/essedma/edma.c | 54 ++++++++++++++-----
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drivers/net/ethernet/qualcomm/essedma/edma.h | 2 +
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.../ethernet/qualcomm/essedma/edma_ethtool.c | 1 +
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3 files changed, 43 insertions(+), 14 deletions(-)
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--- a/drivers/net/ethernet/qualcomm/essedma/edma.c
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+++ b/drivers/net/ethernet/qualcomm/essedma/edma.c
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@@ -103,6 +103,9 @@ static int edma_alloc_rx_ring(struct edm
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return -ENOMEM;
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}
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+ /* Initialize pending_fill */
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+ erxd->pending_fill = 0;
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+
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return 0;
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}
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@@ -185,11 +188,8 @@ static int edma_alloc_rx_buf(struct edma
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u16 prod_idx, length;
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u32 reg_data;
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- if (cleaned_count > erdr->count) {
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- dev_err(&pdev->dev, "Incorrect cleaned_count %d",
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- cleaned_count);
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- return -1;
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- }
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+ if (cleaned_count > erdr->count)
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+ cleaned_count = erdr->count - 1;
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i = erdr->sw_next_to_fill;
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@@ -199,6 +199,9 @@ static int edma_alloc_rx_buf(struct edma
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if (sw_desc->flags & EDMA_SW_DESC_FLAG_SKB_REUSE) {
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skb = sw_desc->skb;
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+
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+ /* Clear REUSE Flag */
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+ sw_desc->flags &= ~EDMA_SW_DESC_FLAG_SKB_REUSE;
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} else {
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/* alloc skb */
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skb = netdev_alloc_skb_ip_align(edma_netdev[0], length);
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@@ -264,6 +267,13 @@ static int edma_alloc_rx_buf(struct edma
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reg_data &= ~EDMA_RFD_PROD_IDX_BITS;
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reg_data |= prod_idx;
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edma_write_reg(EDMA_REG_RFD_IDX_Q(queue_id), reg_data);
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+
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+ /* If we couldn't allocate all the buffers
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+ * we increment the alloc failure counters
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+ */
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+ if (cleaned_count)
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+ edma_cinfo->edma_ethstats.rx_alloc_fail_ctr++;
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+
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return cleaned_count;
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}
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@@ -534,7 +544,7 @@ static int edma_rx_complete_paged(struct
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* edma_rx_complete()
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* Main api called from the poll function to process rx packets.
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*/
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-static void edma_rx_complete(struct edma_common_info *edma_cinfo,
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+static u16 edma_rx_complete(struct edma_common_info *edma_cinfo,
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int *work_done, int work_to_do, int queue_id,
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struct napi_struct *napi)
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{
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@@ -554,6 +564,7 @@ static void edma_rx_complete(struct edma
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u16 count = erdr->count, rfd_avail;
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u8 queue_to_rxid[8] = {0, 0, 1, 1, 2, 2, 3, 3};
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+ cleaned_count = erdr->pending_fill;
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sw_next_to_clean = erdr->sw_next_to_clean;
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edma_read_reg(EDMA_REG_RFD_IDX_Q(queue_id), &data);
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@@ -652,12 +663,13 @@ static void edma_rx_complete(struct edma
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(*work_done)++;
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drop_count = 0;
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}
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- if (cleaned_count == EDMA_RX_BUFFER_WRITE) {
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+ if (cleaned_count >= EDMA_RX_BUFFER_WRITE) {
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/* If buffer clean count reaches 16, we replenish HW buffers. */
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ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
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edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
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sw_next_to_clean);
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cleaned_count = ret_count;
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+ erdr->pending_fill = ret_count;
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}
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continue;
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}
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@@ -730,11 +742,12 @@ static void edma_rx_complete(struct edma
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adapter->stats.rx_bytes += length;
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/* Check if we reached refill threshold */
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- if (cleaned_count == EDMA_RX_BUFFER_WRITE) {
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+ if (cleaned_count >= EDMA_RX_BUFFER_WRITE) {
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ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
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edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
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sw_next_to_clean);
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cleaned_count = ret_count;
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+ erdr->pending_fill = ret_count;
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}
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/* At this point skb should go to stack */
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@@ -756,11 +769,17 @@ static void edma_rx_complete(struct edma
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/* Refill here in case refill threshold wasn't reached */
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if (likely(cleaned_count)) {
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ret_count = edma_alloc_rx_buf(edma_cinfo, erdr, cleaned_count, queue_id);
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- if (ret_count)
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- dev_dbg(&pdev->dev, "Not all buffers was reallocated");
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+ erdr->pending_fill = ret_count;
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+ if (ret_count) {
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+ if (net_ratelimit())
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+ dev_dbg(&pdev->dev, "Not all buffers was reallocated");
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+ }
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+
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edma_write_reg(EDMA_REG_RX_SW_CONS_IDX_Q(queue_id),
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erdr->sw_next_to_clean);
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}
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+
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+ return erdr->pending_fill;
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}
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/* edma_delete_rfs_filter()
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@@ -2064,6 +2083,7 @@ int edma_poll(struct napi_struct *napi,
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u32 shadow_rx_status, shadow_tx_status;
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int queue_id;
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int i, work_done = 0;
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+ u16 rx_pending_fill;
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/* Store the Rx/Tx status by ANDing it with
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* appropriate CPU RX?TX mask
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@@ -2097,13 +2117,19 @@ int edma_poll(struct napi_struct *napi,
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*/
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while (edma_percpu_info->rx_status) {
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queue_id = ffs(edma_percpu_info->rx_status) - 1;
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- edma_rx_complete(edma_cinfo, &work_done,
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- budget, queue_id, napi);
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+ rx_pending_fill = edma_rx_complete(edma_cinfo, &work_done,
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+ budget, queue_id, napi);
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- if (likely(work_done < budget))
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+ if (likely(work_done < budget)) {
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+ if (rx_pending_fill) {
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+ /* reschedule poll() to refill rx buffer deficit */
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+ work_done = budget;
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+ break;
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+ }
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edma_percpu_info->rx_status &= ~(1 << queue_id);
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- else
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+ } else {
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break;
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+ }
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}
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/* Clear the status register, to avoid the interrupts to
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--- a/drivers/net/ethernet/qualcomm/essedma/edma.h
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+++ b/drivers/net/ethernet/qualcomm/essedma/edma.h
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@@ -225,6 +225,7 @@ struct edma_ethtool_statistics {
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u32 rx_q6_byte;
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u32 rx_q7_byte;
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u32 tx_desc_error;
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+ u32 rx_alloc_fail_ctr;
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};
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struct edma_mdio_data {
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@@ -362,6 +363,7 @@ struct edma_rfd_desc_ring {
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dma_addr_t dma; /* descriptor ring physical address */
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u16 sw_next_to_fill; /* next descriptor to fill */
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u16 sw_next_to_clean; /* next descriptor to clean */
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+ u16 pending_fill; /* fill pending from previous iteration */
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};
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/* edma_rfs_flter_node - rfs filter node in hash table */
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--- a/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c
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+++ b/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c
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@@ -78,6 +78,7 @@ static const struct edma_ethtool_stats e
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{"rx_q6_byte", EDMA_STAT(rx_q6_byte)},
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{"rx_q7_byte", EDMA_STAT(rx_q7_byte)},
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{"tx_desc_error", EDMA_STAT(tx_desc_error)},
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+ {"rx_alloc_fail_ctr", EDMA_STAT(rx_alloc_fail_ctr)},
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};
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#define EDMA_STATS_LEN ARRAY_SIZE(edma_gstrings_stats)
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