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198 lines
6.3 KiB
198 lines
6.3 KiB
13 years ago
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From e765119d933dd84de2c095d422f1609486775f79 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 12 Apr 2012 13:25:42 +0200
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Subject: [PATCH 69/70] MIPS: lantiq: fix spi for ase, update for clkdev and
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platform driver
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irqs, gpios, chipselects
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updated to use module_platform_driver()
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clkdev is a bit hacky, using ltq_spi.0, as specifying no device numbering led to
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the mtd driver not hooking up to an spi flash.
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Signed-off-by: Conor O'Gorman <i@conorogorman.net>
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---
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.../mips/include/asm/mach-lantiq/xway/lantiq_irq.h | 4 ++
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arch/mips/lantiq/xway/sysctrl.c | 2 +-
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drivers/spi/spi-xway.c | 58 ++++++++++----------
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3 files changed, 35 insertions(+), 29 deletions(-)
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diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
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index d9c892b..d86acdd 100644
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--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
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+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_irq.h
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@@ -30,6 +30,10 @@
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#define LTQ_SSC_TIR_AR9 (INT_NUM_IM0_IRL0 + 14)
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#define LTQ_SSC_RIR_AR9 (INT_NUM_IM0_IRL0 + 15)
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#define LTQ_SSC_EIR (INT_NUM_IM0_IRL0 + 16)
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+#define LTQ_SSC_RIR_ASE (INT_NUM_IM0_IRL0 + 16)
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+#define LTQ_SSC_TIR_ASE (INT_NUM_IM0_IRL0 + 17)
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+#define LTQ_SSC_EIR_ASE (INT_NUM_IM0_IRL0 + 18)
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+#define LTQ_SSC_FIR_ASE (INT_NUM_IM0_IRL0 + 19)
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#define LTQ_MEI_DYING_GASP_INT (INT_NUM_IM1_IRL0 + 21)
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#define LTQ_MEI_INT (INT_NUM_IM1_IRL0 + 23)
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diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
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index 5807456..de4ce8f 100644
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--- a/arch/mips/lantiq/xway/sysctrl.c
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+++ b/arch/mips/lantiq/xway/sysctrl.c
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@@ -233,7 +233,7 @@ void __init ltq_soc_init(void)
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clkdev_add_pmu("ltq_fpi", NULL, 0, PMU_FPI);
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clkdev_add_pmu("ltq_dma", NULL, 0, PMU_DMA);
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clkdev_add_pmu("ltq_stp", NULL, 0, PMU_STP);
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- clkdev_add_pmu("ltq_spi", NULL, 0, PMU_SPI);
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+ clkdev_add_pmu("ltq_spi.0", NULL, 0, PMU_SPI);
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clkdev_add_pmu("ltq_gptu", NULL, 0, PMU_GPT);
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clkdev_add_pmu("ltq_ebu", NULL, 0, PMU_EBU);
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if (!ltq_is_vr9())
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diff --git a/drivers/spi/spi-xway.c b/drivers/spi/spi-xway.c
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index 016a6d0..be5c25b 100644
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--- a/drivers/spi/spi-xway.c
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+++ b/drivers/spi/spi-xway.c
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@@ -143,9 +143,9 @@
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#define LTQ_SPI_IRNEN_ALL 0xF
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/* Hard-wired GPIOs used by SPI controller */
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-#define LTQ_SPI_GPIO_DI 16
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-#define LTQ_SPI_GPIO_DO 17
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-#define LTQ_SPI_GPIO_CLK 18
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+#define LTQ_SPI_GPIO_DI (ltq_is_ase()? 8 : 16)
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+#define LTQ_SPI_GPIO_DO (ltq_is_ase()? 9 : 17)
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+#define LTQ_SPI_GPIO_CLK (ltq_is_ase()? 10 : 18)
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struct ltq_spi {
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struct spi_bitbang bitbang;
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@@ -229,7 +229,7 @@ static void ltq_spi_hw_enable(struct ltq_spi *hw)
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u32 clc;
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/* Power-up mdule */
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- clk_enable(hw->spiclk);
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+ clk_enable(hw->spiclk);
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/*
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* Set clock divider for run mode to 1 to
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@@ -245,7 +245,7 @@ static void ltq_spi_hw_disable(struct ltq_spi *hw)
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ltq_spi_reg_write(hw, LTQ_SPI_CLC_DISS, LTQ_SPI_CLC);
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/* Power-down mdule */
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- clk_disable(hw->spiclk);
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+ clk_disable(hw->spiclk);
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}
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static void ltq_spi_reset_fifos(struct ltq_spi *hw)
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@@ -284,7 +284,7 @@ static inline int ltq_spi_wait_ready(struct ltq_spi *hw)
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cond_resched();
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} while (!time_after_eq(jiffies, timeout));
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- dev_err(hw->dev, "SPI wait ready timed out\n");
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+ dev_err(hw->dev, "SPI wait ready timed out stat: %x\n", stat);
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return -ETIMEDOUT;
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}
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@@ -556,6 +556,12 @@ static const struct ltq_spi_cs_gpio_map ltq_spi_cs[] = {
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{ 11, 3 },
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};
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+static const struct ltq_spi_cs_gpio_map ltq_spi_cs_ase[] = {
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+ { 7, 2 },
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+ { 15, 1 },
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+ { 14, 1 },
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+};
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+
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static int ltq_spi_setup(struct spi_device *spi)
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{
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struct ltq_spi *hw = ltq_spi_to_hw(spi);
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@@ -600,8 +606,10 @@ static int ltq_spi_setup(struct spi_device *spi)
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cstate->cs_activate = ltq_spi_gpio_cs_activate;
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cstate->cs_deactivate = ltq_spi_gpio_cs_deactivate;
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} else {
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- ret = ltq_gpio_request(&spi->dev, ltq_spi_cs[spi->chip_select].gpio,
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- ltq_spi_cs[spi->chip_select].mux,
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+ struct ltq_spi_cs_gpio_map *cs_map =
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+ ltq_is_ase() ? ltq_spi_cs_ase : ltq_spi_cs;
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+ ret = ltq_gpio_request(&spi->dev, cs_map[spi->chip_select].gpio,
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+ cs_map[spi->chip_select].mux,
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1, "spi-cs");
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if (ret)
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return -EBUSY;
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@@ -633,7 +641,8 @@ static void ltq_spi_cleanup(struct spi_device *spi)
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if (cdata && cdata->gpio)
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gpio = cdata->gpio;
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else
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- gpio = ltq_spi_cs[spi->chip_select].gpio;
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+ gpio = ltq_is_ase() ? ltq_spi_cs_ase[spi->chip_select].gpio :
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+ ltq_spi_cs[spi->chip_select].gpio;
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gpio_free(gpio);
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kfree(cstate);
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@@ -868,7 +877,8 @@ static const struct ltq_spi_irq_map ltq_spi_irqs[] = {
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{ "spi_err", ltq_spi_err_irq },
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};
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-static int __init ltq_spi_probe(struct platform_device *pdev)
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+static int __devinit
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+ltq_spi_probe(struct platform_device *pdev)
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{
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struct spi_master *master;
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struct resource *r;
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@@ -910,14 +920,14 @@ static int __init ltq_spi_probe(struct platform_device *pdev)
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hw->fpiclk = clk_get_fpi();
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if (IS_ERR(hw->fpiclk)) {
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- dev_err(&pdev->dev, "clk_get\n");
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+ dev_err(&pdev->dev, "fpi clk\n");
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ret = PTR_ERR(hw->fpiclk);
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goto err_master;
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}
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hw->spiclk = clk_get(&pdev->dev, NULL);
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if (IS_ERR(hw->spiclk)) {
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- dev_err(&pdev->dev, "clk_get\n");
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+ dev_err(&pdev->dev, "spi clk\n");
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ret = PTR_ERR(hw->spiclk);
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goto err_master;
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}
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@@ -1014,7 +1024,8 @@ err:
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return ret;
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}
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-static int __exit ltq_spi_remove(struct platform_device *pdev)
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+static int __devexit
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+ltq_spi_remove(struct platform_device *pdev)
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{
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struct ltq_spi *hw = platform_get_drvdata(pdev);
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int ret, i;
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@@ -1043,24 +1054,15 @@ static int __exit ltq_spi_remove(struct platform_device *pdev)
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}
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static struct platform_driver ltq_spi_driver = {
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+ .probe = ltq_spi_probe,
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+ .remove = __devexit_p(ltq_spi_remove),
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.driver = {
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- .name = "ltq_spi",
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- .owner = THIS_MODULE,
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- },
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- .remove = __exit_p(ltq_spi_remove),
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+ .name = "ltq_spi",
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+ .owner = THIS_MODULE,
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+ },
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};
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-static int __init ltq_spi_init(void)
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-{
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- return platform_driver_probe(<q_spi_driver, ltq_spi_probe);
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-}
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-module_init(ltq_spi_init);
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-
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-static void __exit ltq_spi_exit(void)
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-{
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- platform_driver_unregister(<q_spi_driver);
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-}
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-module_exit(ltq_spi_exit);
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+module_platform_driver(ltq_spi_driver);
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MODULE_DESCRIPTION("Lantiq SoC SPI controller driver");
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MODULE_AUTHOR("Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>");
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--
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1.7.9.1
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