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62 lines
1.8 KiB
62 lines
1.8 KiB
7 years ago
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From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Wed, 27 Jul 2016 11:36:00 +0200
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Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding
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documentation
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Add binding documentation for the pincontrol core found in BCM6358 SoCs.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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.../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++
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1 file changed, 44 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
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@@ -0,0 +1,44 @@
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+* Broadcom BCM6358 pin controller
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+
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+Required properties:
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+- compatible: Must be "brcm,bcm6358-pinctrl".
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+- reg: Register specifiers of dirout, dat registers.
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+- reg-names: Must be "dirout", "dat".
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+- brcm,gpiomode: Phandle to the shared gpiomode register.
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+- gpio-controller: Identifies this node as a gpio-controller.
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+- #gpio-cells: Must be <2>.
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+
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+Example:
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+
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+pinctrl: pin-controller@fffe0080 {
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+ compatible = "brcm,bcm6358-pinctrl";
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+ reg = <0xfffe0080 0x8>,
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+ <0xfffe0088 0x8>,
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+ <0xfffe0098 0x4>;
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+ reg-names = "dirout", "dat";
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+ brcm,gpiomode = <&gpiomode>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+};
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+
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+gpiomode: syscon@fffe0098 {
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+ compatible = "brcm,bcm6358-gpiomode", "syscon";
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+ reg = <0xfffe0098 0x4>;
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+ native-endian;
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+};
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+
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+Available pins/groups and functions:
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+
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+name pins functions
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+-----------------------------------------------------------
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+ebi_cs_grp 30-31 ebi_cs
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+uart1_grp 28-31 uart1
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+spi_cs_grp 32-33 spi_cs
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+async_modem_grp 12-15 async_modem
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+legacy_led_grp 9-15 legacy_led
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+serial_led_grp 6-7 serial_led
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+led_grp 0-3 led
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+utopia_grp 12-15, 22-31 utopia
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+pwm_syn_clk_grp 8 pwm_syn_clk
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+sys_irq_grp 5 sys_irq
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