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From 6c3b88970175e18a67eb8e55c4eba10614d0d5dc Mon Sep 17 00:00:00 2001
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From: Michel Stempin <michel.stempin@wanadoo.fr>
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Date: Mon, 15 Jul 2013 12:13:56 +0200
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Subject: [PATCH] mtd: chips: Add support for PMC SPI Flash chips in m25p80.c
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commit 6c3b88970175e18a67eb8e55c4eba10614d0d5dc upstream.
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Add support for PMC (now Chingis, part of ISSI) Pm25LV512 (512 Kib),
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Pm25LV010 (1 Mib) and Pm25LQ032 (32 Mib) SPI Flash chips.
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This patch addresses two generations of PMC SPI Flash chips:
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- Pm25LV512 and Pm25LV010: these have 4KiB sectors and 32KiB
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blocks. The 4KiB sector erase uses a non-standard opcode
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(0xd7). They do not support JEDEC RDID (0x9f), and so they can only
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be detected by matching their name string with pre-configured
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platform data. Because of the cascaded acquisitions, the datasheet
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is no longer available on the current manufacturer's website,
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although it is still commonly used in some recent wireless routers
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(<https://forum.openwrt.org/viewtopic.php?pid=186360#p186360>). The
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only public datasheet available seems to be on GeoCities:
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<http://www.geocities.jp/scottle556/pdf/Pm25LV512-010.pdf>
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- Pm25LQ032: a newer generation flash, with 4KiB sectors and 64KiB
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blocks. It uses the standard erase and JEDEC read-ID
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opcodes. Manufacturer's datasheet is here:
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<http://www.chingistek.com/img/Product_Files/Pm25LQ032C%20datasheet%20v1.6.1.pdf>
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This patch is resent in order to take into account both Brian Norris
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remarks and this upstream patch:
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commit e534ee4f9ca29fdb38eea4b0c53f2154fbd8c1ee
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Author: Krzysztof Mazur <krzysiek@podlesie.net>
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Date: Fri Feb 22 15:51:05 2013 +0100
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mtd: m25p80: introduce SST_WRITE flag for SST byte programming
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Not all SST devices implement the SST byte programming command.
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Some devices (like SST25VF064C) implement only standard m25p80 page
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write command.
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Now SPI flash devices that need sst_write() are explicitly marked
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with new SST_WRITE flag and the decision to use sst_write() is based
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on this flag instead of manufacturer id.
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Signed-off-by: Michel Stempin <michel.stempin@wanadoo.fr>
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[Brian: fixed conflict]
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Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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---
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drivers/mtd/devices/m25p80.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/drivers/mtd/devices/m25p80.c
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+++ b/drivers/mtd/devices/m25p80.c
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@@ -43,6 +43,7 @@
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#define OPCODE_FAST_READ 0x0b /* Read data bytes (high frequency) */
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#define OPCODE_PP 0x02 /* Page program (up to 256 bytes) */
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#define OPCODE_BE_4K 0x20 /* Erase 4KiB block */
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+#define OPCODE_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */
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#define OPCODE_BE_32K 0x52 /* Erase 32KiB block */
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#define OPCODE_CHIP_ERASE 0xc7 /* Erase whole flash chip */
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#define OPCODE_SE 0xd8 /* Sector erase (usually 64KiB) */
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@@ -682,6 +683,7 @@ struct flash_info {
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#define SECT_4K 0x01 /* OPCODE_BE_4K works uniformly */
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#define M25P_NO_ERASE 0x02 /* No erase command needed */
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#define SST_WRITE 0x04 /* use SST byte programming */
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+#define SECT_4K_PMC 0x10 /* OPCODE_BE_4K_PMC works uniformly */
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};
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#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags) \
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@@ -762,6 +764,11 @@ static const struct spi_device_id m25p_i
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{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
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{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
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+ /* PMC */
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+ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
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+ { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
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+ { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64, SECT_4K) },
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+
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/* Spansion -- single (large) sector size only, at least
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* for the chips listed here (without boot sectors).
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*/
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@@ -1014,6 +1021,9 @@ static int m25p_probe(struct spi_device
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if (info->flags & SECT_4K) {
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flash->erase_opcode = OPCODE_BE_4K;
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flash->mtd.erasesize = 4096;
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+ } else if (info->flags & SECT_4K_PMC) {
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+ flash->erase_opcode = OPCODE_BE_4K_PMC;
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+ flash->mtd.erasesize = 4096;
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} else {
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flash->erase_opcode = OPCODE_SE;
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flash->mtd.erasesize = info->sector_size;
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