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68 lines
2.1 KiB
68 lines
2.1 KiB
10 years ago
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--- a/arch/arm/mach-cns3xxx/cns3420vb.c
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+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
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@@ -245,6 +245,10 @@ static void __init cns3420_init(void)
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cns3xxx_ahci_init();
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cns3xxx_sdhci_init();
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+ cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
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+ NR_IRQS_CNS3XXX);
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+ cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
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+ NR_IRQS_CNS3XXX + 32);
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pm_power_off = cns3xxx_power_off;
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}
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--- a/arch/arm/mach-cns3xxx/Kconfig
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+++ b/arch/arm/mach-cns3xxx/Kconfig
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@@ -1,6 +1,8 @@
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menuconfig ARCH_CNS3XXX
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bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
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select ARM_GIC
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+ select ARCH_REQUIRE_GPIOLIB
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+ select GENERIC_IRQ_CHIP
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select PCI_DOMAINS if PCI
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select HAVE_ARM_SCU if SMP
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9 years ago
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select HAVE_ARM_TWD
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10 years ago
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--- a/arch/arm/mach-cns3xxx/Makefile
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+++ b/arch/arm/mach-cns3xxx/Makefile
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@@ -1,7 +1,7 @@
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ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
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obj-$(CONFIG_ARCH_CNS3XXX) += cns3xxx.o
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-cns3xxx-y += core.o pm.o
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+cns3xxx-y += core.o pm.o gpio.o
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cns3xxx-$(CONFIG_ATAGS) += devices.o
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cns3xxx-$(CONFIG_PCI) += pcie.o
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cns3xxx-$(CONFIG_MACH_CNS3420VB) += cns3420vb.o
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--- a/arch/arm/mach-cns3xxx/cns3xxx.h
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+++ b/arch/arm/mach-cns3xxx/cns3xxx.h
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@@ -68,8 +68,10 @@
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#define SMC_PCELL_ID_3_OFFSET 0xFFC
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#define CNS3XXX_GPIOA_BASE 0x74000000 /* GPIO port A */
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+#define CNS3XXX_GPIOA_BASE_VIRT 0xFB006000
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#define CNS3XXX_GPIOB_BASE 0x74800000 /* GPIO port B */
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+#define CNS3XXX_GPIOB_BASE_VIRT 0xFB007000
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#define CNS3XXX_RTC_BASE 0x75000000 /* Real Time Clock */
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--- a/arch/arm/mach-cns3xxx/core.c
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+++ b/arch/arm/mach-cns3xxx/core.c
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@@ -50,6 +50,16 @@ static struct map_desc cns3xxx_io_desc[]
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.pfn = __phys_to_pfn(CNS3XXX_PM_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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+ }, {
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+ .virtual = CNS3XXX_GPIOA_BASE_VIRT,
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+ .pfn = __phys_to_pfn(CNS3XXX_GPIOA_BASE),
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+ .length = SZ_4K,
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+ .type = MT_DEVICE,
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+ }, {
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+ .virtual = CNS3XXX_GPIOB_BASE_VIRT,
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+ .pfn = __phys_to_pfn(CNS3XXX_GPIOB_BASE),
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+ .length = SZ_4K,
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+ .type = MT_DEVICE,
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#ifdef CONFIG_PCI
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}, {
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.virtual = CNS3XXX_PCIE0_HOST_BASE_VIRT,
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