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40 lines
1.2 KiB
40 lines
1.2 KiB
9 years ago
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From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Sun, 15 Dec 2013 20:46:26 +0100
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Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
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Newer SoCs have 128 bit wide irq registers, thus 128 available internal
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interupts.
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---
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arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
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arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
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2 files changed, 4 insertions(+), 2 deletions(-)
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--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
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@@ -1,10 +1,12 @@
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#ifndef BCM63XX_IRQ_H_
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#define BCM63XX_IRQ_H_
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+#include <irq.h>
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#include <bcm63xx_cpu.h>
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#define IRQ_INTERNAL_BASE 8
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-#define IRQ_EXTERNAL_BASE 100
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+#define NR_INTERNAL_IRQS 128
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+#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
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#define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
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#define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
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#define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
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--- a/arch/mips/include/asm/mach-bcm63xx/irq.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
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@@ -1,7 +1,7 @@
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#ifndef __ASM_MACH_BCM63XX_IRQ_H
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#define __ASM_MACH_BCM63XX_IRQ_H
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-#define NR_IRQS 128
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+#define NR_IRQS 256
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#define MIPS_CPU_IRQ_BASE 0
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#endif
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