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90 lines
3.1 KiB
90 lines
3.1 KiB
7 years ago
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From 8c4cdce8b1ab044a2ee1d86d5a086f67e32b3c10 Mon Sep 17 00:00:00 2001
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From: Abhishek Sahu <absahu@codeaurora.org>
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Date: Mon, 25 Sep 2017 13:21:25 +0530
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Subject: [PATCH 2/7] mtd: nand: qcom: add command elements in BAM transaction
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All the QPIC register read/write through BAM DMA requires
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command descriptor which contains the array of command elements.
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Reviewed-by: Archit Taneja <architt@codeaurora.org>
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Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
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Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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---
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drivers/mtd/nand/qcom_nandc.c | 19 ++++++++++++++++++-
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1 file changed, 18 insertions(+), 1 deletion(-)
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--- a/drivers/mtd/nand/qcom_nandc.c
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+++ b/drivers/mtd/nand/qcom_nandc.c
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@@ -22,6 +22,7 @@
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/delay.h>
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+#include <linux/dma/qcom_bam_dma.h>
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/* NANDc reg offsets */
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#define NAND_FLASH_CMD 0x00
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@@ -199,6 +200,7 @@ nandc_set_reg(nandc, NAND_READ_LOCATION_
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*/
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#define dev_cmd_reg_addr(nandc, reg) ((nandc)->props->dev_cmd_reg_start + (reg))
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+#define QPIC_PER_CW_CMD_ELEMENTS 32
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#define QPIC_PER_CW_CMD_SGL 32
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#define QPIC_PER_CW_DATA_SGL 8
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@@ -221,8 +223,13 @@ nandc_set_reg(nandc, NAND_READ_LOCATION_
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/*
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* This data type corresponds to the BAM transaction which will be used for all
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* NAND transfers.
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+ * @bam_ce - the array of BAM command elements
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* @cmd_sgl - sgl for NAND BAM command pipe
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* @data_sgl - sgl for NAND BAM consumer/producer pipe
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+ * @bam_ce_pos - the index in bam_ce which is available for next sgl
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+ * @bam_ce_start - the index in bam_ce which marks the start position ce
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+ * for current sgl. It will be used for size calculation
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+ * for current sgl
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* @cmd_sgl_pos - current index in command sgl.
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* @cmd_sgl_start - start index in command sgl.
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* @tx_sgl_pos - current index in data sgl for tx.
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@@ -231,8 +238,11 @@ nandc_set_reg(nandc, NAND_READ_LOCATION_
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* @rx_sgl_start - start index in data sgl for rx.
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*/
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struct bam_transaction {
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+ struct bam_cmd_element *bam_ce;
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struct scatterlist *cmd_sgl;
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struct scatterlist *data_sgl;
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+ u32 bam_ce_pos;
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+ u32 bam_ce_start;
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u32 cmd_sgl_pos;
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u32 cmd_sgl_start;
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u32 tx_sgl_pos;
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@@ -462,7 +472,8 @@ alloc_bam_transaction(struct qcom_nand_c
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bam_txn_size =
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sizeof(*bam_txn) + num_cw *
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- ((sizeof(*bam_txn->cmd_sgl) * QPIC_PER_CW_CMD_SGL) +
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+ ((sizeof(*bam_txn->bam_ce) * QPIC_PER_CW_CMD_ELEMENTS) +
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+ (sizeof(*bam_txn->cmd_sgl) * QPIC_PER_CW_CMD_SGL) +
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(sizeof(*bam_txn->data_sgl) * QPIC_PER_CW_DATA_SGL));
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bam_txn_buf = devm_kzalloc(nandc->dev, bam_txn_size, GFP_KERNEL);
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@@ -472,6 +483,10 @@ alloc_bam_transaction(struct qcom_nand_c
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bam_txn = bam_txn_buf;
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bam_txn_buf += sizeof(*bam_txn);
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+ bam_txn->bam_ce = bam_txn_buf;
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+ bam_txn_buf +=
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+ sizeof(*bam_txn->bam_ce) * QPIC_PER_CW_CMD_ELEMENTS * num_cw;
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+
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bam_txn->cmd_sgl = bam_txn_buf;
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bam_txn_buf +=
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sizeof(*bam_txn->cmd_sgl) * QPIC_PER_CW_CMD_SGL * num_cw;
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@@ -489,6 +504,8 @@ static void clear_bam_transaction(struct
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if (!nandc->props->is_bam)
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return;
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+ bam_txn->bam_ce_pos = 0;
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+ bam_txn->bam_ce_start = 0;
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bam_txn->cmd_sgl_pos = 0;
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bam_txn->cmd_sgl_start = 0;
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bam_txn->tx_sgl_pos = 0;
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